[llvm] [AArch64] Avoid streaming mode hazards from FP constant stores (PR #114207)

[Sander de Smalen via llvm-commits]

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@@ -430,45 +430,50 @@ SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
   if (Value.getOpcode() == ISD::TargetConstantFP)
     return SDValue();
 
-  if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) {
-    if (CFP->getValueType(0) == MVT::f32 &&
-        TLI.isTypeLegal(MVT::i32)) {
-      SDValue Con = DAG.getConstant(CFP->getValueAPF().
-                                      bitcastToAPInt().zextOrTrunc(32),
-                                    SDLoc(CFP), MVT::i32);
-      return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
-                          ST->getOriginalAlign(), MMOFlags, AAInfo);
-    }
+  ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value);
+  if (!CFP)
+    return SDValue();
 
-    if (CFP->getValueType(0) == MVT::f64 &&
-        !TLI.isFPImmLegal(CFP->getValueAPF(), MVT::f64)) {
-      // If this target supports 64-bit registers, do a single 64-bit store.
-      if (TLI.isTypeLegal(MVT::i64)) {
-        SDValue Con = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
-                                      zextOrTrunc(64), SDLoc(CFP), MVT::i64);
-        return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
-                            ST->getOriginalAlign(), MMOFlags, AAInfo);
-      }
+  if (!TLI.canUseIntLoadStoreForFloatValues())
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sdesmalen-arm wrote:

Can you return early without doing the refactoring? Or is there some other functional change in this diff?

https://github.com/llvm/llvm-project/pull/114207