[llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)

[Ricardo Jesus via llvm-commits]

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@@ -4072,6 +4072,23 @@ bool AArch64TTIImpl::isLegalToVectorizeReduction(
   }
 }
 
+bool AArch64TTIImpl::hasVectorMatch(VectorType *VT, unsigned SearchSize) const {
+  // Check that the target has SVE2 and SVE is available.
+  if (!ST->hasSVE2() || !ST->isSVEAvailable())
+    return false;
+
+  // Check that `VT' is a legal type for MATCH, and that the search vector can
+  // be broadcast efficently if necessary.
+  // Currently, we require the search vector to be 64-bit or 128-bit. In the
+  // future we can generalise this to other lengths.
+  unsigned MinEC = VT->getElementCount().getKnownMinValue();
+  if ((MinEC == 8 || MinEC == 16) &&
+      VT->getPrimitiveSizeInBits().getKnownMinValue() == 128 &&
+      (MinEC == SearchSize || MinEC / 2 == SearchSize))
+    return true;
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rj-jesus wrote:

I've moved this to TLI and adjusted it a bit - please let me know what you think!

https://github.com/llvm/llvm-project/pull/101974