[llvm] [LoongArch] Record the special AMO operand constraint with TableGen (PR #114398)

[via llvm-commits]

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@@ -713,7 +713,9 @@ class STORE_2RI14<bits<32> op>
 let hasSideEffects = 0, mayLoad = 1, mayStore = 1, Constraints = "@earlyclobber $rd" in
 class AM_3R<bits<32> op>
     : Fmt3R<op, (outs GPR:$rd), (ins GPR:$rk, GPRMemAtomic:$rj),
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tangaac wrote:

AM_3R is incompatible with amcas,
Unlike other am** instructions, amcas rd rk rj , rd should be read, pervious version consider rd write only.

https://github.com/llvm/llvm-project/pull/114398