[llvm] [SPIR-V] Fix BB ordering & register lifetime (PR #111026)

Sarah Spall via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 31 15:57:36 PDT 2024


Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>,
Nathan =?utf-8?q?Gauër?= <brioche at google.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/111026 at github.com>


spall wrote:

> Without looking into the case, just as an idea, the resolution probably should be better done in lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp to avoid `%"reg2mem alloca point" = call i32 @llvm.spv.bitcast.i32.i32(i32 %0)` in the first place. Otherwise the place to check is `insertBitcasts()` from lib/Target/SPIRV/SPIRVPreLegalizer.cpp. I may look into it on Monday-Tuesday if nobody resolves this until that.
> 
> @spall Can you please create an issue with a small reproducer or just insert this here.

I created an issue here: #114482 

https://github.com/llvm/llvm-project/pull/111026


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