[llvm] [AArch64] make REVD non-MOVPRFXable (PR #114430)
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Thu Oct 31 10:05:43 PDT 2024
https://github.com/Lukacma created https://github.com/llvm/llvm-project/pull/114430
This patch updates REVD instruction and makes it non-MOVPRFXable as per https://developer.arm.com/documentation/ddi0602/2024-06/SVE-Instructions/REVD--Reverse-64-bit-doublewords-in-elements--predicated--?lang=en
>From c5f336a848df9dc23cc5b2d42d163440f9fba715 Mon Sep 17 00:00:00 2001
From: Marian Lukac <Marian.Lukac at arm.com>
Date: Thu, 31 Oct 2024 16:51:51 +0000
Subject: [PATCH] [AArch64] make REVD non-movprfxable
---
llvm/lib/Target/AArch64/SMEInstrFormats.td | 2 --
llvm/test/MC/AArch64/SME/revd-diagnostics.s | 9 +++++++++
llvm/test/MC/AArch64/SME/revd.s | 17 +----------------
3 files changed, 10 insertions(+), 18 deletions(-)
diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td
index 54e64e3708223d..cbabf9b88de241 100644
--- a/llvm/lib/Target/AArch64/SMEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td
@@ -1429,8 +1429,6 @@ class sve2_int_perm_revd<string asm>
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
- let DestructiveInstType = DestructiveUnary;
- let ElementSize = ZPR128.ElementSize;
}
multiclass sve2_int_perm_revd<string asm, SDPatternOperator op> {
diff --git a/llvm/test/MC/AArch64/SME/revd-diagnostics.s b/llvm/test/MC/AArch64/SME/revd-diagnostics.s
index e7242e5dc1bbb3..6fd9af4fcd93fc 100644
--- a/llvm/test/MC/AArch64/SME/revd-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME/revd-diagnostics.s
@@ -27,3 +27,12 @@ revd z0.q, p0/m, z0.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: revd z0.q, p0/m, z0.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21, z25
+revd z21.q, p5/m, z10.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: revd z21.q, p5/m, z10.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME/revd.s b/llvm/test/MC/AArch64/SME/revd.s
index dc73da1142e84e..ad8a6cf9deb1a3 100644
--- a/llvm/test/MC/AArch64/SME/revd.s
+++ b/llvm/test/MC/AArch64/SME/revd.s
@@ -34,19 +34,4 @@ revd z31.q, p7/m, z31.q
// CHECK-INST: revd z31.q, p7/m, z31.q
// CHECK-ENCODING: [0xff,0x9f,0x2e,0x05]
// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: 052e9fff <unknown>
-
-// --------------------------------------------------------------------------//
-// Test compatibility with MOVPRFX instruction.
-
-movprfx z21, z25
-// CHECK-INST: movprfx z21, z25
-// CHECK-ENCODING: [0x35,0xbf,0x20,0x04]
-// CHECK-ERROR: instruction requires: sve or sme
-// CHECK-UNKNOWN: 0420bf35 <unknown>
-
-revd z21.q, p5/m, z10.q
-// CHECK-INST: revd z21.q, p5/m, z10.q
-// CHECK-ENCODING: [0x55,0x95,0x2e,0x05]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: 052e9555 <unknown>
+// CHECK-UNKNOWN: 052e9fff <unknown>
\ No newline at end of file
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