[llvm] [RISCV] Add missing hasPostISelHook = 1 to vector pseudos that might read FRM. (PR #114186)

[Philip Reames via llvm-commits]

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@@ -6504,7 +6504,7 @@ defm PseudoVFWMACCBF16  : VPseudoVWMAC_VV_VF_BF_RM;
 //===----------------------------------------------------------------------===//
 // 13.8. Vector Floating-Point Square-Root Instruction
 //===----------------------------------------------------------------------===//
-let mayRaiseFPException = true, hasSideEffects = 0 in
+let mayRaiseFPException = true, hasSideEffects = 0, hasPostISelHook = 1 in
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preames wrote:

It doesn't look like we have support for this today, but maybe we should add a target hook for this instead?  Having the post ISEL hook driven by tablgen (as opposed to a query on the underlying instruction), seems error prone.  Another idea might be a target specific consistency check before emission so at least we know at build time that pseudos and instructions are in sync?  

https://github.com/llvm/llvm-project/pull/114186