[llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 28 06:36:28 PDT 2024

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RKSimon wrote:

any more comments?

https://github.com/llvm/llvm-project/pull/112588

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