[llvm] [LLVM] Change Intrinsic::ID to encode target and intrinsic index (PR #113576)

[Alex Voicu via llvm-commits]

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@@ -275,7 +275,7 @@ enum {
   /// Check the operand is a specific intrinsic ID
   /// - InsnID(ULEB128) - Instruction ID
   /// - OpIdx(ULEB128) - Operand index
-  /// - IID(2) - Expected Intrinsic ID
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AlexVlx wrote:

> AMDGPU shouldn't mix r600 and amdgcn intrinsics, but there might be a handful remaining that do that mixing. @AlexVlx also wanted to use amdgcn intrinsics in spirv

We do use them for AMDGCN flavoured SPIR-V, but I admit I was not aware and have not really internalised what this change would imply in that context. I’ll try to parse it now.



https://github.com/llvm/llvm-project/pull/113576