[llvm] [DAG] SimplifyMultipleUseDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114389)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 31 06:31:40 PDT 2024
https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/114389
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