[llvm] [SelectionDAG] Add preliminary plumbing for `samesign` flag (PR #112354)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 31 11:25:17 PDT 2024
================
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -march=aarch64 -stop-after=finalize-isel -simplify-mir -o - %s | FileCheck %s
+
+define i1 @icmp_samesign(i32 %a, i32 %b) {
+ ; CHECK-LABEL: name: icmp_samesign
+ ; CHECK: bb.0 (%ir-block.0):
+ ; CHECK-NEXT: liveins: $w0, $w1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
+ ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY]], implicit-def $nzcv
+ ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
+ ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %res = icmp samesign ult i32 %a, %b
+ ret i1 %res
+}
+
+define <2 x i1> @icmp_samesign_vec(<2 x i32> %a, <2 x i32> %b) {
+ ; CHECK-LABEL: name: icmp_samesign_vec
+ ; CHECK: bb.0 (%ir-block.0):
+ ; CHECK-NEXT: liveins: $d0, $d1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d1
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0
+ ; CHECK-NEXT: [[CMHIv2i32_:%[0-9]+]]:fpr64 = CMHIv2i32 [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: $d0 = COPY [[CMHIv2i32_]]
+ ; CHECK-NEXT: RET_ReallyLR implicit $d0
+ %res = icmp samesign ult <2 x i32> %a, %b
----------------
tschuett wrote:
Could you please add a test without samesign?
https://github.com/llvm/llvm-project/pull/112354
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