[llvm] 670512b - [AArch64] Regenerate srem-lkk.ll to add missing asm comments
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 09:01:00 PDT 2024
Author: Simon Pilgrim
Date: 2024-10-28T16:00:45Z
New Revision: 670512b5c32217e37796fd8d42101ac24cdb4a8d
URL: https://github.com/llvm/llvm-project/commit/670512b5c32217e37796fd8d42101ac24cdb4a8d
DIFF: https://github.com/llvm/llvm-project/commit/670512b5c32217e37796fd8d42101ac24cdb4a8d.diff
LOG: [AArch64] Regenerate srem-lkk.ll to add missing asm comments
Reduces diff in #112588
Added:
Modified:
llvm/test/CodeGen/AArch64/srem-lkk.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/srem-lkk.ll b/llvm/test/CodeGen/AArch64/srem-lkk.ll
index 5ff178937ebbfb..d9f91449dffb80 100644
--- a/llvm/test/CodeGen/AArch64/srem-lkk.ll
+++ b/llvm/test/CodeGen/AArch64/srem-lkk.ll
@@ -4,14 +4,14 @@
define i32 @fold_srem_positive_odd(i32 %x) {
; CHECK-LABEL: fold_srem_positive_odd:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37253
+; CHECK-NEXT: mov w8, #37253 // =0x9185
; CHECK-NEXT: movk w8, #44150, lsl #16
; CHECK-NEXT: smull x8, w0, w8
; CHECK-NEXT: lsr x8, x8, #32
; CHECK-NEXT: add w8, w8, w0
; CHECK-NEXT: asr w9, w8, #6
; CHECK-NEXT: add w8, w9, w8, lsr #31
-; CHECK-NEXT: mov w9, #95
+; CHECK-NEXT: mov w9, #95 // =0x5f
; CHECK-NEXT: msub w0, w8, w9, w0
; CHECK-NEXT: ret
%1 = srem i32 %x, 95
@@ -22,13 +22,13 @@ define i32 @fold_srem_positive_odd(i32 %x) {
define i32 @fold_srem_positive_even(i32 %x) {
; CHECK-LABEL: fold_srem_positive_even:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #36849
+; CHECK-NEXT: mov w8, #36849 // =0x8ff1
; CHECK-NEXT: movk w8, #15827, lsl #16
; CHECK-NEXT: smull x8, w0, w8
; CHECK-NEXT: lsr x9, x8, #63
; CHECK-NEXT: asr x8, x8, #40
; CHECK-NEXT: add w8, w8, w9
-; CHECK-NEXT: mov w9, #1060
+; CHECK-NEXT: mov w9, #1060 // =0x424
; CHECK-NEXT: msub w0, w8, w9, w0
; CHECK-NEXT: ret
%1 = srem i32 %x, 1060
@@ -39,13 +39,13 @@ define i32 @fold_srem_positive_even(i32 %x) {
define i32 @fold_srem_negative_odd(i32 %x) {
; CHECK-LABEL: fold_srem_negative_odd:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #65445
+; CHECK-NEXT: mov w8, #65445 // =0xffa5
; CHECK-NEXT: movk w8, #42330, lsl #16
; CHECK-NEXT: smull x8, w0, w8
; CHECK-NEXT: lsr x9, x8, #63
; CHECK-NEXT: asr x8, x8, #40
; CHECK-NEXT: add w8, w8, w9
-; CHECK-NEXT: mov w9, #-723
+; CHECK-NEXT: mov w9, #-723 // =0xfffffd2d
; CHECK-NEXT: msub w0, w8, w9, w0
; CHECK-NEXT: ret
%1 = srem i32 %x, -723
@@ -56,13 +56,13 @@ define i32 @fold_srem_negative_odd(i32 %x) {
define i32 @fold_srem_negative_even(i32 %x) {
; CHECK-LABEL: fold_srem_negative_even:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #62439
+; CHECK-NEXT: mov w8, #62439 // =0xf3e7
; CHECK-NEXT: movk w8, #64805, lsl #16
; CHECK-NEXT: smull x8, w0, w8
; CHECK-NEXT: lsr x9, x8, #63
; CHECK-NEXT: asr x8, x8, #40
; CHECK-NEXT: add w8, w8, w9
-; CHECK-NEXT: mov w9, #-22981
+; CHECK-NEXT: mov w9, #-22981 // =0xffffa63b
; CHECK-NEXT: msub w0, w8, w9, w0
; CHECK-NEXT: ret
%1 = srem i32 %x, -22981
@@ -74,14 +74,14 @@ define i32 @fold_srem_negative_even(i32 %x) {
define i32 @combine_srem_sdiv(i32 %x) {
; CHECK-LABEL: combine_srem_sdiv:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #37253
+; CHECK-NEXT: mov w8, #37253 // =0x9185
; CHECK-NEXT: movk w8, #44150, lsl #16
; CHECK-NEXT: smull x8, w0, w8
; CHECK-NEXT: lsr x8, x8, #32
; CHECK-NEXT: add w8, w8, w0
; CHECK-NEXT: asr w9, w8, #6
; CHECK-NEXT: add w8, w9, w8, lsr #31
-; CHECK-NEXT: mov w9, #95
+; CHECK-NEXT: mov w9, #95 // =0x5f
; CHECK-NEXT: msub w9, w8, w9, w0
; CHECK-NEXT: add w0, w9, w8
; CHECK-NEXT: ret
@@ -95,14 +95,14 @@ define i32 @combine_srem_sdiv(i32 %x) {
define i64 @dont_fold_srem_i64(i64 %x) {
; CHECK-LABEL: dont_fold_srem_i64:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov x8, #58849
+; CHECK-NEXT: mov x8, #58849 // =0xe5e1
; CHECK-NEXT: movk x8, #48148, lsl #16
; CHECK-NEXT: movk x8, #33436, lsl #32
; CHECK-NEXT: movk x8, #21399, lsl #48
; CHECK-NEXT: smulh x8, x0, x8
; CHECK-NEXT: asr x9, x8, #5
; CHECK-NEXT: add x8, x9, x8, lsr #63
-; CHECK-NEXT: mov w9, #98
+; CHECK-NEXT: mov w9, #98 // =0x62
; CHECK-NEXT: msub x0, x8, x9, x0
; CHECK-NEXT: ret
%1 = srem i64 %x, 98
More information about the llvm-commits
mailing list