[llvm] [AMDGPU][True16][MC] VOP2 update instructions with fake16 format (PR #114436)

via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 1 07:20:08 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff 8951b51402d17af1f97e5804f60c946e624650d6 8b802777b23c0b0f7ecb58b7fd42ee3a26b7ce35 --extensions cpp -- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index ccb2f1742f..d19a7efb8d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3852,9 +3852,10 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineInstr &MI,
     return MIB;
   }
 
-  assert(Opc != AMDGPU::V_FMAC_F16_fake16_e32 &&
-         "V_FMAC_F16_fake16_e32 is not supported and not expected to be present "
-         "pre-RA");
+  assert(
+      Opc != AMDGPU::V_FMAC_F16_fake16_e32 &&
+      "V_FMAC_F16_fake16_e32 is not supported and not expected to be present "
+      "pre-RA");
 
   // Handle MAC/FMAC.
   bool IsF16 = Opc == AMDGPU::V_MAC_F16_e32 || Opc == AMDGPU::V_MAC_F16_e64 ||

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https://github.com/llvm/llvm-project/pull/114436


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