[llvm] [SPIR-V] Fix BB ordering & register lifetime (PR #111026)
Steven Perron via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 09:57:57 PDT 2024
Nathan =?utf-8?q?Gau=C3=ABr?= <brioche at google.com>,
Nathan =?utf-8?q?Gau=C3=ABr?= <brioche at google.com>,
Nathan =?utf-8?q?Gau=C3=ABr?= <brioche at google.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/111026 at github.com>
================
@@ -162,20 +163,30 @@ void SPIRVPassConfig::addIRPasses() {
TargetPassConfig::addIRPasses();
if (TM.getSubtargetImpl()->isVulkanEnv()) {
+ addPass(createRegToMemWrapperPass());
----------------
s-perron wrote:
Why do you call this twice? Can you simple do the second one?
https://github.com/llvm/llvm-project/pull/111026
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