The Week Of Monday 29 July 2024 Archives by author

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Starting: Mon Jul 29 00:09:31 PDT 2024
Ending: Sun Aug 4 23:57:42 PDT 2024
Messages: 5176

• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [clang] [llvm] Finish deleting the le32/le64 targets (PR #98497)   Aaron Ballman via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   Aaron Ballman via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   Abhina Sree via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS (PR #101696)   Abhina Sree via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   Abinaya Saravanan via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Adhemerval Zanella via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Enable flang builds on Windows (PR #101344)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Fix problem with python installation on macos-14 (PR #101774)   Aiden Grossman via llvm-commits
• [llvm] [llvm-locstats] Switch shebang from python to python3 (PR #101864)   Aiden Grossman via llvm-commits
• [llvm] [llvm-locstats] Switch shebang from python to python3 (PR #101864)   Aiden Grossman via llvm-commits
• [flang] [llvm] [mlir] [OpenMP]Update use_device_clause lowering (PR #101171)   Akash Banerjee via llvm-commits
• [flang] [llvm] [mlir] [OpenMP]Update use_device_clause lowering (PR #101171)   Akash Banerjee via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Akira Hatanaka via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Alan Zhao via llvm-commits
• [llvm] [RISCV] Remove registers from ins of Priv instructions. (PR #100857)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Alex Bradbury via llvm-commits
• [compiler-rt] 96b1ae8 - [compiler-rt][RISCV][NFC] Add link to kernel documenation on hwprobe interface   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [clang] [llvm] [APFloat] Add support for f8E3M4 IEEE 754 type (PR #99698)   Alexander Pivovarov via llvm-commits
• [compiler-rt] [compiler-rt] Call __sys_mmap in internal_mmap on FreeBSD (PR #84438)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Call __sys_mmap in internal_mmap on FreeBSD (PR #84438)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Update AllSupportedArchDefs.cmake for FreeBSD (PR #84280)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Update AllSupportedArchDefs.cmake for FreeBSD (PR #84280)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (PR #101662)   Alexander Richardson via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Alexander Shaposhnikov via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Alexander Shaposhnikov via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add tests to check with an increased batch size (PR #100851)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add tests to check with an increased batch size (PR #100851)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add tests to check with an increased batch size (PR #100851)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add tests to check with an increased batch size (PR #100851)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Alexander Yermolovich via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   Alexandre Ganea via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-config] Quote and escape paths (PR #97305)   Alexandre Ganea via llvm-commits
• [llvm] [DenseMap] Optimize find/erase (PR #100517)   Alexandre Ganea via llvm-commits
• [llvm] [DenseMap] Optimize find/erase (PR #100517)   Alexandre Ganea via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   Alexandros Lamprineas via llvm-commits
• [llvm] [SLP]Remove ExtraArgs from reductions. (PR #99923)   Alexey Bataev via llvm-commits
• [llvm] [SLP][REVEC] Disable strided load if the source is vector instruction. (PR #99462)   Alexey Bataev via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove ExtraArgs from reductions. (PR #99923)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   Alexey Bataev via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)   Alexey Bataev via llvm-commits
• [llvm] f70f122 - [SLP]Fix PR101213: Reuse extractelement, only if its vector operand comes before new vector value.   Alexey Bataev via llvm-commits
• [llvm] a6ef086 - Revert "[SLP]Fix PR101213: Reuse extractelement, only if its vector operand comes before new vector value."   Alexey Bataev via llvm-commits
• [llvm] 6b1d137 - [SLP]Fix PR101213: Reuse extractelement, only if its vector operand comes before new vector value.   Alexey Bataev via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [llvm] deb3ecf - [SLP][NFC]Add a test with the reduction of strided load, NFC.   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support vectorization of small strided loads only graph. (PR #101659)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Try detect strided loads, if any pointer op require extraction. (PR #101668)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Alexey Bataev via llvm-commits
• [llvm] [LV]Process alloca in isPredicatedInst for tail-folded analysis. (PR #101743)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   Alexey Bataev via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   Alexey Bataev via llvm-commits
• [llvm] [MC] Move some bool members to MCFragment. NFC (PR #100976)   Alexis Engelke via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Alexis Engelke via llvm-commits
• [llvm] [Support][NFC] Simplify DomTreeNodeBase::addChild (PR #101056)   Alexis Engelke via llvm-commits
• [llvm] [Suppprt][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Alexis Engelke via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Alexis Engelke via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Alexis Engelke via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Alexis Engelke via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Alexis Engelke via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Alexis Engelke via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Alexis Engelke via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Alexis Engelke via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Alexis Engelke via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Alexis Engelke via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Alexis Engelke via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Alexis Engelke via llvm-commits
• [llvm] [Mem2Reg] Replace block maps with block numbers (PR #101391)   Alexis Engelke via llvm-commits
• [llvm] [Mem2Reg] Replace block maps with block numbers (PR #101391)   Alexis Engelke via llvm-commits
• [llvm] [FastISel] Don't use sizeWithoutDebug() for debug records (PR #101648)   Alexis Engelke via llvm-commits
• [llvm] [VP] Merge ExpandVP pass into PreISelIntrinsicLowering (PR #101652)   Alexis Engelke via llvm-commits
• [llvm] [FastISel] Don't use sizeWithoutDebug() for debug records (PR #101648)   Alexis Engelke via llvm-commits
• [llvm] [LegacyPM] Drop analysis groups (PR #101670)   Alexis Engelke via llvm-commits
• [llvm] [LegacyPM] Drop analysis groups (PR #101670)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [Support] Use block numbers for DomTree construction (PR #101706)   Alexis Engelke via llvm-commits
• [llvm] [Support] Use block numbers for DomTree construction (PR #101706)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Alexis Engelke via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen][NFC] Add wrapper method for MBBMap (PR #101893)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Alexis Engelke via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Alexis Engelke via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen][NFC] Add wrapper method for MBBMap (PR #101893)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Alexis Engelke via llvm-commits
• [llvm] [SandboxIR] Implement GetElementPtrInst (PR #101078)   Alina Sbirlea via llvm-commits
• [llvm] [SandboxIR] Implement CastInst (PR #101097)   Alina Sbirlea via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   Amara Emerson via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   Amara Emerson via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   Amara Emerson via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   Amara Emerson via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   Amara Emerson via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Amara Emerson via llvm-commits
• [llvm] [BOLT][NFC] Keep input icount for disassembled functions (PR #101091)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Add timers for MetadataManager invocations (PR #101267)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Add timers for MetadataManager invocations (PR #101267)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Add timers for MetadataManager invocations (PR #101267)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Print timers in perf2bolt invocation (PR #101270)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Print timers in perf2bolt invocation (PR #101270)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add parallelization for processing of DWO debug information (PR #100282)   Amir Ayupov via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   Amit Kumar Pandey via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   Amit Kumar Pandey via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   Amit Kumar Pandey via llvm-commits
• [llvm] [PowerPC][GlobalMerge] Reduce TOC usage by merging internal and private global data (PR #95438)   Amy Kwan via llvm-commits
• [llvm] [PowerPC][GlobalMerge] Reduce TOC usage by merging internal and private global data (PR #95438)   Amy Kwan via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   Amy Kwan via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   Amy Kwan via llvm-commits
• [llvm] [InstCombine] Reduce range of ctpop for non zero argument (PR #100899)   Andreas Jonson via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   Anton Sidorenko via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Simplify with.overflow intrinsics with assumption information (PR #84016)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Antonio Frighetto via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Antonio Frighetto via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Emit `NVPTXISD::DYNAMIC_STACKALLOC`'s chain (PR #101714)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   Artem Belevich via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Artem Pianykh via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement IntToPtrInst (PR #101359)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement FPToSIInst (PR #101362)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement FPToUIInst (PR #101369)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Move BasicBlock class definition up (PR #101422)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Move BasicBlock class definition up (PR #101422)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   Arthur Eubanks via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   Arthur Eubanks via llvm-commits
• [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement the remaining CastInst sub-classes (PR #101537)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Arthur Eubanks via llvm-commits
• [llvm] Implement missing PHINode functions (PR #101734)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   Arthur Eubanks via llvm-commits
• [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Avi Kivity via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Avi Kivity via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Avi Kivity via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Avi Kivity via llvm-commits
• [llvm] [BOLT] Fix C2360 compiler error with MSVC in Relocation.cpp (PR #101235)   Benji Smith via llvm-commits
• [llvm] uintptr_t to pointer cast: fix compilation error. (PR #101497)   Benoit Jacob via llvm-commits
• [llvm] uintptr_t to pointer cast: fix compilation error. (PR #101497)   Benoit Jacob via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)   Bernhard Kaindl via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)   Bernhard Kaindl via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Björn Pettersson via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Björn Pettersson via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Björn Pettersson via llvm-commits
• [llvm] [llvm-c] Add getters for LLVMContextRef for various types (PR #99087)   Bogdan-Alexandru Geană via llvm-commits
• [llvm] [MIPS] Fix missing ANDI optimization (PR #97689)   Brad Smith via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Brandon Wu via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Brandon Wu via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Brandon Wu via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Brandon Wu via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Brandon Wu via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Support f16 vmv.v.v and vmerge.vvm intrinsics with Zvfhmin. (PR #101457)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (PR #101633)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (PR #101633)   Brandon Wu via llvm-commits
• [llvm] [Hexagon] Fix concat lowering for HVX for 64B vector length (PR #98318)   Brian Cain via llvm-commits
• [compiler-rt] [compiler-rt] Call __sys_mmap in internal_mmap on FreeBSD (PR #84438)   Brooks Davis via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Brox Chen via llvm-commits
• [llvm] tmp (PR #101678)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][CodeGen] Support VOP1 Fake16 ISA (PR #101678)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][CodeGen] Support VOP1 Fake16 ISA (PR #101678)   Brox Chen via llvm-commits
• [llvm] 79996cd - [AMDGPU] Pre-commit tests for #101157. NFC   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Changpeng Fang via llvm-commits
• [llvm] [NFC] fix build failure (PR #100993)   Chen Zheng via llvm-commits
• [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Chen Zheng via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   Chen Zheng via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Chen Zheng via llvm-commits
• [llvm] [AIX]export function descriptor symbols related to template functions. (PR #101920)   Chen Zheng via llvm-commits
• [llvm] [AIX]export function descriptor symbols related to template functions. (PR #101920)   Chen Zheng via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Chen Zheng via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Chen Zheng via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Chen Zheng via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Chen Zheng via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Chen Zheng via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Chen Zheng via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Chen Zheng via llvm-commits
• [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)   Chinmay Deshpande via llvm-commits
• [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)   Chinmay Deshpande via llvm-commits
• [llvm] `InOrderIssueStage` for llvm-mca should be genric over LSUnitBase (PR #101534)   Chinmay Deshpande via llvm-commits
• [llvm] `InOrderIssueStage` for llvm-mca should be generic over LSUnitBase (PR #101534)   Chinmay Deshpande via llvm-commits
• [compiler-rt] [Sanitizers] Avoid overload ambiguity for interceptors (PR #100986)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Make sure rtsan gets initialized on mac (PR #100188)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Make sure rtsan gets initialized on mac (PR #100188)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Make sure rtsan gets initialized on mac (PR #100188)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking Attribute and RealtimeSanitizer pass (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Chris Apple via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Chris B via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Chris B via llvm-commits
• [llvm] [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (PR #101085)   Chris B via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Chris B via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Chris B via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Chris B via llvm-commits
• [llvm] [DirectX] Add triples to two tests after #97593 (PR #101779)   Chris B via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Christopher Ferris via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101617)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101617)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101618)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101618)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101618)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101617)   Christudasan Devadasan via llvm-commits
• [llvm] [WIP] v_lshrrev uses vector register operand in wave space after scaling offset materialization in v_mad (PR #101649)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in the shift operation (PR #101649)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)   Christudasan Devadasan via llvm-commits
• [llvm] [RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (PR #100966)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove registers from ins of Priv instructions. (PR #100857)   Craig Topper via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (PR #101029)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Craig Topper via llvm-commits
• [llvm] [LegalizeDAG][X86][AArch64][LoongArch] Freeze index when converting extract_elt/extract_subvector to load/store on stack. (PR #88985)   Craig Topper via llvm-commits
• [llvm] [RISCV] Qualify all XCV predicates with !is64Bit. (PR #101074)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (PR #101080)   Craig Topper via llvm-commits
• [llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)   Craig Topper via llvm-commits
• [llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)   Craig Topper via llvm-commits
• [llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Fix break of vnsrl pattern in issue #94265 (PR #95563)   Craig Topper via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Craig Topper via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Craig Topper via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [RISCV] Qualify all XCV predicates with !is64Bit. (PR #101074)   Craig Topper via llvm-commits
• [llvm] [RISCV] Qualify all XCV predicates with !is64Bit. (PR #101074)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (PR #101080)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Craig Topper via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Craig Topper via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] 76a15e5 - [RISCV] Keep all the setOperationActions for the same types and opcodes together.   Craig Topper via llvm-commits
• [llvm] 99fb40d - [RISCV] Merge more rv32/rv64 intrtinsic tests that have (or should have) the same content. NFC   Craig Topper via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   Craig Topper via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove isel patterns for riscv.vfmerge with vector-vector operands. (PR #101277)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove isel patterns for riscv.vfmerge with vector-vector operands. (PR #101277)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Craig Topper via llvm-commits
• [llvm] [Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (PR #97070)   Craig Topper via llvm-commits
• [llvm] [Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (PR #97070)   Craig Topper via llvm-commits
• [llvm] [Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (PR #97070)   Craig Topper via llvm-commits
• [llvm] [Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (PR #97070)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Craig Topper via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use X0 for VLMax for slide1up/slide1down in lowerVectorIntrinsicScalars. (PR #101384)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use X0 for VLMax for slide1up/slide1down in lowerVectorIntrinsicScalars. (PR #101384)   Craig Topper via llvm-commits
• [llvm] [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (PR #101401)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Craig Topper via llvm-commits
• [llvm] c2dc46c - [TableGen] Pass ValueTypeByHwMode by const reference in a couple places. NFC   Craig Topper via llvm-commits
• [llvm] 24f8d10 - [TableGen] Add an explicit cast to allow one TypeSetByHwMode constructor to be removed. NFC   Craig Topper via llvm-commits
• [llvm] 26766a0 - [RISCV] Remove unncessary FP extensions from some integer only vector tests.   Craig Topper via llvm-commits
• [llvm] 65d3c22 - [RISCV] Merge more rv32/rv64 intrinsic tests that have the same content. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Slightly simplify the regbank selection for G_LOAD/STORE. NFC (PR #101431)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [TargetLowering] Remove weird use of MVT::isVoid in an assert. (PR #101436)   Craig Topper via llvm-commits
• [llvm] [TargetLowering] Remove weird use of MVT::isVoid in an assert. (PR #101436)   Craig Topper via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Craig Topper via llvm-commits
• [llvm] [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (PR #101401)   Craig Topper via llvm-commits
• [llvm] [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (PR #101401)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Slightly simplify the regbank selection for G_LOAD/STORE. NFC (PR #101431)   Craig Topper via llvm-commits
• [llvm] [TargetLowering] Remove weird use of MVT::isVoid in an assert. (PR #101436)   Craig Topper via llvm-commits
• [llvm] [MIR] Remove separate Size variable from parseMachineMemoryOperand. NFC (PR #101453)   Craig Topper via llvm-commits
• [llvm] 9d068f7 - [RISCV] Remove Zfbfmin from some vector test RUN lines. NFC   Craig Topper via llvm-commits
• [llvm] [MIR] Remove separate Size variable from parseMachineMemoryOperand. NFC (PR #101453)   Craig Topper via llvm-commits
• [llvm] 04e8433 - [RISCV] Add vector bf16 load/store intrinsic tests. NFC   Craig Topper via llvm-commits
• [llvm] 84a3739 - [RISCV] Replace Zvfh with Zvfhmin on vector load/store intrinsic tests. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Support f16 vmv.v.v and vmerge.vvm intrinsics with Zvfhmin. (PR #101457)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)   Craig Topper via llvm-commits
• [llvm] [RISC-V][GISEL] Select G_BITCAST for scalable vectors (PR #101486)   Craig Topper via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support f16 vmv.v.v and vmerge.vvm intrinsics with Zvfhmin. (PR #101457)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Don't custom legalize load/store of vector of pointers if ELEN < XLEN. (PR #101565)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support nxv16p0 for RV32. (PR #101573)   Craig Topper via llvm-commits
• [llvm] Optimize count leading ones if promoted type (PR #99591)   Craig Topper via llvm-commits
• [llvm] Optimize count leading ones if promoted type (PR #99591)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfieldn extraction (PR #101605)   Craig Topper via llvm-commits
• [llvm] 358593b - [TableGen] Use std::move. NFC   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (PR #101633)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (PR #101633)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Support `vrgather` and `vcompress` for `zvfhmin` and `zvfbfmin` (PR #101633)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   Craig Topper via llvm-commits
• [clang] [compiler-rt] [llvm] [RISCV] Support new groupid/bitmask for cpu_model (PR #101632)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Create an ISD::ADD instead of an ISD::UADDO with unused overflow result. (PR #100647)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (shr (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] 1a9acd7 - [RISCV] Capitalize some variable names. NFC   Craig Topper via llvm-commits
• [llvm] 766f68d - [RISCV] Invert if conditions in the switch in RISCVDAGToDAGISel::hasAllNBitUsers. NFC   Craig Topper via llvm-commits
• [llvm] c03bf2c - [RISCV] Improve hasAllNBitUsers for users of SLLI.   Craig Topper via llvm-commits
• [llvm] [Metadata] Use const APInt &. NFC (PR #101865)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)   Craig Topper via llvm-commits
• [llvm] [Metadata] Use const APInt &. NFC (PR #101865)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support nxv16p0 for RV32. (PR #101573)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Craig Topper via llvm-commits
• [llvm] [MIPS] Fix missing ANDI optimization (PR #97689)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Craig Topper via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Craig Topper via llvm-commits
• [llvm] [LICM] Prevent LICM of ptrtoint and inttoptr when using non-integral pointers (PR #97272)   Csanád Hajdú via llvm-commits
• [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)   Csanád Hajdú via llvm-commits
• [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)   Csanád Hajdú via llvm-commits
• [llvm] [LICM] Prevent LICM of ptrtoint and inttoptr when using non-integral pointers (PR #97272)   Csanád Hajdú via llvm-commits
• [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)   Csanád Hajdú via llvm-commits
• [llvm] [CMake] Workaround the incompatibility for executable exports (PR #101741)   Cyndy Ishida via llvm-commits
• [llvm] [TextAPI] Add an assertion for adding duplicate libraries into a single TBD file (PR #101744)   Cyndy Ishida via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Damyan Pepper via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Damyan Pepper via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Damyan Pepper via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Damyan Pepper via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Damyan Pepper via llvm-commits
• [llvm] [MachO] Fix copy-paste condition in bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Fix copy-paste condition in bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Fix copy-paste condition in bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Remove redundant bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Remove redundant bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Remove redundant bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [llvm] [MachO] Remove redundant bounds check (PR #100176)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Daniel Bertalan via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Daniel Martinez via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Daniel Martinez via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Daniel Martinez via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Daniel Martinez via llvm-commits
• [compiler-rt] remove mallopt from nsan_interceptors (PR #101055)   Daniel Martinez via llvm-commits
• [llvm] Allow flang-new binary to be specified for omp fortran modules (PR #101438)   Daniel Martinez via llvm-commits
• [lld] [lld][InstrProf] Add "Separate" irpgo-profile-sort option (PR #101084)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Daniel Thornburgh via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Daniel Thornburgh via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Daniel Thornburgh via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Daniel Woodworth via llvm-commits
• [llvm] [Inliner] Fix bugs for partial inlining with vector (PR #101481)   Daniil Fukalov via llvm-commits
• [llvm] [PAC][test] Add tests against Linux triples for auth/resign lowering (PR #100744)   Daniil Kovalev via llvm-commits
• [llvm] [PAC][test] Add tests against Linux triples for auth/resign lowering (PR #100744)   Daniil Kovalev via llvm-commits
• [llvm] [PAC][test] Add tests against Linux triples for auth/resign lowering (PR #100744)   Daniil Kovalev via llvm-commits
• [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT (PR #96164)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [PAC][clang][Driver] Add signed GOT flag (PR #96160)   Daniil Kovalev via llvm-commits
• [lld] [PAC][lld][AArch64][ELF] Support signed GOT (PR #96169)   Daniil Kovalev via llvm-commits
• [clang] [compiler-rt] [llvm] [PAC][AArch64] Support init/fini array signing (PR #96478)   Daniil Kovalev via llvm-commits
• [clang] [compiler-rt] [llvm] [PAC][AArch64] Support init/fini array signing (PR #96478)   Daniil Kovalev via llvm-commits
• [compiler-rt] Don't pass null pointers to memcmp and memcpy in libFuzzer (PR #96775)   David Benjamin via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)   David Blaikie via llvm-commits
• [llvm] [DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (PR #101197)   David Blaikie via llvm-commits
• [llvm] [DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (PR #101197)   David Blaikie via llvm-commits
• [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [llvm] 45ef0d4 - Add llvm::Error C API, LLVMCantFail   David Blaikie via llvm-commits
• [llvm] [DebugInfo] (Always) include the dwo name in the hash (PR #100375)   David Blaikie via llvm-commits
• [llvm] [DebugInfo] (Always) include the dwo name in the hash (PR #100375)   David Blaikie via llvm-commits
• [llvm] [DebugInfo] (Always) include the dwo name in the hash (PR #100375)   David Blaikie via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (lambda-free, and less locking) (PR #97640)   David Blaikie via llvm-commits
• [llvm] Add __attribute__((warn_unused_result)) to LLVMErrorRef (PR #87025)   David Blaikie via llvm-commits
• [llvm] SLPVectorizer comparator reordering (PR #84969)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [llvm] ADT: Add non-const overload of PackedVector::raw_bits() (PR #101742)   David Blaikie via llvm-commits
• [llvm] Add support for verifying .debug_names in split DWARF for CUs and TUs. (PR #101775)   David Blaikie via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   David Blaikie via llvm-commits
• [compiler-rt] [compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (PR #101072)   David CARLIER via llvm-commits
• [llvm] [ARM] Add scalar add_sat costs. (PR #100988)   David Green via llvm-commits
• [llvm] TTI: Fix special casing vectorization costs of saturating add/sub (PR #97463)   David Green via llvm-commits
• [llvm] [AArch64] Remove special-case inserted shuffle cost. (PR #100537)   David Green via llvm-commits
• [llvm] [AArch64] Remove special-case inserted shuffle cost. (PR #100537)   David Green via llvm-commits
• [llvm] [SLP] Order clustered load base pointers by ascending offsets (PR #100653)   David Green via llvm-commits
• [llvm] [SLP] Order clustered load base pointers by ascending offsets (PR #100653)   David Green via llvm-commits
• [llvm] [StackFrameLayoutAnalysis] Support more SlotTypes (PR #100562)   David Green via llvm-commits
• [llvm] [StackFrameLayoutAnalysis] Support more SlotTypes (PR #100562)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   David Green via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   David Green via llvm-commits
• [llvm] [SLP] Order clustered load base pointers by ascending offsets (PR #100653)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   David Green via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   David Green via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   David Green via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   David Green via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   David Green via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   David Green via llvm-commits
• [llvm] [ARM] Add scalar add_sat costs. (PR #100988)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   David Green via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   David Green via llvm-commits
• [llvm] [DAG] Add legalization handling for ABDS/ABDU (PR #92576)   David Green via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   David Green via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   David Green via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Select SHL({Z|S}EXT, DUP Imm) into {U|S}HLL Imm (PR #96782)   David Green via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   David Green via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   David Green via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   David Green via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   David Green via llvm-commits
• [llvm] c7c5e05 - [AArch64] Format comment to fit into line-length. NFC   David Green via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   David Green via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   David Green via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   David Green via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   David Green via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   David Green via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   David Li via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   David Li via llvm-commits
• [llvm] 6f318d4 - [NVPTX] Make minimum/maximum work on older GPUs   David Majnemer via llvm-commits
• [llvm] [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (PR #101085)   David Peixotto via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD* (PR #101393)   David Peixotto via llvm-commits
• [llvm] [DenseMap] Optimize find/erase (PR #100517)   David Peixotto via llvm-commits
• [llvm] 19b785b - Revert "[AArch64] Remove special-case inserted shuffle cost."   David Spickett via llvm-commits
• [llvm] d1f3a92 - Revert "[AArch64] Remove special-case inserted shuffle cost."   David Spickett via llvm-commits
• [llvm] [llvm][SandboxIR] Fix some clang-cl warnings on Windows (PR #101660)   David Spickett via llvm-commits
• [llvm] [llvm][SandboxIR] Fix some clang-cl warnings on Windows (PR #101660)   David Spickett via llvm-commits
• [llvm] [llvm][SandboxIR] Fix some clang-cl warnings on Windows (PR #101660)   David Spickett via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   David Spickett via llvm-commits
• [llvm] [FastISel] Don't use sizeWithoutDebug() for debug records (PR #101648)   David Tellenbach via llvm-commits
• [llvm] [RegisterCoalescer] Fix SUBREG_TO_REG handling in the RegisterCoalescer. (PR #96839)   David Tenty via llvm-commits
• [llvm] [NFC][llvm][support] rename INFINITY in regcomp (PR #101758)   David Tenty via llvm-commits
• [llvm] [NFC][llvm][support] rename INFINITY in regcomp (PR #101758)   David Tenty via llvm-commits
• [llvm] [BOLT][NFC] Add timers for MetadataManager invocations (PR #101267)   Davide Italiano via llvm-commits
• [llvm] AMDGPU: Add some baseline cost model tests (PR #100797)   Diana Picus via llvm-commits
• [compiler-rt] 2c376fe - [InstrProf] Remove duplicate definition of IntPtrT   Dimitry Andric via llvm-commits
• [compiler-rt] [compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (PR #101072)   Dimitry Andric via llvm-commits
• [compiler-rt] [compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (PR #101072)   Dimitry Andric via llvm-commits
• [llvm] [AArch64] Fix widening error for masked load/store integer scalable ve… (PR #99354)   Dinar Temirbulatov via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   Dmitry Chestnykh via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   Eleanor Bonnici via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   Eleanor Bonnici via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Eli Friedman via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Eli Friedman via llvm-commits
• [llvm] [CodeGen][ARM64EC] Use alias symbol for exporting hybrid_patchable functions. (PR #100872)   Eli Friedman via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Eli Friedman via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Eli Friedman via llvm-commits
• [llvm] [TargetLowering] Remove weird use of MVT::isVoid in an assert. (PR #101436)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Eli Friedman via llvm-commits
• [llvm] [MIR] Remove separate Size variable from parseMachineMemoryOperand. NFC (PR #101453)   Eli Friedman via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Eli Friedman via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Eli Friedman via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   Eli Friedman via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   Eli Friedman via llvm-commits
• [llvm] [BinaryFormat] Disable MachOTest.UnalignedLC on SPARC (PR #100086)   Eli Friedman via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Eli Friedman via llvm-commits
• [lld] [lld][InstrProf] Add "Separate" irpgo-profile-sort option (PR #101084)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Ellis Hoag via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Ellis Hoag via llvm-commits
• [lld] [lld][InstrProf] Add "Separate" irpgo-profile-sort option (PR #101084)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Ellis Hoag via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Ellis Hoag via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Evgenii Kudriashov via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Evgenii Kudriashov via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Evgenii Kudriashov via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Evgenii Kudriashov via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Evgenii Kudriashov via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Evgenii Kudriashov via llvm-commits
• [llvm] [LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (PR #100984)   Fabian Ritter via llvm-commits
• [llvm] [LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (PR #100984)   Fabian Ritter via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Fanbo Meng via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS in Clang (PR #96063)   Fanbo Meng via llvm-commits
• [llvm] [MC] Move some bool members to MCFragment. NFC (PR #100976)   Fangrui Song via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   Fangrui Song via llvm-commits
• [compiler-rt] remove mallopt from nsan_interceptors (PR #101055)   Fangrui Song via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   Fangrui Song via llvm-commits
• [lld] [LLD] Add CLASS syntax to SECTIONS (PR #95323)   Fangrui Song via llvm-commits
• [lld] [RISCV][ELF] Set maximum page size to 65536 (PR #100995)   Fangrui Song via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   Fangrui Song via llvm-commits
• [compiler-rt] [nsan] Remove mallopt from nsan_interceptors (PR #101055)   Fangrui Song via llvm-commits
• [compiler-rt] [nsan] Remove mallopt from nsan_interceptors (PR #101055)   Fangrui Song via llvm-commits
• [compiler-rt] [nsan] Remove mallopt from nsan_interceptors (PR #101055)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [llvm] [AArch64, ELF] Allow implicit $d/$x at section beginning (PR #99718)   Fangrui Song via llvm-commits
• [llvm] [AArch64, ELF] Allow implicit $d/$x at section beginning (PR #99718)   Fangrui Song via llvm-commits
• [llvm] [AArch64, ELF] Allow implicit $d/$x at section beginning (PR #99718)   Fangrui Song via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Fangrui Song via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Fangrui Song via llvm-commits
• [llvm] b7db119 - [MC,ARM] Change a report_fatal_error to reportError   Fangrui Song via llvm-commits
• [llvm] 4eb5450 - Revert "[MC] Compute fragment offsets eagerly"   Fangrui Song via llvm-commits
• [llvm] 6c7557d - [DXIL] Fix -Wunused-but-set-variable after #97593   Fangrui Song via llvm-commits
• [llvm] cc01c83 - [MC,test] Add a stress test for layout algorithm   Fangrui Song via llvm-commits
• [llvm] be5a845 - [MC] Compute fragment offsets eagerly   Fangrui Song via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   Fangrui Song via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Fangrui Song via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Fangrui Song via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Fangrui Song via llvm-commits
• [llvm] [Object] Refine isData/isBSS criteria (PR #101290)   Fangrui Song via llvm-commits
• [llvm] [Object] Refine isData/isBSS criteria (PR #101290)   Fangrui Song via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Fangrui Song via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   Fangrui Song via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Fangrui Song via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Fangrui Song via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Fangrui Song via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Fangrui Song via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] c6a3f4e - [sanitizer] Make file headers more conventional   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Fangrui Song via llvm-commits
• [llvm] [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (PR #101401)   Fangrui Song via llvm-commits
• [llvm] [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (PR #101401)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Fangrui Song via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Fangrui Song via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL with explicit addends (PR #98115)   Fangrui Song via llvm-commits
• [lld] [ELF] Support relocatable files using CREL with explicit addends (PR #98115)   Fangrui Song via llvm-commits
• [llvm] [AArch64, ELF] Allow implicit $d/$x at section beginning (PR #99703)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE printf test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE printf test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [lld] [ELF] ScriptLexer: generate tokens lazily (PR #100493)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Fangrui Song via llvm-commits
• [llvm] Suppress spurious warnings due to R_RISCV_SET_ULEB128 (PR #101607)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Fangrui Song via llvm-commits
• [llvm] Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (PR #101740)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Fangrui Song via llvm-commits
• [llvm] 0b92e70 - Revert "[AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)"   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Fangrui Song via llvm-commits
• [llvm] [DenseMap] Optimize find/erase (PR #100517)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Fangrui Song via llvm-commits
• [compiler-rt] [sanitizer] Optimize DenseMap::{find, erase} (PR #101785)   Fangrui Song via llvm-commits
• [compiler-rt] [sanitizer] Optimize DenseMap::{find, erase} (PR #101785)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Fangrui Song via llvm-commits
• [lld] 09dd0fe - [ELF] Move Out into Ctx. NFC   Fangrui Song via llvm-commits
• [lld] 03be619 - [ELF] Move ElfSym into Ctx. NFC   Fangrui Song via llvm-commits
• [lld] 2fe3bbd - [ELF] Move outputSections into Ctx. NFC   Fangrui Song via llvm-commits
• [llvm] [Transforms] Construct SmallVector with ArrayRef (NFC) (PR #101851)   Fangrui Song via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #101855)   Fangrui Song via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Farzon Lotfi via llvm-commits
• [llvm] [LoopVectorize][X86][AMDLibm] Add Missing AMD LibM trig vector intrinsics (PR #101125)   Farzon Lotfi via llvm-commits
• [llvm] [LoopVectorize][X86][AMDLibm] Add Missing AMD LibM trig vector intrinsics (PR #101125)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Farzon Lotfi via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Farzon Lotfi via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Farzon Lotfi via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Florian Hahn via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Florian Hahn via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Florian Hahn via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Florian Hahn via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Florian Hahn via llvm-commits
• [llvm] ConstraintElim: add dry-run routine to fail early (PR #99670)   Florian Hahn via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   Florian Hahn via llvm-commits
• [llvm] [Darwin] Fix availability of exp10 for BridgeOS, DriverKit. (PR #100894)   Florian Hahn via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   Florian Hahn via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Florian Hahn via llvm-commits
• [llvm] [VPlan][NFC] Make VPValue pointer const. (PR #101334)   Florian Hahn via llvm-commits
• [llvm] [DeadStoreElimination] Introduce test for #63473 (NFC) (PR #98737)   Florian Hahn via llvm-commits
• [llvm] [DeadStoreElimination] Introduce test for #63473 (NFC) (PR #98737)   Florian Hahn via llvm-commits
• [llvm] [DeadStoreElimination] Introduce test for #63473 (NFC) (PR #98737)   Florian Hahn via llvm-commits
• [llvm] 8557035 - [LV] Add more tests with switches.   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] edf46f3 - [SCEV] Use const SCEV * explicitly in more places.   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Florian Hahn via llvm-commits
• [llvm] fdb9f96 - [LV] Consider earlier stores to invariant reduction address as dead.   Florian Hahn via llvm-commits
• [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)   Florian Mayer via llvm-commits
• [llvm] [Patchpoint] Add immarg attributes to patchpoint arguments (PR #97276)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Florian Mayer via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Freddy Ye via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Freddy Ye via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-CONVERT new instructions. (PR #101600)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-CONVERT new instructions. (PR #101600)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Freddy Ye via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Freddy Ye via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   Freddy Ye via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   Freddy Ye via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   Freddy Ye via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   Freddy Ye via llvm-commits
• [llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)   Graham Hunter via llvm-commits
• [llvm] [LLVM][ISel][SVE] Remove redundant merging fp patterns. (PR #101351)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   Graham Hunter via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Greg Clayton via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Greg Clayton via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Greg Clayton via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Greg Clayton via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying .debug_names in split DWARF for CUs and TUs. (PR #101775)   Greg Clayton via llvm-commits
• [llvm] Add support for verifying .debug_names in split DWARF for CUs and TUs. (PR #101775)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   Greg Clayton via llvm-commits
• [llvm] [MachineCopyPropagation, Scheduler] Detect and fix suboptimal instruction order to enable optimizations (PR #98087)   Gábor Spaits via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [SLP][REVEC] Make Instruction::Select support vector instructions. (PR #100507)   Han-Kuan Chen via llvm-commits
• [llvm] [DSE] Refactor DSE (PR #100956)   Haopeng Liu via llvm-commits
• [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)   Haopeng Liu via llvm-commits
• [llvm] 667598d - Revert "[Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (#101549)"   Haowei Wu via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Hassnaa Hamdi via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [lld] [ELF] PHDRS update while condition and phdrs.s unclose2.lds output (PR #100918)   Hongyu Chen via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Hua Tian via llvm-commits
• [llvm] Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (PR #101658)   Hua Tian via llvm-commits
• [llvm] Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (PR #101658)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Fixed a bug in stall cycle calculation for window scheduler (PR #99451)   Hua Tian via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Hua Tian via llvm-commits
• [clang] [flang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)   Hubert Tong via llvm-commits
• [clang] [flang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)   Hubert Tong via llvm-commits
• [clang] [flang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)   Hubert Tong via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Hubert Tong via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC] Fix codegen for transparent_union function params (PR #101738)   Hubert Tong via llvm-commits
• [llvm] [NVPTX][NFC] Remove unneeded declarations in test (PR #101167)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Remove unneeded declarations in test (PR #101167)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Remove unneeded declarations in test (PR #101167)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Update test to use bfloat type (PR #101493)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Update tests to use bfloat type (PR #101493)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Update tests to use bfloat type (PR #101493)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Update tests to use bfloat type (PR #101493)   Hugh Delaney via llvm-commits
• [llvm] [NVPTX][NFC] Update tests to use bfloat type (PR #101493)   Hugh Delaney via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Huihui Zhang via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Huihui Zhang via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Huihui Zhang via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Huihui Zhang via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   Igor Kudrin via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Igor Kudrin via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Igor Kudrin via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Igor Kudrin via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Igor Kudrin via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Igor Kudrin via llvm-commits
• [compiler-rt] [sanitizer_common][PowerPC64] Fix internal_clone() error handling (PR #99908)   Ilya Leoshkevich via llvm-commits
• [compiler-rt] [sanitizer_common][PowerPC64] Fix internal_clone() error handling (PR #99908)   Ilya Leoshkevich via llvm-commits
• [compiler-rt] [sanitizer_common][PowerPC64] Fix internal_clone() error handling (PR #99908)   Ilya Leoshkevich via llvm-commits
• [llvm] [AMDGPU] Use a generic printer for NamedIntOperands. (PR #100399)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Ivan Kosarev via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Jacek Caban via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Jacek Caban via llvm-commits
• [lldb] [llvm] [Draft][LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Draft][LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Draft][LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Jacob Lalonde via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   Jakub Kuderski via llvm-commits
• [llvm] [Support][NFC] Simplify DomTreeNodeBase::addChild (PR #101056)   Jakub Kuderski via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Jakub Kuderski via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Jakub Kuderski via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Jakub Kuderski via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jakub Kuderski via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jakub Kuderski via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   Jakub Kuderski via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `<cstdint>` to SmallVector (PR #101761)   Jakub Kuderski via llvm-commits
• [llvm] [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (PR #100550)   James Henderson via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --change-section-address (PR #98664)   James Henderson via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   James Henderson via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   James Y Knight via llvm-commits
• [clang] [llvm] demangle function names in trace files (PR #87626)   Jamie Schmeiser via llvm-commits
• [llvm] Revert "[SimplifyCFG] Skip threading if the target may have divergent branches" (PR #100994)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[SimplifyCFG] Skip threading if the target may have divergent branches" (PR #100994)   Jan Patrick Lehr via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Jan Patrick Lehr via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Jan Patrick Lehr via llvm-commits
• [llvm] [.github] Add @DeinAlptraum as CODEOWNER for libclang/Python bindings (PR #101815)   Jannick Kremer via llvm-commits
• [llvm] [.github] Add @DeinAlptraum as CODEOWNER for libclang/Python bindings (PR #101815)   Jannick Kremer via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Jannik Glückert via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Jannik Glückert via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Jannik Glückert via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Jannik Glückert via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for dst forwarding hazard (PR #100276)   Jeffrey Byrnes via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Jeremy Bennett via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jeremy Morse via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jeremy Morse via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jeremy Morse via llvm-commits
• [llvm] [SSAUpdater] Don't use large SmallSets for IDFcalc (PR #97823)   Jeremy Morse via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Jessica Clarke via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Jessica Clarke via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Jessica Clarke via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Jiahan Xie via llvm-commits
• [llvm] [RISCV][GISel] Support nxv16p0 for RV32. (PR #101573)   Jiahan Xie via llvm-commits
• [polly] 3ab0e95 - [polly] Remove unused variable in ScopBuilder.cpp (NFC)   Jie Fu via llvm-commits
• [libc] [llvm] [libc][math] fix header spec bug (PR #101269)   Job Henandez Lara via llvm-commits
• [libc] [llvm] [libc][math] fix header spec bug (PR #101269)   Job Henandez Lara via llvm-commits
• [libc] [llvm] [libc][math] fix header spec bug (PR #101269)   Job Henandez Lara via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Joe Nash via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Joe Nash via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Joe Nash via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Joe Nash via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Implement double free (and other allocation error) reporting (PR #100261)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload] Introduce the offload sanitizer (initially for traps) (PR #101417)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Johannes Doerfert via llvm-commits
• [llvm] [Offload] Introduce the offload sanitizer (initially for traps) (PR #101417)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Johannes Doerfert via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   Johannes Doerfert via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   Johannes Doerfert via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   John McCall via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   John McCall via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   John McCall via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   John McCall via llvm-commits
• [llvm] Remove already implemented target independent optimization opportunity (PR #101233)   Jon Roelofs via llvm-commits
• [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jon Roelofs via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Avoid NEON dot product in streaming[-compatible] functions (PR #101677)   Jon Roelofs via llvm-commits
• [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jonas Devlieghere via llvm-commits
• [clang] [lldb] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   Jonas Devlieghere via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)   Jonas Devlieghere via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)   Jonas Devlieghere via llvm-commits
• [llvm] [openmp] [openmp][WebAssembly] Allow openmp to compile and run under emscripten toolchain (PR #95169)   Jonathan Peyton via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Missed optimization for select a%2==0, (a/2*2)*(a/2*2), 0 (PR #92658)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Missed optimization for select a%2==0, (a/2*2)*(a/2*2), 0 (PR #92658)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Missed optimization for select a%2==0, (a/2*2)*(a/2*2), 0 (PR #92658)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Missed optimization for select a%2==0, (a/2*2)*(a/2*2), 0 (PR #92658)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Jorge Botto via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   Joseph Huber via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   Joseph Huber via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Joseph Huber via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [openmp] [Offload] Allow to record kernel launch stack traces (PR #100472)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   Joseph Huber via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   Joseph Huber via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   Joseph Huber via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   Joshua Baehring via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Joshua Batista via llvm-commits
• [llvm] [polly] [BBUtils][nfc] Delete SplitBlockPredecessors with DT (PR #97196)   Joshua Cao via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Joshua Cranmer via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Adjust the documentation of some fast-math flags. (PR #99557)   Joshua Cranmer via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] Diagnostic check for imperfect loop collapse (PR #96087)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)   Julian Brown via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   Julius Alexandre via llvm-commits
• [llvm] Sandbox ir added set volatile function to load inst and store inst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   Julius Alexandre via llvm-commits
• [llvm] Sandbox ir added set volatile function to load inst and store inst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] Sandbox ir added set volatile function to load inst and store inst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] Sandbox ir added set volatile function to load inst and store inst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   Julius Alexandre via llvm-commits
• [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Disallow op_sel in v_dot4 and v_dot8 with 4- or 8-bit packed data (PR #100485)   Jun Wang via llvm-commits
• [llvm] [DirectX] Update "dx.TypedBuffer" docs to include a "signed" bit (PR #100695)   Justin Bogner via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Justin Bogner via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Justin Bogner via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Justin Bogner via llvm-commits
• [llvm] [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (PR #101085)   Justin Bogner via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   Justin Bogner via llvm-commits
• [llvm] [DXIL][Analysis] Use setters for dxil::ResourceInfo initialization. NFC (PR #100696)   Justin Bogner via llvm-commits
• [llvm] [DXIL][Analysis] Use setters for dxil::ResourceInfo initialization. NFC (PR #100696)   Justin Bogner via llvm-commits
• [llvm] [DXIL][Analysis] Make alignment on StructuredBuffer optional (PR #100697)   Justin Bogner via llvm-commits
• [llvm] [DXIL][Analysis] Make alignment on StructuredBuffer optional (PR #100697)   Justin Bogner via llvm-commits
• [llvm] Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101088)   Justin Bogner via llvm-commits
• [llvm] Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101088)   Justin Bogner via llvm-commits
• [llvm] [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (PR #101085)   Justin Bogner via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   Justin Bogner via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Justin Bogner via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify tablegen'd OpCode and OpClass enums (PR #101249)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Simplify tablegen'd OpCode and OpClass enums (PR #101249)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD* (PR #101393)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC (PR #101393)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC (PR #101393)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC (PR #101393)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Make DXILOpBuilder's API more useable (PR #101250)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Make DXILOpBuilder's API more useable (PR #101250)   Justin Bogner via llvm-commits
• [clang] [llvm] Add length builtins and length HLSL function to DirectX Backend (PR #101256)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Add triples to two tests after #97593 (PR #101779)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Add triples to two tests after #97593 (PR #101779)   Justin Bogner via llvm-commits
• [llvm] [NVPTX] Emit `NVPTXISD::DYNAMIC_STACKALLOC`'s chain (PR #101714)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [CUDA] Add a pseudo GPU sm_next which allows overriding for SM/PTX version. (PR #100247)   Justin Holewinski via llvm-commits
• [clang] [llvm] [CUDA] Add a pseudo GPU sm_next which allows overriding for SM/PTX version. (PR #100247)   Justin Holewinski via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Kai Luo via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   Kai Nacke via llvm-commits
• [llvm] [llvm][CodeGen] Fixed max cycle calculation with zero-cost instructions for window scheduler (PR #99454)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Kai Yan via llvm-commits
• [llvm] Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (PR #101658)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Kai Yan via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Kai Yan via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Karthika Devi C via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Karthika Devi C via llvm-commits
• [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)   Karthika Devi C via llvm-commits
• [llvm] [CodeGen] Construct SmallVector with ArrayRef (NFC) (PR #101841)   Kazu Hirata via llvm-commits
• [llvm] [Transforms] Construct SmallVector with ArrayRef (NFC) (PR #101851)   Kazu Hirata via llvm-commits
• [llvm] [Transforms] Construct SmallVector with ArrayRef (NFC) (PR #101851)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #101855)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Construct SmallVector with ArrayRef (NFC) (PR #101841)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Construct SmallVector with ArrayRef (NFC) (PR #101870)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Construct SmallVector with ArrayRef (NFC) (PR #101872)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Construct SmallVector with ArrayRef (NFC) (PR #101870)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Construct SmallVector with ArrayRef (NFC) (PR #101872)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #101855)   Kazu Hirata via llvm-commits
• [llvm] [Instrumentation] Fix EdgeCounts vector size in SetBranchWeights (PR #99064)   Kefu Chai via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Kerry McLaughlin via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Kerry McLaughlin via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Kerry McLaughlin via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Kerry McLaughlin via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Kerry McLaughlin via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   Kevin McAfee via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Kevin McAfee via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   Kevin McAfee via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   Kevin McAfee via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Kirill Stoimenov via llvm-commits
• [compiler-rt] Fix prctl to handle PR_GET_PDEATHSIG. (PR #101749)   Kirill Stoimenov via llvm-commits
• [compiler-rt] Fix prctl to handle PR_GET_PDEATHSIG. (PR #101749)   Kirill Stoimenov via llvm-commits
• [compiler-rt] [RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (PR #101449)   Kito Cheng via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Kolya Panchenko via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Kolya Panchenko via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Kolya Panchenko via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   Kolya Panchenko via llvm-commits
• [llvm] [LoopVectorize] Enable shuffle padding for masked interleaved accesses (PR #75329)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)   Kolya Panchenko via llvm-commits
• [llvm] Llvm cgdata retry (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Llvm cgdata retry (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Kyungwoo Lee via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101088)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxIR][NFC] Removed comments from LoadInst test case (PR #101099)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopSink] Exit loop finding BBs to sink into early when possible (NFC) (PR #101115)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   LLVM Continuous Integration via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   LLVM Continuous Integration via llvm-commits
• [llvm] [MC] Remove redundant null check, NFCI (PR #100928)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU,test] Add one more while-break case (PR #101300)   LLVM Continuous Integration via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   LLVM Continuous Integration via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   LLVM Continuous Integration via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   LLVM Continuous Integration via llvm-commits
• [llvm] [MachO] Remove redundant bounds check (PR #100176)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][InstrProf] Add "Separate" irpgo-profile-sort option (PR #101084)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [llvm] [LegacyPM] Drop analysis groups (PR #101670)   LLVM Continuous Integration via llvm-commits
• [llvm] [LangRef] Adjust the documentation of some fast-math flags. (PR #99557)   LLVM Continuous Integration via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   LLVM Continuous Integration via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (PR #101662)   LLVM Continuous Integration via llvm-commits
• [llvm] f25d432 - [gn build] Port 259ca9ee9c4d   LLVM GN Syncbot via llvm-commits
• [llvm] a4b429f - [gn build] Port 3d5cc7e1e632   LLVM GN Syncbot via llvm-commits
• [llvm] ebeb6b2 - [gn build] Port c566769d7c09   LLVM GN Syncbot via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Lang Hames via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   Lang Hames via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Lawrence Benson via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Lei Huang via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Lei Huang via llvm-commits
• [clang] [llvm] [PowerPC] Fix codegen for transparent_union function params (PR #101738)   Lei Huang via llvm-commits
• [clang] [llvm] [PowerPC] Fix codegen for transparent_union function params (PR #101738)   Lei Huang via llvm-commits
• [llvm] [SampleFDO] Read call-graph matching recovered top-level function profiless (PR #101053)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Read call-graph matching recovered top-level function profiless (PR #101053)   Lei Wang via llvm-commits
• [llvm] [SampleFDO] Read call-graph matching recovered top-level function profiless (PR #101053)   Lei Wang via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   Lei Wang via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   Lei Wang via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   Lei Wang via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Linux User via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Linux User via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   Linux User via llvm-commits
• [llvm] [llvm-ar] --help: fix unquoted angle bracket (PR #101364)   Linux User via llvm-commits
• [llvm] [llvm-ar] --help: fix unquoted angle bracket (PR #101364)   Linux User via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Upstream __isPlatformOrVariantPlatformVersionAtLeast() (PR #100605)   Louis Dionne via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Upstream __isPlatformOrVariantPlatformVersionAtLeast() (PR #100605)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Move some macOS CI jobs to Github actions (PR #89083)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Louis Dionne via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (PR #100970)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (PR #100970)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (PR #100072)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove isel patterns for riscv.vfmerge with vector-vector operands. (PR #101277)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Luke Lau via llvm-commits
• [llvm] [RISCV] Support f16 vmv.v.v and vmerge.vvm intrinsics with Zvfhmin. (PR #101457)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Scale the cost of FP-Int conversion with LMUL (PR #87506)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Scale the cost of FP-Int conversion with LMUL (PR #87506)   Luke Lau via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LV] Fix emission of debug message in legality check (PR #101924)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LV] Fix emission of debug message in legality check (PR #101924)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Manish Kausik H via llvm-commits
• [llvm] Remove already implemented target independent optimization opportunity (PR #101233)   Marc Auberer via llvm-commits
• [llvm] Remove already implemented target independent optimization opportunity (PR #101233)   Marc Auberer via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   Marina Taylor via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   Marina Taylor via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Mark de Wever via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Mark de Wever via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   Mark de Wever via llvm-commits
• [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)   Mark de Wever via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Martin Storsjö via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Martin Storsjö via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] Support building runtimes for Windows on arm32 (PR #101462)   Martin Storsjö via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Add an XFAIL for the initialization-nobug.cpp test on mingw (PR #101814)   Martin Storsjö via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] Support building runtimes for Windows on arm32 (PR #101462)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Add an XFAIL for the initialization-nobug.cpp test on mingw (PR #101814)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Add an XFAIL for the initialization-nobug.cpp test on mingw (PR #101814)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Error out on branch relocations that require a symbol offset (PR #101906)   Martin Storsjö via llvm-commits
• [llvm] [ARM] [Windows] Error out on branch relocations that require a symbol offset (PR #101906)   Martin Storsjö via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Martin Storsjö via llvm-commits
• [llvm] [Object][COFF][llvm-readobj] Add support for ARM64X dynamic relocations. (PR #97229)   Martin Storsjö via llvm-commits
• [llvm] AMDGPU: Add some baseline cost model tests (PR #100797)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of fma/fmuladd (PR #100798)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of fma/fmuladd (PR #100798)   Matt Arsenault via llvm-commits
• [llvm] [LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (PR #100984)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [NFC] fix build failure (PR #100993)   Matt Arsenault via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   Matt Arsenault via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] respect booleanVectorContents while UnrollVSETCC (PR #97589)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Matt Arsenault via llvm-commits
• [llvm] A MMIWP Constructor Initialized with the move constructor of MMI (PR #98770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Matt Arsenault via llvm-commits
• [llvm] [AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (PR #100803)   Matt Arsenault via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   Matt Arsenault via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   Matt Arsenault via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   Matt Arsenault via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Matt Arsenault via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Matt Arsenault via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Enable vectorization of v2f16 copysign (PR #100799)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Select all constants in tablegen (PR #100788)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Select all constants in tablegen (PR #100788)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Select all constants in tablegen (PR #100788)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU,test] Add one more while-break case (PR #101300)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   Matt Arsenault via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Matt Arsenault via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][AMDGPU] AMDGPUInstCombineIntrinsic for *lane intrinsics (PR #99878)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (PR #96759)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)   Matt Arsenault via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (PR #101454)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (PR #101454)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (PR #101454)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (NFC) (PR #101454)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (NFC) (PR #101454)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Matt Arsenault via llvm-commits
• [llvm] 2feb058 - AMDGPU: Add baseline test for copysign combine   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement lowering Mul/Div/Shift operations. (PR #99981)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement lowering Mul/Div/Shift operations. (PR #99981)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [mlir] Add cond_sub and sub_clamp operations to atomicrmw (PR #96661)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (PR #96759)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (PR #96759)   Matt Arsenault via llvm-commits
• [llvm] [mlir] Add cond_sub and sub_clamp operations to atomicrmw (PR #96661)   Matt Arsenault via llvm-commits
• [llvm] [mlir] Add cond_sub and sub_clamp operations to atomicrmw (PR #96661)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Fix `IEEEFloat::addOrSubtractSignificand` and `IEEEFloat::normalize` (PR #98721)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Fix `IEEEFloat::addOrSubtractSignificand` and `IEEEFloat::normalize` (PR #98721)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Fix `IEEEFloat::addOrSubtractSignificand` and `IEEEFloat::normalize` (PR #98721)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (PR #96759)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101618)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Matt Arsenault via llvm-commits
• [llvm] [FastISel] Don't use sizeWithoutDebug() for debug records (PR #101648)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in the shift operation (PR #101649)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in frame index shift (PR #101649)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fixed using wrong register in frame index shift (PR #101649)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix using wrong register in frame index shift (PR #101649)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Matt Arsenault via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Matt Arsenault via llvm-commits
• [llvm] TTI: Fix special casing vectorization costs of saturating add/sub (PR #97463)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Matt Arsenault via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Permit more frame index operands in verifier (PR #101691)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Matt Arsenault via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Construct SmallVector with ArrayRef (NFC) (PR #101841)   Matt Arsenault via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Construct SmallVector with ArrayRef (NFC) (PR #101870)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   Matt Arsenault via llvm-commits
• [llvm] 35b4f83 - InferAddressSpaces: Simplify check of volatile allowed   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Improve handling of instructions with multiple pointer uses (PR #101922)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Improve handling of instructions with multiple pointer uses (PR #101922)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Improve handling of instructions with multiple pointer uses (PR #101922)   Matt Arsenault via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)   Matt Arsenault via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   Matthew Weingarten via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   Matthew Weingarten via llvm-commits
• [compiler-rt] [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Matthew Weingarten via llvm-commits
• [compiler-rt] [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Matthew Weingarten via llvm-commits
• [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Matthew Weingarten via llvm-commits
• [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Matthew Weingarten via llvm-commits
• [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Matthew Weingarten via llvm-commits
• [llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)   Max Beck-Jones via llvm-commits
• [llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)   Max Beck-Jones via llvm-commits
• [llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)   Max Beck-Jones via llvm-commits
• [llvm] [NFC] Remove reference to Differential (PR #101587)   Mehdi Amini via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Mel Chen via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Mel Chen via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Mel Chen via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Mel Chen via llvm-commits
• [llvm] [LV][VPlan] Introduce VPScalarStore recipe to handle scalar stores in exit block. (PR #93148)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove the duplicate code when inferring the scalar type of VPValue. NFC (PR #101313)   Mel Chen via llvm-commits
• [llvm] [VPlan][NFC] Make VPValue pointer const. (PR #101334)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Introduce MergeUntilPivot VPInstruction to enable out-loop reduction in EVL vectorization. (PR #101641)   Mel Chen via llvm-commits
• [llvm] [VP] Provide createAlignedLoad to emit VP load instruction. (PR #101666)   Mel Chen via llvm-commits
• [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)   Michael Jones via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [polly] [polly] Add profitability check for expanded region. (PR #96548)   Michael Kruse via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Michael Kruse via llvm-commits
• [llvm] 7b0f143 - [M68k] Fix compilation pipeline check   Michael Liao via llvm-commits
• [llvm] ad77888 - [DAG] Add SDPatternMatch for VScale nodes   Michael Maitland via llvm-commits
• [llvm] d230442 - [DAG][NFC] Use SDPatternMatch for VScale in some instances   Michael Maitland via llvm-commits
• [llvm] [DAG] Add SDPatternMatch for VScale nodes; Use SDPatternMatch for VScale in some instances (PR #100756)   Michael Maitland via llvm-commits
• [llvm] [DAG] Add SDPatternMatch for VScale nodes; Use SDPatternMatch for VScale in some instances (PR #100756)   Michael Maitland via llvm-commits
• [llvm] [DAG] Add SDPatternMatch::m_VSelect (PR #100758)   Michael Maitland via llvm-commits
• [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)   Michael Maitland via llvm-commits
• [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (PR #101080)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   Michael Maitland via llvm-commits
• [llvm] 22ce333 - Revert "[DAG][NFC] Use SDPatternMatch for VScale in some instances"   Michael Maitland via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Michael Maitland via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Michael Maitland via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Michael Maitland via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISel] Slightly simplify the regbank selection for G_LOAD/STORE. NFC (PR #101431)   Michael Maitland via llvm-commits
• [llvm] [RISC-V][GISEL] Select G_BITCAST for scalable vectors (PR #101486)   Michael Maitland via llvm-commits
• [compiler-rt] [Sanitizers] Avoid overload ambiguity for interceptors (PR #100986)   Michał Górny via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Michał Górny via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Mircea Trofin via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Mital Ashok via llvm-commits
• [compiler-rt] Log errno (or fuchsia equivalent) on map failures (PR #95391)   Mitch Phillips via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Momchil Velikov via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (PR #96126)   NAKAMURA Takumi via llvm-commits
• [llvm] 891d898 - Fixup (#96126) mcdc.ll for aarch64. align is not 8.   NAKAMURA Takumi via llvm-commits
• [compiler-rt] 20d723e - Fix for #96126, add `BitmapBiasAddr` to definitions for unsupported targets.   NAKAMURA Takumi via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   NAKAMURA Takumi via llvm-commits
• [llvm] [DWARF] Emit line 0 source locations for BB padding nops (PR #99496)   Nabeel Omer via llvm-commits
• [llvm] [llvm][CodeGen] Fixed max cycle calculation with zero-cost instructions for window scheduler (PR #99454)   Nathan Chancellor via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   Nathan Chancellor via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Nathan Chancellor via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Nathan Chancellor via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   Nico Weber via llvm-commits
• [llvm] AMDGPU: Remove a pointless SIFunctionResourceInfo::getTotalNumVgprs o… (PR #101158)   Nicolai Hähnle via llvm-commits
• [llvm] ADT: Add non-const overload of PackedVector::raw_bits() (PR #101742)   Nicolai Hähnle via llvm-commits
• [llvm] ADT: Add non-const overload of PackedVector::raw_bits() (PR #101742)   Nicolai Hähnle via llvm-commits
• [compiler-rt] [Sanitizers] Avoid overload ambiguity for interceptors (PR #100986)   Nikita Popov via llvm-commits
• [llvm] [LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (PR #99263)   Nikita Popov via llvm-commits
• [llvm] [LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (PR #99263)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Reduce range of ctpop for non zero argument (PR #100899)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   Nikita Popov via llvm-commits
• [llvm] [LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (PR #99263)   Nikita Popov via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Nikita Popov via llvm-commits
• [llvm] Assert range attribute is not empty nor full (PR #100601)   Nikita Popov via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   Nikita Popov via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   Nikita Popov via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   Nikita Popov via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   Nikita Popov via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Return nullopt from CompareValueComplexity() if depth limit reached (PR #101022)   Nikita Popov via llvm-commits
• [llvm] Remove value cache in SCEV comparator. (PR #100721)   Nikita Popov via llvm-commits
• [llvm] [Support][NFC] Simplify DomTreeNodeBase::addChild (PR #101056)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Nikita Popov via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   Nikita Popov via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Nikita Popov via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Nikita Popov via llvm-commits
• [llvm] [Support][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   Nikita Popov via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Nikita Popov via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Nikita Popov via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Nikita Popov via llvm-commits
• [llvm] 5d833ee - [SCEV] Avoid unnecessary computeConstantDifference() call (NFC)   Nikita Popov via llvm-commits
• [llvm] 8d28d44 - [SCEV] Fix outdated comment (NFC)   Nikita Popov via llvm-commits
• [llvm] 7937eaa - [IRCE] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   Nikita Popov via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   Nikita Popov via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Nikita Popov via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Nikita Popov via llvm-commits
• [llvm] 07d2709 - Revert "[MC] Compute fragment offsets eagerly"   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   Nikita Popov via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   Nikita Popov via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   Nikita Popov via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   Nikita Popov via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   Nikita Popov via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Nikita Popov via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Nikita Popov via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Nikita Popov via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [LoongArch] Align stack objects passed to memory intrinsics (PR #101309)   Nikita Popov via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Nikita Popov via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Add support for `shlWithNoWrap` (PR #100594)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert mem intrinsic with null into a noop (PR #100388)   Nikita Popov via llvm-commits
• [llvm] [Mem2Reg] Replace block maps with block numbers (PR #101391)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Nikita Popov via llvm-commits
• [llvm] [LVI][NFC] Delete an outdated comment (PR #101504)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Nikita Popov via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid erase+insert in constant folding (NFC) (PR #101642)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid erase+insert in constant folding (NFC) (PR #101642)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   Nikita Popov via llvm-commits
• [llvm] [llvm] Make InstSimplifyFolder constructor explicit (NFC) (PR #101654)   Nikita Popov via llvm-commits
• [llvm] a9eb3fd - [SCEV] Fix warning (NFC)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Nikita Popov via llvm-commits
• [llvm] [Metadata] Use const APInt &. NFC (PR #101865)   Nikita Popov via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   Nikita Popov via llvm-commits
• [llvm] [llvm] Construct SmallVector with ArrayRef (NFC) (PR #101872)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Don't add extra 0 to string in str[np]cpy optimization (PR #101884)   Nikita Popov via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Nikita Popov via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   Nikita Popov via llvm-commits
• [llvm] [CodeGen][NFC] Add wrapper method for MBBMap (PR #101893)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [lld] [llvm] release note is nullptr removal (PR #101638)   Nikolas Klauser via llvm-commits
• [llvm] e65882f - [InstCombine][InferFunctionAttrs] Add tests for inferring `cold` on exit/abort; NFC   Noah Goldstein via llvm-commits
• [llvm] 67fb7c3 - [TLI] Add support for inferring attr `cold` on `exit`/`abort`   Noah Goldstein via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Nuno Lopes via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Nuri Amari via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Nuri Amari via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] 67730ae - Revert "Simplify hot-path size computations in BumpPtrAllocator. (#101312)"   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   Owen Anderson via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] v_lshrrev uses vector register operand in wave space after scaling offset materialization in v_mad (PR #101649)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in the shift operation (PR #101649)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in the shift operation (PR #101649)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Fixed the wrong register used in the shift operation (PR #101649)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Fix using wrong register in frame index shift (PR #101649)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   Pankaj Dwivedi via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Adding tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   Paul Kirth via llvm-commits
• [llvm] [llvm-lit] Fixing lit's Internal Shell's Unhashable TypeError (PR #101590)   Paul Kirth via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   Paul T Robinson via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   Paul T Robinson via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   Paul T Robinson via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   Paul T Robinson via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [LLVM][ISel][SVE] Remove redundant merging fp patterns. (PR #101351)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Paul Walker via llvm-commits
• [llvm] [LLVM][ISel][SVE] Remove redundant merging fp patterns. (PR #101351)   Paul Walker via llvm-commits
• [llvm] [LLVM][ISel][SVE] Add patterns for merging reverse subtracts. (PR #101488)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid inlining if ZT0 needs preserving. (PR #101343)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [IA]: Construct (de)interleave4 out of (de)interleave2 (PR #89276)   Paul Walker via llvm-commits
• [llvm] [LLVM][SME] Allow optional auto-vectorisation for streaming functions. (PR #101679)   Paul Walker via llvm-commits
• [llvm] [LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (PR #101679)   Paul Walker via llvm-commits
• [llvm] [LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (PR #101679)   Paul Walker via llvm-commits
• [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)   Pavel Labath via llvm-commits
• [llvm] Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (PR #99495)   Pavel Labath via llvm-commits
• [llvm] [DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (PR #101197)   Pavel Labath via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   Pavel Labath via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   Pavel Labath via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Pavel Labath via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Pavel Labath via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Pavel Labath via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Pavel Labath via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   Pavel Labath via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Pavel Labath via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Pavel Labath via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Pavel Labath via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   Pavel Labath via llvm-commits
• [llvm] [DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (PR #101197)   Pavel Labath via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   Peilin Ye via llvm-commits
• [lld] [RISCV][ELF] Set maximum page size to 65536 (PR #100995)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (PR #100970)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (PR #100970)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (PR #100970)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Prefer VLS over VLA if costs are equal (PR #100564)   Pengcheng Wang via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Increase default tail duplication threshold to 6 at -O3 (PR #98873)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Increase default tail duplication threshold to 6 at -O3 (PR #98873)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Pengcheng Wang via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Peter Rong via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Peter Rong via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Peter Rong via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   Peter Rong via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [lld] [ELF] Support relocatable files using CREL (PR #98115)   Peter Smith via llvm-commits
• [llvm] [BOLT] Abort on out-of-section symbols in GOT (PR #100801)   Peter Waller via llvm-commits
• [llvm] Reland [CGData] llvm-cgdata #89884 (PR #101461)   Petr Hosek via llvm-commits
• [llvm] [RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (PR #100966)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (PR #101029)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move vmv.v.v peephole from SelectionDAG to RISCVVectorPeephole (PR #100367)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (PR #100072)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (PR #100072)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use APInt in isSimpleVIDSequence to account for index overflow (PR #100072)   Philip Reames via llvm-commits
• [llvm] [RISCV] Prefer VLS over VLA if costs are equal (PR #100564)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (PR #101029)   Philip Reames via llvm-commits
• [llvm] d6081bf - [RISCV][CostModel] Add coverage for non-power-of-2 vector sizes   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Philip Reames via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Philip Reames via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   Philip Reames via llvm-commits
• [llvm] [RISCV] Prefer VLS over VLA if costs are equal (PR #100564)   Philip Reames via llvm-commits
• [llvm] 8a4b095 - [RISCV][TLI/TTI] Reject scalable offsets in isLegalAddressing mode   Philip Reames via llvm-commits
• [llvm] [RISCV] Prefer VLS over VLA if costs are equal (PR #100564)   Philip Reames via llvm-commits
• [llvm] faf3333 - [SCEV] Add coverage for flag inference with vscale strided IVs   Philip Reames via llvm-commits
• [llvm] 35a2e6d - [SCEV] Regen a couple auto-gen tests   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use X0 for VLMax for slide1up/slide1down in lowerVectorIntrinsicScalars. (PR #101384)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Philip Reames via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Philip Reames via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Philip Reames via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Philip Reames via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Philip Reames via llvm-commits
• [llvm] [SCEV] Unify and optimize constant folding (NFC) (PR #101473)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   Philip Reames via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (PR #101123)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfieldn extraction (PR #101605)   Philipp Tomsich via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Phoebe Wang via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Phoebe Wang via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Phoebe Wang via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new i… (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (PR #101612)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (PR #101612)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 VNNI FP16/INT8/INT16 new instructions (PR #101783)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 VNNI FP16/INT8/INT16 new instructions (PR #101783)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   Phoebe Wang via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Document GFX12 Memory Model (PR #98599)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (PR #101454)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Document GFX12 Memory Model (PR #98599)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Document GFX12 Memory Model (PR #98599)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] Fix match-table-variadics tests label checking (PR #101625)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU: Handle new atomicrmw metadata for fadd case (PR #96760)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Pierre van Houtryve via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [LVI][NFC] Delete an outdated comment (PR #101504)   Piotr Fusik via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Piotr Fusik via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   Piotr Sobczak via llvm-commits
• [compiler-rt] [RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (PR #101449)   Piyou Chen via llvm-commits
• [compiler-rt] [RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (PR #101449)   Piyou Chen via llvm-commits
• [compiler-rt] [RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (PR #101449)   Piyou Chen via llvm-commits
• [clang] [compiler-rt] [RISCV][compiler-rt] Update __init_riscv_feature_bits prototype (PR #101472)   Piyou Chen via llvm-commits
• [clang] [compiler-rt] [llvm] [RISCV] Support new groupid/bitmask for cpu_model (PR #101632)   Piyou Chen via llvm-commits
• [clang] [compiler-rt] [llvm] [RISCV] Support new groupid/bitmask for cpu_model (PR #101632)   Piyou Chen via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   Pradeep Kumar via llvm-commits
• [llvm] Use references to avoid copying (PR #99863)   Pratyay Pande via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Pravin Jagtap via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Pravin Jagtap via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)   Pravin Jagtap via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for dst forwarding hazard (PR #100276)   Pravin Jagtap via llvm-commits
• [llvm] [AMDGPU] Correctly insert s_nops for dst forwarding hazard (PR #100276)   Pravin Jagtap via llvm-commits
• [llvm] DAG: Handle lowering unordered compare with inf (PR #100378)   Qiu Chaofan via llvm-commits
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• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   Qiu Chaofan via llvm-commits
• [llvm] Remove reference to Differential (PR #101587)   Rahul Joshi via llvm-commits
• [llvm] [NFC] Remove reference to Differential (PR #101587)   Rahul Joshi via llvm-commits
• [llvm] [NFC] Remove reference to Differential. (PR #101587)   Rahul Joshi via llvm-commits
• [compiler-rt] [compiler-rt][test] Disable lld tests on SPARC (PR #100533)   Rainer Orth via llvm-commits
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• [compiler-rt] [builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (PR #101662)   Rainer Orth via llvm-commits
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• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Ralf Jung via llvm-commits
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• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   Ralf Jung via llvm-commits
• [llvm] LAA: pre-commit tests for stride-versioning (PR #97570)   Ramkumar Ramachandra via llvm-commits
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• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Ramkumar Ramachandra via llvm-commits
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• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Ramkumar Ramachandra via llvm-commits
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• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [clang] [llvm] demangle function names in trace files (PR #87626)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   Ricardo Jesus via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement trampolines for rv64 (PR #96309)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [VP] Merge ExpandVP pass into PreISelIntrinsicLowering (PR #101652)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] Reapply "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)" (PR #96842)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Preserve flags for abs(X) * abs(X) and nabs(X) * nabs(X) (PR #88662)   Rose Silicon via llvm-commits
• [llvm] [compiler-rt] Lipo the compiler-rt libraries into one Universal Library (PR #89286)   Rose Silicon via llvm-commits
• [llvm] [InstCombine]: Handle known negative variables with KnownBits (PR #89682)   Rose Silicon via llvm-commits
• [llvm] Remove dead flags from virtual registers, but only when not compiling for MIPS (PR #86462)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)   Rose Silicon via llvm-commits
• [llvm] [MC] Remove unused section argument (NFC) (PR #99831)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] (NFC) Remove TODO for a - UMIN (PR #101076)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] (NFC) Remove improper TODO for a - UMIN (PR #101076)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] (NFC) Remove improper TODO for a - UMIN (PR #101076)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] (NFC) Remove improper TODO for a - UMIN (PR #101076)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] (NFC) Remove improper TODO for a - UMIN (PR #101076)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Check for undef before transforming lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #96324)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Rose Silicon via llvm-commits
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• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   Rose Silicon via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   Rose Silicon via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Rose Silicon via llvm-commits
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• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize more saturated-add variants (PR #100008)   Rose Silicon via llvm-commits
• [llvm] [MachinePipeliner] Fix instruction order with physical register (PR #99264)   Ryotaro KASUGA via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX] Add triples to two tests after #97593 (PR #101779)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [Support][Windows] Silence warnings when retrieving DLL-exported functions (PR #97905)   Saleem Abdulrasool via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Saleem Abdulrasool via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Saleem Abdulrasool via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Saleem Abdulrasool via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Saleem Abdulrasool via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Saleem Abdulrasool via llvm-commits
• [llvm] [WebAssembly] load_zero to initialise build_vector (PR #100610)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members … (PR #101894)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (PR #101894)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (PR #101894)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   Sam Elliott via llvm-commits
• [lld] [llvm] [MC] Honour alignment directive fill value for non-intel (PR #100136)   Sam Elliott via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   Sam James via llvm-commits
• [llvm] [ADT] Add `<cstdint>` to SmallVector (PR #101761)   Sam James via llvm-commits
• [llvm] [ADT] Add `<cstdint>` to SmallVector (PR #101761)   Sam James via llvm-commits
• [llvm] 7e44305 - [ADT] Add `<cstdint>` to SmallVector (#101761)   Sam James via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   Sam James via llvm-commits
• [compiler-rt] 26552e4 - [ASan] Fix goo.gl link in comment for MSVC bug   Sam James via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   Sam James via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   Sam James via llvm-commits
• [llvm] [WebAssembly] load_zero to initialise build_vector (PR #100610)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] load_zero to initialise build_vector (PR #100610)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] load_zero to initialise build_vector (PR #100610)   Sam Parker via llvm-commits
• [llvm] [StructuralHashPrinter] Always print 16-digit hash (PR #101655)   Sam Parker via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Lower alias mask to a whilewr (PR #100769)   Sam Tebbs via llvm-commits
• [clang] [llvm] [LV] Mask off possibly aliasing vector lanes (PR #100579)   Sam Tebbs via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LLVM][AMDGPU] AMDGPUInstCombineIntrinsic for *lane intrinsics (PR #99878)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [WIP][AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (PR #101593)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Cleanup existing values in getMemOpInfo (PR #98196)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Avoid inlining if ZT0 needs preserving. (PR #101343)   Sander de Smalen via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Sander de Smalen via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Sander de Smalen via llvm-commits
• [compiler-rt] [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (PR #101522)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Avoid NEON dot product in streaming[-compatible] functions (PR #101677)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Avoid NEON dot product in streaming[-compatible] functions (PR #101677)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (PR #101679)   Sander de Smalen via llvm-commits
• [llvm] [Hexagon] Fix concat lowering for HVX for 64B vector length (PR #98318)   Santanu Das via llvm-commits
• [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)   Santanu Das via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add parallelization for processing of DWO debug information (PR #100282)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add parallelization for processing of DWO debug information (PR #100282)   Sayhaan Siddiqui via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Add parallelization for processing of DWO debug information (PR #100282)   Sayhaan Siddiqui via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Sean Fertile via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   Sean Fertile via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Sean Fertile via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Sean Fertile via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Sean Fertile via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   Serge Pavlov via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   Sergei Barannikov via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   Sergei Barannikov via llvm-commits
• [llvm] [AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (PR #100803)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] Reland "MTM: fix issues after cursory reading" (PR #101191)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   Sergei Barannikov via llvm-commits
• [llvm] [DataLayout] Remove deprecated method (PR #101495)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Make InstSimplifyFolder constructor explicit (NFC) (PR #101654)   Sergei Barannikov via llvm-commits
• [llvm] [StructuralHashPrinter] Always print 16-digit hash (PR #101655)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Make InstSimplifyFolder constructor explicit (NFC) (PR #101654)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #99752)   Sergei Barannikov via llvm-commits
• [llvm] Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (PR #101740)   Sergei Barannikov via llvm-commits
• [llvm] Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (PR #101740)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Don't add extra 0 to string in str[np]cpy optimization (PR #101884)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Don't add extra 0 to string in str[np]cpy optimization (PR #101884)   Sergei Barannikov via llvm-commits
• [flang] [llvm] [mlir] [OpenMP]Update use_device_clause lowering (PR #101171)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples (PR #100156)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples (PR #100156)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples (PR #100156)   Sergio Afonso via llvm-commits
• [llvm] [mlir] Add missing dialects to C API (PR #82190)   Sergio Sánchez Ramírez via llvm-commits
• [llvm] 95e9aff - [X86] Update sub-features of APX for host CPU   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   Shengchen Kan via llvm-commits
• [llvm] Remove redundant null check (PR #100928)   Shengchen Kan via llvm-commits
• [llvm] [MC] Remove redundant null check, NFCI (PR #100928)   Shengchen Kan via llvm-commits
• [llvm] [MC] Remove redundant null check, NFCI (PR #100928)   Shengchen Kan via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Shengchen Kan via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Shengchen Kan via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   Shengchen Kan via llvm-commits
• [llvm] 50cf413 - [X86, CodeGen] Return the correct condition code for SETZUCC   Shengchen Kan via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [clang] [compiler-rt] [llvm] Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (PR #101616)   Shengchen Kan via llvm-commits
• [llvm] 60054dc - [NFC] Lowercase the first letter of functions defined in SimplifyCFG.cpp   Shengchen Kan via llvm-commits
• [llvm] bb790b8 - [NFC] Extract the probability check for the hoisted BB into a local function   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] d1e5dc2 - [NFC] Add const qualifier for parameters of functions in Instructions.h   Shengchen Kan via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Shengchen Kan via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   Shengchen Kan via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   Shih-Po Hung via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Shilei Tian via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Shilei Tian via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Shilei Tian via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Shilei Tian via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributorPass (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reformat code for creating AA (PR #101591)   Shilei Tian via llvm-commits
• [llvm] e7f73c0 - [Attributor] Use `getPointerAddressSpace` to replace a cast followed by a `getAddressSpace`   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reformat code for creating AA (PR #101591)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reformat code for creating AA (PR #101591)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (PR #101593)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (PR #101593)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (PR #101593)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (PR #101593)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [clang] [llvm] [LLVM][PassBuilder] Extend the function signature of callback for optimizer pipeline extension point (PR #100953)   Shilei Tian via llvm-commits
• [clang] [llvm] [LLVM][PassBuilder] Extend the function signature of callback for optimizer pipeline extension point (PR #100953)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] 874cd10 - Revert "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Improve debug string of `AAUnderlyingObjects` (PR #101861)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Improve debug string of `AAUnderlyingObjects` (PR #101861)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Improve debug string of `AAUnderlyingObjects` (PR #101861)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Shilei Tian via llvm-commits
• [llvm] [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (PR #100952)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   Shilei Tian via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [TailCallElim] Don’t mark llvm.stackrestore with tail-call (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [TailCallElim] Don’t mark llvm.stackrestore with tail-call (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [TailCallElim] Don’t mark llvm.stackrestore with tail-call (PR #101352)   Shimin Cui via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   Simon Pilgrim via llvm-commits
• [llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)   Simon Pilgrim via llvm-commits
• [llvm] 3ef9220 - [CostModel][X86] Add missing AVX512 vector mul overflow intrinsic costs   Simon Pilgrim via llvm-commits
• [llvm] 1b4be6a - [ARM] Regenerate vselect_imax.ll   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Add SDPatternMatch::m_VSelect (PR #100758)   Simon Pilgrim via llvm-commits
• [llvm] [LegalizeDAG][X86][AArch64][LoongArch] Freeze index when converting extract_elt/extract_subvector to load/store on stack. (PR #88985)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Remove ExtraArgs from reductions. (PR #99923)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)   Simon Pilgrim via llvm-commits
• [llvm] 38e6453 - [AMDGPU] Regenerate vselect.ll   Simon Pilgrim via llvm-commits
• [llvm] [llvm][CodeGen] respect booleanVectorContents while UnrollVSETCC (PR #97589)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Add legalization handling for ABDS/ABDU (PR #92576)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Set MaxInterleaving to 4 for Neoverse V2 (PR #100385)   Sjoerd Meijer via llvm-commits
• [llvm] [AArch64] Set MaxInterleaving to 4 for Neoverse V2 (PR #100385)   Sjoerd Meijer via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [lld] [llvm] Ofast deprecation clarifications (PR #101005)   Sjoerd Meijer via llvm-commits
• [llvm] Add __size_returning_new variant detection to TLI. (PR #101564)   Snehasish Kumar via llvm-commits
• [llvm] [SandboxIR] Implement CallBrInst (PR #100823)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement CallBrInst (PR #100823)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement CallBrInst (PR #100823)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement PtrToIntInst (PR #101211)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   Sriraman Tallam via llvm-commits
• [llvm] AMDGPU: Improve cost handling of fma/fmuladd (PR #100798)   Stanislav Mekhanoshin via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Permit more frame index operands in verifier (PR #101691)   Stanislav Mekhanoshin via llvm-commits
• [llvm] ADT: Add non-const overload of PackedVector::raw_bits() (PR #101742)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [RegisterCoalescer] Fix SUBREG_TO_REG handling in the RegisterCoalescer. (PR #96839)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   Stefan Pintilie via llvm-commits
• [llvm] Globalopt pass produces invalid debug info (PR #100654)   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)   Steven Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO] enable `ObjCARCContractPass` only on optimized build (PR #101114)   Steven Wu via llvm-commits
• [llvm] [CMake] Workaround the incompatibility for executable exports (PR #101741)   Steven Wu via llvm-commits
• [llvm] [CMake] Workaround the incompatibility for executable exports (PR #101741)   Steven Wu via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Sumanth Gundapaneni via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Sumanth Gundapaneni via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Sumanth Gundapaneni via llvm-commits
• [llvm] llvm.lround: Update verifier to validate support of vector types. (PR #98950)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Sumanth Gundapaneni via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   Teresa Johnson via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   Teresa Johnson via llvm-commits
• [compiler-rt] [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Teresa Johnson via llvm-commits
• [compiler-rt] [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Teresa Johnson via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   Teresa Johnson via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   Teresa Johnson via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Teresa Johnson via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (PR #98682)   Teresa Johnson via llvm-commits
• [compiler-rt] [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (PR #100949)   Teresa Johnson via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [Memprof] Adds instrumentation support for memprof with histograms. (PR #100834)   Teresa Johnson via llvm-commits
• [llvm] [LoopSink] Exit loop finding BBs to sink into early when possible (NFC) (PR #101115)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Fix when function has indirect call (PR #101170)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   Teresa Johnson via llvm-commits
• [llvm] Add __size_returning_new variant detection to TLI. (PR #101564)   Teresa Johnson via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Thomas Fransham via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Thomas Fransham via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Thomas Hashem via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Thomas Hashem via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   Thomas Hashem via llvm-commits
• [llvm] [WebAssembly] load_zero to initialise build_vector (PR #100610)   Thomas Lively via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Thorsten Schütt via llvm-commits
• [llvm] Refactor DSE (PR #100956)   Thorsten Schütt via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Thorsten Schütt via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   Thorsten Schütt via llvm-commits
• [llvm] Implement missing PHINode functions (PR #101734)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine cast of const integer II (PR #100835)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine G_ADD and G_SUB with constants (PR #97771)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine G_ADD and G_SUB with constants (PR #97771)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine G_ADD and G_SUB with constants (PR #97771)   Thorsten Schütt via llvm-commits
• [llvm] [msan] Support vst1x_{2,3,4} and vst_{2,3,4} with floating-point parameters (PR #100644)   Thurston Dang via llvm-commits
• [llvm] [msan] Support vst{2,3,4}_lane instructions (PR #101215)   Thurston Dang via llvm-commits
• [llvm] [msan] Support vst{2,3,4}_lane instructions (PR #101215)   Thurston Dang via llvm-commits
• [llvm] [msan] Precommit tests for Arm NEON vector shift (PR #101420)   Thurston Dang via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Thurston Dang via llvm-commits
• [llvm] [NFC][ModuleUtils] Rename test function (PR #101750)   Thurston Dang via llvm-commits
• [llvm] [test][asan] Precommit test (PR #101769)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Thurston Dang via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tobias Hieta via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Tobias Hieta via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Tobias Hieta via llvm-commits
• [compiler-rt] [sanitizer_common] Fix UnwindFast on SPARC (PR #101634)   Tobias Hieta via llvm-commits
• [llvm] [llvm-locstats] Switch shebang from python to python3 (PR #101864)   Tobias Hieta via llvm-commits
• [llvm] workflows/release-binaries-all: Pass secrets on to release-binaries workflow (PR #101866)   Tobias Hieta via llvm-commits
• [llvm] workflows/release-binaries: Disable flang on macOS X64 (PR #101790)   Tobias Hieta via llvm-commits
• [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)   Tom Stellard via llvm-commits
• [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)   Tom Stellard via llvm-commits
• [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fetch composite actions outside of default workspace (PR #100845)   Tom Stellard via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tom Stellard via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tom Stellard via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tom Stellard via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tom Stellard via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   Tom Stellard via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   Tom Stellard via llvm-commits
• [llvm] Workflows: Add composite actions for managing sccache caches for a PR (PR #101578)   Tom Stellard via llvm-commits
• [llvm] [workflows] Rework pre-commit CI for the release branch (PR #92058)   Tom Stellard via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   Tom Stellard via llvm-commits
• [llvm] Workflows: Add composite actions for managing sccache caches for a PR (PR #101578)   Tom Stellard via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fix problem with python installation on macos-14 (PR #101774)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Disable flang on macOS X64 (PR #101790)   Tom Stellard via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   Tom Stellard via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   Tom Stellard via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fix problem with python installation on macos-14 (PR #101774)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries-all: Pass secrets on to release-binaries workflow (PR #101866)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU] Document GFX12 Memory Model (PR #98599)   Tony Tye via llvm-commits
• [llvm] [AMDGPU] Document GFX12 Memory Model (PR #98599)   Tony Tye via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   Ulrich Weigand via llvm-commits
• [llvm] [DFAJumpThreading] Rewrite the way paths are enumerated (PR #96127)   Usman Nadeem via llvm-commits
• [llvm] Initial changes for llvm shared library build using explicit visibility annotations (PR #96630)   Vassil Vassilev via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   Victor Campos via llvm-commits
• [llvm] [NFC][Load] Find better place for `mustSuppressSpeculation` (PR #100794)   Vitaly Buka via llvm-commits
• [llvm] [NFC][Load] Find better place for `mustSuppressSpeculation` (PR #100794)   Vitaly Buka via llvm-commits
• [llvm] [NFC][Load] Find better place for `mustSuppressSpeculation` (PR #100794)   Vitaly Buka via llvm-commits
• [llvm] [polly] [NFC][Load] Make `ScanFrom` required parameters (PR #100789)   Vitaly Buka via llvm-commits
• [llvm] [polly] [NFC][Load] Make `ScanFrom` required parameters (PR #100789)   Vitaly Buka via llvm-commits
• [llvm] [polly] [NFC][Load] Make `ScanFrom` required parameters (PR #100789)   Vitaly Buka via llvm-commits
• [llvm] [polly] [InstCombine][asan] Don't speculate loads before `select ptr` (PR #100773)   Vitaly Buka via llvm-commits
• [llvm] [NFC][InstCombine][SROA][Asan] Precommit tests affected by #100773 (PR #100844)   Vitaly Buka via llvm-commits
• [llvm] [NFC][InstCombine][SROA][Asan] Precommit tests affected by #100773 (PR #100844)   Vitaly Buka via llvm-commits
• [llvm] [polly] [InstCombine][asan] Don't speculate loads before `select ptr` (PR #100773)   Vitaly Buka via llvm-commits
• [llvm] [polly] [InstCombine][asan] Don't speculate loads before `select ptr` (PR #100773)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common] Fix internal_*stat on Linux/sparc64 (PR #101012)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common][test] Fix InternalMmapWithOffset on 32-bit Linux/s… (PR #101011)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add more tests for shadow memory (PR #100906)   Vitaly Buka via llvm-commits
• [llvm] [msan] Precommit tests for Arm NEON VST with lanes (PR #100645)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common][test] Always skip select allocator tests on SPARC V9 (PR #100530)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common][test] Fix SanitizerIoctl/KVM_GET_* tests on Linux/… (PR #100532)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common] Don't use syscall(SYS_clone) on Linux/sparc64 (PR #100534)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common] Fix signal_line.cpp on SPARC (PR #100535)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common] Adjust signal_send.cpp for Linux/sparc64 (PR #100538)   Vitaly Buka via llvm-commits
• [llvm] [msan] Precommit tests for Arm NEON VST with lanes (PR #100645)   Vitaly Buka via llvm-commits
• [llvm] [msan] Support vst1x_{2,3,4} and vst_{2,3,4} with floating-point parameters (PR #100644)   Vitaly Buka via llvm-commits
• [compiler-rt] [rtsan] Make sure rtsan gets initialized on mac (PR #100188)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking Attribute and RealtimeSanitizer pass (PR #100596)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking Attribute and RealtimeSanitizer pass (PR #100596)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Vitaly Buka via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Vitaly Buka via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Vitaly Buka via llvm-commits
• [llvm] [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (PR #101231)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add nonblocking attribute for the realtime sanitizer (PR #100596)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] 2a5f7e5 - [NFC][asan][odr] Use IntrusiveList for a ListOfGlobals   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch to IntrusiveList in asan_globals (PR #101577)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch to IntrusiveList in asan_globals (PR #101577)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch to IntrusiveList in asan_globals (PR #101577)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Vitaly Buka via llvm-commits
• [compiler-rt] e9c20b9 - [test][asan] Disabled a new test on Android   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Vitaly Buka via llvm-commits
• [llvm] [NFC][ModuleUtils] Rename test function (PR #101750)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Report DynInitUnPoison (PR #101586)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Report DynInitUnPoison (PR #101586)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Report DynInitUnPoison (PR #101586)   Vitaly Buka via llvm-commits
• [llvm] [NFC][ModuleUtils] Rename test function (PR #101750)   Vitaly Buka via llvm-commits
• [llvm] [test][asan] Precommit test (PR #101769)   Vitaly Buka via llvm-commits
• [llvm] [test][asan] Precommit test (PR #101769)   Vitaly Buka via llvm-commits
• [llvm] [test][asan] Precommit test (PR #101769)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [NFC][ModuleUtils] Test appendToGlobalCtors/appendToGlobalDtors (PR #101753)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [NFC][ModuleUtils] Test appendToGlobalCtors/appendToGlobalDtors (PR #101753)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [NFC][ModuleUtils] Test appendToGlobalCtors/appendToGlobalDtors (PR #101753)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [ModuleUtils] Add transformGlobal{C, D}tors (PR #101757)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [ModuleUtils] Add transformGlobal{C, D}tors (PR #101757)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [ModuleUtils] Add transformGlobal{C, D}tors (PR #101757)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [ModuleUtils] Add transformGlobal{C, D}tors (PR #101757)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Track current dynamic init module (PR #101597)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   Vitaly Buka via llvm-commits
• [compiler-rt] 534a873 - [test][asan] Fix the test checks   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Track current dynamic init module (PR #101597)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [asan] Limit priority of ctor to kMax-1 (PR #101772)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][asan] Track current dynamic init module (PR #101597)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Optimize initialization order checking (PR #101837)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Optimize initialization order checking (PR #101837)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Optimize initialization order checking (PR #101837)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Optimize initialization order checking (PR #101837)   Vitaly Buka via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)   Vlad Serebrennikov via llvm-commits
• [llvm] [Bolt] fix a wrong relocation update issue with weak references (PR #69136)   Vladislav Khmelevsky via llvm-commits
• [llvm] [AArch64][BOLT] Ensure tentative code layout for cold BBs runs. (PR #96609)   Vladislav Khmelevsky via llvm-commits
• [llvm] [AArch64][BOLT] Ensure tentative code layout for cold BBs runs. (PR #96609)   Vladislav Khmelevsky via llvm-commits
• [llvm] [AArch64][BOLT] Ensure tentative code layout for cold BBs runs. (PR #96609)   Vladislav Khmelevsky via llvm-commits
• [llvm] [AArch64][BOLT] Ensure tentative code layout for cold BBs runs. (PR #96609)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Abort on out-of-section symbols in GOT (PR #100801)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Move ADRRelaxationPass (PR #101371)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Abort on out-of-section symbols in GOT (PR #100801)   Vladislav Khmelevsky via llvm-commits
• [llvm] [Bolt] fix a wrong relocation update issue with weak references (PR #69136)   Vladislav Khmelevsky via llvm-commits
• [llvm] [JITLink][AArch64] Add LD64_GOTPAGE_LO15 rel support (PR #100854)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   Vladislav Khmelevsky via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Volodymyr Vasylkun via llvm-commits
• [llvm] [SPIR-V] Emit valid Lifestart/Lifestop instructions (PR #98475)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit valid Lifestart/Lifestop instructions (PR #98475)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit valid Lifestart/Lifestop instructions (PR #98475)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Improve test suite pass rate when expensive checks are on (PR #101732)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Improve test suite pass rate when expensive checks are on (PR #101732)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Improve test suite pass rate when expensive checks are on (PR #101732)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [NVPTX] Fixing debug symbols for ptx target emitting (PR #101891)   Vyom Sharma via llvm-commits
• [llvm] 84ad292 - [LoongArch] Pre-commit tests for merge base offset. NFC   WANG Rui via llvm-commits
• [llvm] f51a479 - [LoongArch] Pre-commit test for aligning stack objects passed to memory intrinsics. NFC   WANG Rui via llvm-commits
• [llvm] 5f7e921 - [LoongArch] Pre-commit test for load floating-point immediate using VLDI. NFC   WANG Rui via llvm-commits
• [clang] [llvm] [Pipelines] Do not run CoroSplit and CoroCleanup in LTO pre-link pipeline (PR #100205)   Wei Wang via llvm-commits
• [clang] [llvm] [Pipelines] Do not run CoroSplit and CoroCleanup in LTO pre-link pipeline (PR #100205)   Wei Wang via llvm-commits
• [llvm] [llvm-profgen] Revert #99826 and #99026 (PR #100147)   Wei Xiao via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   Wesley Wiser via llvm-commits
• [llvm] [LLVM] [X86] Fix integer overflows in frame layout for huge frames (PR #101840)   Wesley Wiser via llvm-commits
• [llvm] [LLVM] [X86] Fix integer overflows in frame layout for huge frames (PR #101840)   Wesley Wiser via llvm-commits
• [llvm] [Transforms] Speed up SSAUpdater::FindExistingPHI (PR #100281)   William Junda Huang via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   William Junda Huang via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   William Junda Huang via llvm-commits
• [llvm] [llvm-profdata] Enabled functionality to write split-layout profile (PR #101795)   William Junda Huang via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan][NFC] Use cast instead of dyn_cast in some cases. (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan][NFC] Use cast instead of dyn_cast when dyn_cast is not needed. (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan][NFC] Use cast when dyn_cast is not needed. (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] [nsan][NFC] Use cast when dyn_cast is not needed. (PR #101147)   Wu Yingcong via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [llvm] [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (PR #97593)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   Xiang Li via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD* (PR #101393)   Xiang Li via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   Yeting Kuo via llvm-commits
• [llvm] [llvm][CodeGen] respect booleanVectorContents while UnrollVSETCC (PR #97589)   Yingchi Long via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   Yingwei Zheng via llvm-commits
• [llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)   Yingwei Zheng via llvm-commits
• [llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (PR #100966)   Yingwei Zheng via llvm-commits
• [llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   Yingwei Zheng via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Yingwei Zheng via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Yingwei Zheng via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Convert mem intrinsic with null into a noop (PR #100388)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Add support for `shlWithNoWrap` (PR #100594)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfieldn extraction (PR #101605)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw` (PR #101622)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw` (PR #101622)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   Yingwei Zheng via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Convert load from LUT into a select (PR #98339)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   Yingwei Zheng via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Yingwei Zheng via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (PR #101868)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   YongKang Zhu via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   YongKang Zhu via llvm-commits
• [llvm] 35a509d - [llvm][docs] Correct named metadata name in example code block (NFC)   Youngsuk Kim via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   YunQiang Su via llvm-commits
• [llvm] Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (PR #96649)   YunQiang Su via llvm-commits
• [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [Clang] C++20 Coroutines: Introduce Frontend Attribute [[clang::coro_await_elidable]] (PR #99282)   Yuxuan Chen via llvm-commits
• [llvm] [PPC][AIX] Set needsFP to true when base pointer is used in prologue/… (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Set needsFP to true when base pointer is used in prologue/… (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 in prolog/epilog when using base pointer (PR #100182)   Zaara Syeda via llvm-commits
• [llvm] [PPC][AIX] Save/restore r31 when using base pointer (PR #100182)   Zaara Syeda via llvm-commits
• [clang] [flang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)   Zahira Ammarguellat via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [llvm] ae6dc64 - Reapply "[Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (#101549)"   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   Zequan Wu via llvm-commits
• [compiler-rt] 33a50e0 - [compiler-rt][test] Disable lld tests on SPARC (#100533)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Disable lld tests on SPARC (PR #100533)   via llvm-commits
• [llvm] f6d1d6f - [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (#98176)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [llvm] 3a2ef3a - AMDGPU: Add some baseline cost model tests (#100797)   via llvm-commits
• [llvm] [LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (PR #100984)   via llvm-commits
• [llvm] solve #65072, scalarize binary ops of splats by not check isTypeLegal (PR #100749)   via llvm-commits
• [compiler-rt] [Sanitizers] Avoid overload ambiguity for interceptors (PR #100986)   via llvm-commits
• [compiler-rt] [Sanitizers] Avoid overload ambiguity for interceptors (PR #100986)   via llvm-commits
• [llvm] [ARM] Add scalar add_sat costs. (PR #100988)   via llvm-commits
• [llvm] 5bd3aef - [AMDGPU] Use a generic printer for NamedIntOperands. (#100399)   via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   via llvm-commits
• [llvm] [MC] Forward declare ELFObjectWriter (PR #100989)   via llvm-commits
• [llvm] Remove redundant null check (PR #100928)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [NFC] fix build failure (PR #100993)   via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Skip threading if the target may have divergent branches" (PR #100994)   via llvm-commits
• [llvm] 03e17da - [DWARF] Emit line 0 source locations for BB padding nops (#99496)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [llvm] a347bdb - Revert "[SimplifyCFG] Skip threading if the target may have divergent branches" (#100994)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [llvm] [SelectionDAG] Scalarize binary ops of splats before legal types (PR #100749)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [compiler-rt] 0a94511 - Log errno (or fuchsia equivalent) on map failures (#95391)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   via llvm-commits
• [llvm] [SelectionDAG] Simplify vselect true, T, F -> T (PR #100992)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)   via llvm-commits
• [llvm] [NVPTX] Fix DwarfFrameBase construction (PR #101000)   via llvm-commits
• [llvm] 9e462b7 - [LowerMemIntrinsics][NFC] Use Align in TTI::getMemcpyLoopLoweringType (#100984)   via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   via llvm-commits
• [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Add `dlupdate` for MachO (PR #97441)   via llvm-commits
• [llvm] f7491f5 - [InstCombine] Reduce range of ctpop for non zero argument (#100899)   via llvm-commits
• [llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] goldsteinn/tli cold abort exit (PR #101003)   via llvm-commits
• [llvm] goldsteinn/tli cold abort exit (PR #101003)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   via llvm-commits
• [llvm] [InstCombine] Handle ceil division idiom (PR #100977)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   via llvm-commits
• [llvm] e6fa09f - [SCCP] Add context to SimplifyQuery (#100831)   via llvm-commits
• [llvm] [SCCP] Add context to SimplifyQuery (PR #100831)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   via llvm-commits
• [compiler-rt] [sanitizer_common][test] Fix InternalMmapWithOffset on 32-bit Linux/s… (PR #101011)   via llvm-commits
• [compiler-rt] [sanitizer_common] Fix internal_*stat on Linux/sparc64 (PR #101012)   via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   via llvm-commits
• [llvm] e106537 - [RISCV] Remove vfmv.s.f and vfmv.f.s lmul pseudo variants (#100970)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   via llvm-commits
• [llvm] [AArch64] Add lowering for `@llvm.experimental.vector.compress` (PR #101015)   via llvm-commits
• [llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [clang] [lld] [llvm] Add debug options to clang-linker-wrapper (PR #101008)   via llvm-commits
• [llvm] [DomTreeUpdater] Handle critical edge splitting (PR #100856)   via llvm-commits
• [llvm] [SCEV] Return nullopt from CompareValueComplexity() if depth limit reached (PR #101022)   via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   via llvm-commits
• [llvm] Globalopt pass produces invalid debug info (PR #100654)   via llvm-commits
• [llvm] 53c37f3 - [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (#94628)   via llvm-commits
• [llvm] [RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (PR #101029)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [clang] [llvm] [NVPTX] Support __usAtomicCAS builtin (PR #99646)   via llvm-commits
• [clang] [llvm] [NVPTX] Support __usAtomicCAS builtin (PR #99646)   via llvm-commits
• [llvm] [SLP] Order clustered load base pointers by ascending offsets (PR #100653)   via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   via llvm-commits
• [llvm] 7647f88 - [RISCV] Add isel special case for (and (srl X, c2), c1) -> (slli_uw (srli x, c2+c3), c3). (#100966)   via llvm-commits
• [llvm] 922558f - [RISCV] Remove registers from ins of Priv instructions. (#100857)   via llvm-commits
• [llvm] 2c37334 - [Transforms] Speed up SSAUpdater::FindExistingPHI (#100281)   via llvm-commits
• [llvm] 7a2a36f - [AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (#100803)   via llvm-commits
• [llvm] b66310f - [RISCV][TTI] Split costing of [u/s]int_to_fp from fp_to_[u/s]int [nfc] (#101029)   via llvm-commits
• [llvm] [InstCombine] Add an option to skip simplification on call instruction where a non-void return value is expected while the callee returns void (PR #98536)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [MachinePipeliner] Fix instruction order with physical register (PR #99264)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold` on `exit`/`abort` (PR #101003)   via llvm-commits
• [llvm] 135a1e9 - [DirectX] Update "dx.TypedBuffer" docs to include a "signed" bit (#100695)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [PAC][test] Add tests against Linux triples for auth/resign lowering (PR #100744)   via llvm-commits
• [llvm] 0dd1128 - [DAG] Add SDPatternMatch::m_VSelect (#100758)   via llvm-commits
• [llvm] 197f4a9 - [SLP]Remove ExtraArgs from reductions.   via llvm-commits
• [llvm] [StackFrameLayoutAnalysis] Support more SlotTypes (PR #100562)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] 945dd9a - [NFC][Load] Find better place for `mustSuppressSpeculation` (#100794)   via llvm-commits
• [polly] 07f3a08 - [NFC][Load] Make `ScanFrom` required parameters (#100789)   via llvm-commits
• [llvm] [PAC][test] Add tests against Linux triples for auth/resign lowering (PR #100744)   via llvm-commits
• [llvm] 2f3ae2f - [NFC][InstCombine][SROA][Asan] Precommit tests affected by #100773 (#100844)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [lld] [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [VPlan] Introduce explicit ExtractFromEnd recipes for live-outs. (PR #100658)   via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   via llvm-commits
• [llvm] [RISCV][TTI] Cost non-power-of-two size changing casts (PR #101047)   via llvm-commits
• [llvm] [InstCombine] Fold `(x < y) ? -1 : zext(x != y)` into `u/scmp(x,y)` (PR #101049)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)   via llvm-commits
• [llvm] [IR] Add per-function numbers to basic blocks (PR #101052)   via llvm-commits
• [llvm] [SampleFDO] Read call-graph matching recovered top-level function profiless (PR #101053)   via llvm-commits
• [llvm] Scalarize the vector inputs to llvm.lround intrinsic by default. (PR #101054)   via llvm-commits
• [llvm] [SandboxIR] Implement CallBrInst (PR #100823)   via llvm-commits
• [llvm] [SampleFDO] Read call-graph matching recovered top-level function profiless (PR #101053)   via llvm-commits
• [llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)   via llvm-commits
• [compiler-rt] don't use mallopt on musl (PR #101055)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   via llvm-commits
• [llvm] 6dba99e - [InstCombine][asan] Don't speculate loads before `select ptr` (#100773)   via llvm-commits
• [llvm] [Support][NFC] Simplify DomTreeNodeBase::addChild (PR #101056)   via llvm-commits
• [llvm] [Suppprt][NFC] Use DomTreeBase methods in SemiNCA (PR #101059)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   via llvm-commits
• [llvm] fb70282 - [MC] Move some bool members to MCFragment. NFC   via llvm-commits
• [llvm] [OptBisect] Add an option to disable print of pass message (PR #101065)   via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   via llvm-commits
• [llvm] b3b390b - [SandboxIR][NFC] Fixes for LoadInst::create functions (#100955)   via llvm-commits
• [llvm] [SandboxIR][NFC] Fixes for LoadInst::create functions (PR #100955)   via llvm-commits
• [llvm] [SystemZ][z/OS] Simplify the GOFF section handling (PR #101068)   via llvm-commits
• [llvm] 7b99b1d - [Darwin] Fix availability of exp10 for BridgeOS, DriverKit. (#100894)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [RegisterCoalescer] Fix SUBREG_TO_REG handling in the RegisterCoalescer. (PR #96839)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [compiler-rt] 2a612a1 - [Memprof] Changes `HISTOGRAM_GRANULARITY` from 8U to 8ULL. (#100949)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (PR #101072)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [RISCV] Qualify all XCV predicates with !is64Bit. (PR #101074)   via llvm-commits
• [llvm] 26e455b - [lld][LTO] Teach LTO to print pipeline passes (#101018)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [lld][LTO] Teach LTO to print pipeline passes (PR #101018)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [RISCV] Qualify all XCV predicates with !is64Bit. (PR #101074)   via llvm-commits
• [compiler-rt] 62bd08a - [compiler-rt] Fix format string warnings in FreeBSD DumpAllRegisters (#101072)   via llvm-commits
• [llvm] cfb92be - [SandboxIR] Implement CallBrInst (#100823)   via llvm-commits
• [llvm] [SandboxIR] Implement CallBrInst (PR #100823)   via llvm-commits
• [llvm] [InstCombine] (NFC) Remove TODO for a - UMIN (PR #101076)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Implement GetElementPtrInst (PR #101078)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (PR #101080)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [PPC][AIX] Set needsFP to true when base pointer is used in prologue/… (PR #100182)   via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   via llvm-commits
• [llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)   via llvm-commits
• [llvm] 842a332 - [NVPTX] Fix DwarfFrameBase construction (#101000)   via llvm-commits
• [lld] [lld][InstrProf] Add "Separate" irpgo-profile-sort option (PR #101084)   via llvm-commits
• [llvm] [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (PR #101085)   via llvm-commits
• [llvm] [BOLT][DWARF] Remove option to write to DWP (PR #100771)   via llvm-commits
• [lldb] [llvm] [LLDB][Minidump] Fix ProcessMinidump::GetMemoryRegions to include 64b regions when /proc/pid maps are missing. (PR #101086)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] 38e671a - [DXIL][Analysis] Use setters for dxil::ResourceInfo initialization. NFC   via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   via llvm-commits
• [llvm] a94edb6 - [DXIL][Analysis] Make alignment on StructuredBuffer optional   via llvm-commits
• [llvm] c22171f - Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (#101088)   via llvm-commits
• [llvm] Revert "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101088)   via llvm-commits
• [llvm] bb4aeb6 - [SPIRV] Don't specialize MachineModuleInfo to access the LLVMContext. NFC (#101085)   via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   via llvm-commits
• [llvm] c99bd3c - [ctx_prof] Extend `WorkloadImportsManager` to use the contextual profile (#98682)   via llvm-commits
• [compiler-rt] 2c3eb8d - [nsan] Remove mallopt from nsan_interceptors (#101055)   via llvm-commits
• [llvm] [BOLT][NFC] Keep input icount for disassembled functions (PR #101091)   via llvm-commits
• [llvm] [SandboxIR] Implement CastInst (PR #101097)   via llvm-commits
• [llvm] 17993eb - [Memprof] Adds instrumentation support for memprof with histograms. (#100834)   via llvm-commits
• [llvm] 460a86d - [msan] Precommit tests for Arm NEON VST with lanes (#100645)   via llvm-commits
• [llvm] [SandboxIR][NFC] Removed comments from LoadInst test case (PR #101099)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] 9b14831 - [SandboxIR][NFC] Removed comments from LoadInst test case (#101099)   via llvm-commits
• [llvm] [SandboxIR][NFC] Removed comments from LoadInst test case (PR #101099)   via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   via llvm-commits
• [llvm] Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (PR #101113)   via llvm-commits
• [llvm] [LoongArch] Optimize codegen for ISD::ROTL (PR #100344)   via llvm-commits
• [compiler-rt] [compiler-rt] Implement `DumpAllRegisters` for arm-linux and aarch64-linux (PR #100398)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [llvm] bbde3f6 - [msan] Support vst1x_{2,3,4} and vst_{2,3,4} with floating-point parameters (#100644)   via llvm-commits
• [llvm] 5247959 - AMDGPU: Enable vectorization of v2f16 copysign (#100799)   via llvm-commits
• [llvm] ad80265 - [RISCV] Qualify all XCV predicates with !is64Bit. (#101074)   via llvm-commits
• [llvm] 43de4e0 - [RISCV] Rename hasVInstructionsBF16 to hasVInstructionsBF16Minimal. NFC (#101080)   via llvm-commits
• [compiler-rt] 28f9575 - [compiler-rt] Require glibc for DumpAllRegisters on Linux (#101131)   via llvm-commits
• [llvm] 3e2631c - [LoongArch] Optimize codegen for ISD::ROTL (#100344)   via llvm-commits
• [llvm] 0e6f64c - [LoongArch] Reimplement to prevent Pseudo{CALL, LA*}_LARGE instruction reordering (#100099)   via llvm-commits
• [compiler-rt] 2d6f4d2 - [compiler-rt] DumpAllRegisters implementation for netbsd i386/x86_64. (#99743)   via llvm-commits
• [compiler-rt] 3d14912 - [sanitizer_common][test] Always skip select allocator tests on SPARC V9 (#100530)   via llvm-commits
• [compiler-rt] 9eefe06 - [sanitizer_common][test] Fix SanitizerIoctl/KVM_GET_* tests on Linux/… (#100532)   via llvm-commits
• [compiler-rt] 1c53b90 - [sanitizer_common] Don't use syscall(SYS_clone) on Linux/sparc64 (#100534)   via llvm-commits
• [compiler-rt] 94394ca - [sanitizer_common] Fix signal_line.cpp on SPARC (#100535)   via llvm-commits
• [compiler-rt] 7cecbdf - [sanitizer_common] Adjust signal_send.cpp for Linux/sparc64 (#100538)   via llvm-commits
• [compiler-rt] 1c25f2c - [sanitizer_common][test] Fix InternalMmapWithOffset on 32-bit Linux/s… (#101011)   via llvm-commits
• [compiler-rt] fcd6bd5 - [sanitizer_common] Fix internal_*stat on Linux/sparc64 (#101012)   via llvm-commits
• [llvm] abc2fe3 - [APFloat] Add support for f8E3M4 IEEE 754 type (#99698)   via llvm-commits
• [compiler-rt] 155b7a1 - [Sanitizers] Avoid overload ambiguity for interceptors (#100986)   via llvm-commits
• [compiler-rt] 053bbb6 - [compiler-rt] DumpAllRegisters fix for other unimplemented oses (#101134)   via llvm-commits
• [llvm] 25bea3e - [MC] Forward declare ELFObjectWriter (#100989)   via llvm-commits
• [llvm] 55357d8 - [X86][MC] Add alias for `{evex} cmp` and `{evex} test`. (#99277)   via llvm-commits
• [llvm] b1542af - [RISCV] Rename merge operand -> passthru. NFC (#100330)   via llvm-commits
• [llvm] 2b2f4ae - [llvm-objcopy] Add --change-section-address (#98664)   via llvm-commits
• [llvm] 933b800 - [Support][NFC] Use DomTreeBase methods in SemiNCA (#101059)   via llvm-commits
• [llvm] f6a928a - [Support][NFC] Simplify DomTreeNodeBase::addChild (#101056)   via llvm-commits
• [llvm] 41c0f89 - [CodeGen][ARM64EC] Use alias symbol for exporting hybrid_patchable functions. (#100872)   via llvm-commits
• [llvm] 65697b1 - Remove value cache in SCEV comparator. (#100721)   via llvm-commits
• [llvm] 14dfdc0 - [OptBisect] Add an option to disable print of pass message (#101065)   via llvm-commits
• [llvm] d2b6a8e - AMDGPU: Fix asserting when trying to print scc (#101175)   via llvm-commits
• [compiler-rt] d92a484 - [compiler-rt][AArch64][NFCI] Use CONSTRUCTOR_ATTRIBUTE in sme-abi-vg.c (#101159)   via llvm-commits
• [llvm] b356aa3 - AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)   via llvm-commits
• [llvm] 2033767 - AMDGPU: Cleanup immediate selection patterns (#100787)   via llvm-commits
• [llvm] 6b08e4d - [docs] SourceLevelDebugging: fix metadata references (#101187)   via llvm-commits
• [llvm] 42d641e - AMDGPU/GlobalISel: Select all constants in tablegen (#100788)   via llvm-commits
• [llvm] [Support] Erase blocks after DomTree::eraseNode (PR #101195)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [DWARF] Teach getAttributeValueAsReferencedDie to resolve DW_FORM_ref… (PR #101197)   via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   via llvm-commits
• [llvm] [Support] Assert that DomTree nodes share parent (PR #101198)   via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] d01c051 - [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (#101152)   via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   via llvm-commits
• [polly] 1e5334b - [Polly] Data flow reduction detection to cover more cases (#84901)   via llvm-commits
• [llvm] [RISCV] Fix vmerge.vvm/vmv.v.v getting folded into ops with mismatching EEW (PR #101152)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)   via llvm-commits
• [llvm] Add support for verifying local type units in .debug_names. (PR #101133)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [SandboxIR] Added new StoreInst::create() functions with isVolatile arg (PR #100961)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] 6992ebc - Reapply "[DXIL][Analysis] Make alignment on StructuredBuffer optional" (#101113)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] eb03279 - [SandboxIR] Implement CastInst (#101097)   via llvm-commits
• [llvm] [SandboxIR] Implement CastInst (PR #101097)   via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through copy glue (PR #101210)   via llvm-commits
• [llvm] [SandboxIR] Implement PtrToIntInst (PR #101211)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] 51f7283 - AMDGPU: Remove a pointless SIFunctionResourceInfo::getTotalNumVgprs o… (#101158)   via llvm-commits
• [llvm] [SLP] Cluster SortedBases before sorting. (PR #101144)   via llvm-commits
• [llvm] 9f75270 - [IR] Add per-function numbers to basic blocks (#101052)   via llvm-commits
• [llvm] [msan] Support vst{2,3,4}_lane instructions (PR #101215)   via llvm-commits
• [llvm] [msan] Support vst{2,3,4}_lane instructions (PR #101215)   via llvm-commits
• [llvm] [GlobalMerge] Update the GlobalMerge pass to merge private global variables. (PR #101222)   via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   via llvm-commits
• [llvm] [DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types (PR #101223)   via llvm-commits
• [llvm] 3cc288a - [SandboxIR] Implement PtrToIntInst (#101211)   via llvm-commits
• [llvm] [SandboxIR] Implement PtrToIntInst (PR #101211)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [LLVM][rtsan] Add RealtimeSanitizer transform pass (PR #101232)   via llvm-commits
• [llvm] [GISEL][RISCV] RegBank Scalable Vector Load/Store (PR #99932)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] 9843843 - SelectionDAG: Do not propagate divergence through copy glue (#101210)   via llvm-commits
• [llvm] 245e607 - [LoopSink] Exit loop finding BBs to sink into early when possible (NFC) (#101115)   via llvm-commits
• [llvm] [BOLT] Fix C2360 compiler error with MSVC in Relocation.cpp (PR #101235)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   via llvm-commits
• [clang] [llvm] [HLSL] AST support for WaveSize attribute. (PR #101240)   via llvm-commits
• [llvm] [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (PR #101087)   via llvm-commits
• [llvm] 89b67a6 - [SLP] Cluster SortedBases before sorting. (#101144)   via llvm-commits
• [compiler-rt] 9808f48 - [compiler-rt][builtins] Upstream __isPlatformOrVariantPlatformVersionAtLeast() (#100605)   via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Upstream __isPlatformOrVariantPlatformVersionAtLeast() (PR #100605)   via llvm-commits
• [llvm] [llvm-lit] Resolve env subcommand required error (PR #98414)   via llvm-commits
• [llvm] cdfd884 - [DXIL] Add DXIL version-specific TableGen specification and implementation of DXIL Ops (#97593)   via llvm-commits
• [llvm] [Draft] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] [BOLT][DWARF][NFC] Split DIEBuilder::finish (PR #101244)   via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [clang] [llvm] [cmake][llvm] Limit the number of Xcode schemes created by default (PR #101243)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code (PR #101248)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [clang] [llvm] Add length HLSL function to DirectX Backend (PR #101256)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] e59c832 - [SandboxIR] Implement BitCastInst (#101227)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] 273e74b - [LCSSA] Cache the loop exit blocks across recursive analysis (NFC) (#101087)   via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   via llvm-commits
• [llvm] 39e192b - [Support] Silence warnings when retrieving exported functions (#97905)   via llvm-commits
• [llvm] [llvm-lit] Resolve env subcommand required error (PR #98414)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [llvm-lit] Resolve env subcommand required error (PR #98414)   via llvm-commits
• [llvm] [openmp] [openmp][WebAssembly] Allow openmp to compile and run under emscripten toolchain (PR #95169)   via llvm-commits
• [compiler-rt] [scudo] Support linking with index in IntrusiveList (PR #101262)   via llvm-commits
• [compiler-rt] [scudo] Support linking with index in IntrusiveList (PR #101262)   via llvm-commits
• [llvm] [BOLT][DWARF] Sort GDBIndexTUEntryVector (PR #101264)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [llvm] [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (PR #100550)   via llvm-commits
• [llvm] [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (PR #100550)   via llvm-commits
• [llvm] [Support] Silence warnings when retrieving exported functions (PR #97905)   via llvm-commits
• [llvm] a982cab - [cmake][llvm] Limit the number of Xcode schemes created by default (#101243)   via llvm-commits
• [llvm] [BOLT][NFC] Add timers for MetadataManager invocations (PR #101267)   via llvm-commits
• [llvm] [x86][Windows] Fix chromium build break (PR #101268)   via llvm-commits
• [libc] [llvm] [libc][math] fix header spec bug (PR #101269)   via llvm-commits
• [libc] [llvm] [libc][math] fix header spec bug (PR #101269)   via llvm-commits
• [llvm] 80c0e8d - [x86][Windows] Fix chromium build break (#101268)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   via llvm-commits
• [lldb] [llvm] [Obj2Yaml] Add support for minidump generation with 64b memory ranges. (PR #101272)   via llvm-commits
• [llvm] d2f77eb - [MC/DC][Coverage] Introduce "Bitmap Bias" for continuous mode (#96126)   via llvm-commits
• [llvm] [MVT][TableGen] Extend Machine Value Type to `uint16_t` (PR #99657)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] 7231776 - Recommit "[DAG] Reducing instructions by better legalization handling of AVGFLOORU for illegal data types" (#101223)   via llvm-commits
• [llvm] [RISCV] Remove isel patterns for riscv.vfmerge with vector-vector operands. (PR #101277)   via llvm-commits
• [clang] [llvm] [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (PR #101151)   via llvm-commits
• [llvm] [SandboxIR] Implement BitCastInst (PR #101227)   via llvm-commits
• [llvm] [nsan] minor fix for the nsan pass (PR #101147)   via llvm-commits
• [llvm] fd6faee - [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (#101151)   via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   via llvm-commits
• [llvm] 7c1ddcd - [RISCV] Remove isel patterns for riscv.vfmerge with vector-vector operands. (#101277)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [lld] [ELF] Add -z nosectionheader (PR #101286)   via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   via llvm-commits
• [llvm] Remove redundant null check (PR #100928)   via llvm-commits
• [llvm] 7a80c86 - [MC] Remove redundant null check, NFCI (#100928)   via llvm-commits
• [llvm] [MC] Remove redundant null check, NFCI (PR #100928)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [Object] Refine isData/isBSS criteria (PR #101290)   via llvm-commits
• [llvm] [Object] Refine isData/isBSS criteria (PR #101290)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [mlir] [mlir][Linalg] Deprecate `linalg::tileToForallOp` and `linalg::tileToForallOpUsingTileSizes` (PR #91878)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   via llvm-commits
• [llvm] [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (PR #100550)   via llvm-commits
• [llvm] ee1040b - [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (#100550)   via llvm-commits
• [llvm] [llvm-objdump][BPF] --symbolize-operands: infer local labels for BPF (PR #100550)   via llvm-commits
• [llvm] Delete assignment operator from `MachineBlockFrequencyInfo` (PR #101289)   via llvm-commits
• [llvm] [llvm-lit] Resolve env subcommand required error (PR #98414)   via llvm-commits
• [llvm] 94da6bf - [DirectX] Simplify DXIL_OP_INTRINSIC_MAP tablegen'ed code   via llvm-commits
• [llvm] 4094098 - [DirectX] Simplify tablegen'd OpCode and OpClass enums   via llvm-commits
• [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [libunwind] [llvm] [openmp] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction on sext when folding (shl (sext (add_nsw x, c1)), c2) (PR #68972)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   via llvm-commits
• [llvm] [AArch64] Increase scatter overhead on Neoverse-V2 (PR #101296)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] perf/goldsteinn/deduce cold attrs (PR #101298)   via llvm-commits
• [llvm] perf/goldsteinn/deduce cold attrs (PR #101298)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] 57d10b4 - [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (#99556)   via llvm-commits
• [llvm] [AMDGPU,test] Add one more while-break case (PR #101300)   via llvm-commits
• [llvm] [AMDGPU,test] Add one more while-break case (PR #101300)   via llvm-commits
• [lld] wasm-ld: Add allow-multiple-definition flag (PR #97699)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (PR #101157)   via llvm-commits
• [llvm] AMDGPU: Add testcase for materializing sgpr frame indexes (PR #101306)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [NVPTX][NFC] Remove unneeded declarations in test (PR #101167)   via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   via llvm-commits
• [llvm] [VPlan] Remove the duplicate code when inferring the scalar type of VPValue. NFC (PR #101313)   via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101312)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [CycleInfo] skip unreachable predecessors (PR #101316)   via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   via llvm-commits
• [llvm] dae7fb8 - [AMDGPU, test] Add one more while-break case (#101300)   via llvm-commits
• [llvm] [AMDGPU,test] Add one more while-break case (PR #101300)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [cmake] switch to CMake's native `check_{compiler,linker}_flag` (PR #96171)   via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)   via llvm-commits
• [llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)   via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   via llvm-commits
• [llvm] [InstCombine] Recognize copysign idioms (PR #101324)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (PR #101325)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [RISCV] Use experimental.vp.splat to splat specific vector length elements. (PR #101329)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [llvm] [VPlan][NFC] Make VPValue pointer const. (PR #101334)   via llvm-commits
• [llvm] 05c3a4b - [CycleInfo] skip unreachable predecessors (#101316)   via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   via llvm-commits
• [llvm] [ctx_prof] "Use" support for pre-thinlink. (PR #101338)   via llvm-commits
• [llvm] [SCEV] Handle more adds in computeConstantDifference() (PR #101339)   via llvm-commits
• [llvm] b5a7d3b - [SLP][REVEC] Make Instruction::Select support vector instructions. (#100507)   via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [llvm] [mlir] Add cond_sub and sub_clamp operations to atomicrmw (PR #96661)   via llvm-commits
• [llvm] [LLVM][ISel][SVE] Remove redundant merging fp patterns. (PR #101351)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   via llvm-commits
• [llvm] [BasicAA] MemCpyOpt fix on tail stackrestore (PR #101352)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [compiler-rt] 8b2688b - [scudo] Separated committed and decommitted entries. (#100818)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #100818)   via llvm-commits
• [llvm] [TLI] Add support for nan libfunc (PR #101356)   via llvm-commits
• [llvm] b455edb - [InstCombine] Recognize copysign idioms (#101324)   via llvm-commits
• [llvm] d36c9f8 - [SandboxIR] Implement AddrSpaceCastInst (#101260)   via llvm-commits
• [llvm] [SandboxIR] Implement AddrSpaceCastInst (PR #101260)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [llvm] [SandboxIR] Implement IntToPtrInst (PR #101359)   via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   via llvm-commits
• [lld] [LLD, MachO] Default `objc_relative_method_lists` on MacOS11+/iOS14+ (PR #101246)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Select SHL({Z|S}EXT, DUP Imm) into {U|S}HLL Imm (PR #96782)   via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   via llvm-commits
• [llvm] f0197a7 - [SandboxIR] Implement IntToPtrInst (#101359)   via llvm-commits
• [llvm] [SandboxIR] Implement IntToPtrInst (PR #101359)   via llvm-commits
• [llvm] [SandboxIR] Implement FPToSIInst (PR #101362)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   via llvm-commits
• [llvm] [llvm-ar] Add missing right angle bracket (PR #101364)   via llvm-commits
• [llvm] a847b0f - Remove already implemented target independent optimization opportunity (#101233)   via llvm-commits
• [llvm] Add __attribute__((warn_unused_result)) to LLVMErrorRef (PR #87025)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   via llvm-commits
• [llvm] [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (PR #101366)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] 9718f3d - [SandboxIR] Implement FPToSIInst (#101362)   via llvm-commits
• [llvm] [SandboxIR] Implement FPToSIInst (PR #101362)   via llvm-commits
• [llvm] a4c6ebe - [MVT][TableGen] Extend Machine Value Type to `uint16_t` (#99657)   via llvm-commits
• [llvm] 6d103d7 - [Support] Erase blocks after DomTree::eraseNode (#101195)   via llvm-commits
• [llvm] [SandboxIR] Implement FPToUIInst (PR #101369)   via llvm-commits
• [llvm] [BOLT] Move ADRRelaxationPass (PR #101371)   via llvm-commits
• [llvm] 8b17b12 - [SandboxIR] Implement FPToUIInst (#101369)   via llvm-commits
• [llvm] [SandboxIR] Implement FPToUIInst (PR #101369)   via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   via llvm-commits
• [llvm] 055893f - [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (#100849)   via llvm-commits
• [llvm] [AMDGPU][True16][MC] duplicate vop1 tests to fake16 and update real-true16 flags for GFX12 (PR #100849)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] 6aa723d - [TLI] Add support for nan libfunc (#101356)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [Draft] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] [Draft] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] 6d3317e - [SandboxIR] Implement SIToFPInst (#101374)   via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   via llvm-commits
• [compiler-rt] Revert "[scudo] Separated committed and decommitted entries." (PR #101375)   via llvm-commits
• [compiler-rt] Revert "[scudo] Separated committed and decommitted entries." (PR #101375)   via llvm-commits
• [compiler-rt] 496feda - Revert "[scudo] Separated committed and decommitted entries." (#101375)   via llvm-commits
• [compiler-rt] Revert "[scudo] Separated committed and decommitted entries." (PR #101375)   via llvm-commits
• [llvm] [SandboxIR] Implement UIToFPInst (PR #101377)   via llvm-commits
• [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   via llvm-commits
• [llvm] [PPC] Lower unreachable IR instruction to a trap. (PR #101379)   via llvm-commits
• [llvm] [SCEV] Use power of two facts involving vscale when inferring wrap flags (PR #101380)   via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [RISCV] Use X0 for VLMax for slide1up/slide1down in lowerVectorIntrinsicScalars. (PR #101384)   via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   via llvm-commits
• [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [SandboxIR] Implement SIToFPInst (PR #101374)   via llvm-commits
• [llvm] ef67664 - AMDGPU: Add testcase for materializing sgpr frame indexes (#101306)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   via llvm-commits
• [clang] [llvm] [PPC] Implement BCD assist builtins (PR #101390)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [mlir] [mlir][Linalg] Deprecate `linalg::tileToForallOp` and `linalg::tileToForallOpUsingTileSizes` (PR #91878)   via llvm-commits
• [llvm] [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD* (PR #101393)   via llvm-commits
• [lld] 5d972c5 - [ELF] Add -z nosectionheader   via llvm-commits
• [llvm] bf5e56d - [NFC][LLVM] Add RealtimeSanitizer LLVM code owners (#101231)   via llvm-commits
• [llvm] 3626443 - [RISCV] Use X0 for VLMax for slide1up/slide1down in lowerVectorIntrinsicScalars. (#101384)   via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   via llvm-commits
• [libcxx] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [Offload][OpenMP] Prettify error messages by "demangling" the kernel name (PR #101400)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [SCEV] Consolidate code for proving wrap flags of controlling finite IVs (PR #101404)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Implement UIToFPInst (PR #101377)   via llvm-commits
• [llvm] [SandboxIR] Implement UIToFPInst (PR #101377)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] 7583c48 - [SCEV] Use power of two facts involving vscale when inferring wrap flags (#101380)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [SCEV] Prove no-self-wrap from negative power of two step (PR #101416)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [Offload] Introduce the offload sanitizer (initially for traps) (PR #101417)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] [Offload] Introduce the offload sanitizer (initially for traps) (PR #101417)   via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   via llvm-commits
• [llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)   via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   via llvm-commits
• [llvm] [Offload] Sanitize "standalone" unreachable instructions (PR #101425)   via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   via llvm-commits
• [llvm] [SandboxIR][NFC] Move BasicBlock class definition up (PR #101422)   via llvm-commits
• [llvm] ee0f43a - [SandboxIR][NFC] Move BasicBlock class definition up (#101422)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] a0d8fa5 - [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (#84965)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] 1c66ef9 - [GISEL][RISCV] RegBank Select for Scalable Vector Load/Store (#99932)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   via llvm-commits
• [llvm] [RISCV][GISel] Slightly simplify the regbank selection for G_LOAD/STORE. NFC (PR #101431)   via llvm-commits
• [llvm] 3403b59 - [SandboxIR] Implement PHINodes (#101111)   via llvm-commits
• [llvm] [SandboxIR] Implement PHINodes (PR #101111)   via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   via llvm-commits
• [compiler-rt] 3a4c7cc - Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (#101392)   via llvm-commits
• [compiler-rt] Forward declare OSSpinLockLock on MacOS since it's not shipped on the system. (PR #101392)   via llvm-commits
• [llvm] [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (PR #101427)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] Restore (PR #101435)   via llvm-commits
• [llvm] 307d124 - [LegalizeTypes][RISCV][LoongArch] Optimize promotion of ucmp. (#101366)   via llvm-commits
• [llvm] 1c5f6cf - [DirectX] Rename backend DXIL resource analysis passes to DXILResourceMD*. NFC   via llvm-commits
• [llvm] Restore (PR #101435)   via llvm-commits
• [llvm] [InstCombine] Add an option to skip simplification on call instruction where a non-void return value is expected while the callee returns void (PR #98536)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] 87af9ee - [RISCV] Use experimental.vp.splat to splat specific vector length elements. (#101329)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile member function to LoadInst and StoreInst (PR #101284)   via llvm-commits
• [llvm] e2c74aa - [TableGen][MVT] Lower the maximum 16-bit MVT from 16384 to 511. (#101401)   via llvm-commits
• [llvm] a1ba4fb - [RISCV][GISel] Slightly simplify the regbank selection for G_LOAD/STORE. NFC (#101431)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [llvm] e6aeb3f - [MemProf] Fix when function has indirect call (#101170)   via llvm-commits
• [llvm] [MemProf] Fix when function has indirect call (PR #101170)   via llvm-commits
• [llvm] 9227fd7 - [SandboxIR][NFC] Factor out common test for CastInst subclasses (#101410)   via llvm-commits
• [llvm] [SandboxIR][NFC] Factor out common test for CastInst subclasses (PR #101410)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] 430b90f - [nsan][NFC] Use cast when dyn_cast is not needed. (#101147)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   via llvm-commits
• [llvm] 27b6080 - [RISCV] Increase default tail duplication threshold to 6 at -O3 (#98873)   via llvm-commits
• [llvm] 991a621 - [TargetLowering] Remove weird use of MVT::isVoid in an assert. (#101436)   via llvm-commits
• [llvm] 86815a1 - AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (#101325)   via llvm-commits
• [llvm] [LICM] Prevent LICM of ptrtoint and inttoptr when using non-integral pointers (PR #97272)   via llvm-commits
• [llvm] 72ed808 - [MIR] Remove separate Size variable from parseMachineMemoryOperand. NFC (#101453)   via llvm-commits
• [llvm] AMDGPU: Cleanup extract_subvector actions (PR #101454)   via llvm-commits
• [llvm] 129a8e1 - [AArch64] Add tests for redundant csel instructions. NFC (#101014)   via llvm-commits
• [llvm] [AArch64] Add tests for redundant csel instructions. NFC (PR #101014)   via llvm-commits
• [llvm] [FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function (PR #101298)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (PR #101452)   via llvm-commits
• [llvm] Optimize count leading ones if promoted type (PR #99591)   via llvm-commits
• [llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)   via llvm-commits
• [llvm] 972c029 - [GlobalISel][TableGen] MIR Pattern Variadics (#100563)   via llvm-commits
• [llvm] ab33c3d - [GlobalISel][TableGen] Make variadic-errors.td test more robust   via llvm-commits
• [llvm] 1d2b2d2 - AMDGPU: Cleanup extract_subvector actions (NFC) (#101454)   via llvm-commits
• [llvm] [RISCV] Support f16 vmv.v.v and vmerge.vvm intrinsics with Zvfhmin. (PR #101457)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   via llvm-commits
• [llvm] [SimplifyLibCalls] Constant fold nan libcall (PR #101459)   via llvm-commits
• [llvm] fdce0bf - [RISCV] Add back missing vmv_v_x_vl pattern predicates (#101455)   via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   via llvm-commits
• [llvm] [ELFAttributeParser][NFC] Make string array arguments `const` (PR #101460)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [compiler-rt] [compiler-rt] Support building runtimes for Windows on arm32 (PR #101462)   via llvm-commits
• [llvm] Llvm cgdata retry (PR #101461)   via llvm-commits
• [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)   via llvm-commits
• [llvm] [PowerPC] Utilize `getReservedRegs` to find asm clobberable registers. (PR #99766)   via llvm-commits
• [llvm] [clang][LoongArch] Align global symbol by size (PR #101309)   via llvm-commits
• [llvm] [LoongArch] Align stack objects passed to memory intrinsics (PR #101309)   via llvm-commits
• [llvm] [LoongArch] Align stack objects passed to memory intrinsics (PR #101309)   via llvm-commits
• [llvm] 4f42deb - [SimplifyLibCalls] Constant fold nan libcall (#101459)   via llvm-commits
• [llvm] [NVPTX][NFC] Remove unneeded declarations in test (PR #101167)   via llvm-commits
• [llvm] 65c000a - Simplify hot-path size computations in BumpPtrAllocator. (#101312)   via llvm-commits
• [llvm] 3611c0b - [AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (#101157)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [llvm] Simplify hot-path size computations in BumpPtrAllocator. (PR #101467)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] 05d3f5e - [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (#100940)   via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Fix type suffix for matrix.multiply.* (PR #100940)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [DAG] Support saturated truncate (PR #99418)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [SPIR-V] Emit valid Lifestart/Lifestop instructions (PR #98475)   via llvm-commits
• [llvm] 0a5e572 - [Inliner] Fix bugs for partial inlining with vector   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)   via llvm-commits
• [llvm] AMDGPU: Improve cost handling of canonicalize (PR #101479)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [llvm] 241a05a - Revert "[Inliner] Fix bugs for partial inlining with vector"   via llvm-commits
• [llvm] [NewGVN] Relax conditions when checking safety of memory accesses (PR #98609)   via llvm-commits
• [llvm] [NewGVN] Relax conditions when checking safety of memory accesses (PR #98609)   via llvm-commits
• [llvm] [Inliner] Fix bugs for partial inlining with vector (PR #101481)   via llvm-commits
• [llvm] [Inliner] Fix bugs for partial inlining with vector (PR #101481)   via llvm-commits
• [llvm] [Inliner] Fix bugs for partial inlining with vector (PR #101481)   via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   via llvm-commits
• [llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)   via llvm-commits
• [llvm] 1fbd7be - [LLVM][ISel][SVE] Remove redundant merging fp patterns. (#101351)   via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   via llvm-commits
• [llvm] [AArch64] Peephole optimization to remove redundant csel instructions (PR #101483)   via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   via llvm-commits
• [llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)   via llvm-commits
• [llvm] 5d7357c - [Clang] Fix definition of layout-compatible to ignore empty classes (#92103)   via llvm-commits
• [llvm] [LLVM][ISel][SVE] Add patterns for merging reverse subtracts. (PR #101488)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation without checking alias of current global value at first. (PR #101489)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation without checking alias of current global value at first. (PR #101489)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation without checking alias of current global value at first. (PR #101489)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation without checking alias of current global value at first. (PR #101489)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] 4e89d11 - [InstCombine] Convert mem intrinsic with null into a noop (#100388)   via llvm-commits
• [llvm] [NVPTX][NFC] Update test to use bfloat type (PR #101493)   via llvm-commits
• [llvm] [DataLayout] Remove deprecated method (PR #101495)   via llvm-commits
• [llvm] e7630a0 - AMDGPU: Improve cost handling of canonicalize (#101479)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Use isRegisterClassType to check for legal types for G_FREEZE & G_IMPLICIT_DEF (PR #101331)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] 1a5d892 - [ConstantRange] Add support for `shlWithNoWrap` (#100594)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] 68df06a - [Hexagon] Do not optimize address of another function's block (#101209)   via llvm-commits
• [llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [Hexagon] Fix concat lowering for HVX for 64B vector length (PR #98318)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] 2771ea4 - [Hexagon] Fix concat lowering for HVX for 64B vector length (#98318)   via llvm-commits
• [llvm] [Hexagon] Fix concat lowering for HVX for 64B vector length (PR #98318)   via llvm-commits
• [llvm] [Hexagon] Fix concat lowering for HVX for 64B vector length (PR #98318)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [GlobalISel][TableGen] MIR Pattern Variadics (PR #100563)   via llvm-commits
• [clang] [llvm] [Sanitizer] Make sanitizer passes idempotent (PR #99439)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] 7da1dbb - [MachO] Remove redundant bounds check (#100176)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [lld] 0af07c0 - [ELF] Support relocatable files using CREL with explicit addends   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] d68a4d5 - [SandboxIR][NFC] Introduce templated CastInstImpl to simplify subclasses (#101427)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] bc747c3 - [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (#101415)   via llvm-commits
• [llvm] [InstCombine] Fold isnan idioms (PR #101510)   via llvm-commits
• [lld] [LLD, MachO] Default objc_relative_method_lists on MacOS11+/iOS14+ (PR #101360)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (PR #100748)   via llvm-commits
• [llvm] [cmake] Optimize RelWithDebInfo compiler options on windows (PR #101533)   via llvm-commits
• [compiler-rt] [compiler-rt][nsan] Add support for nan detection (PR #101531)   via llvm-commits
• [llvm] `InOrderIssueStage` for llvm-mca should be generic over LSUnitBase (PR #101534)   via llvm-commits
• [llvm] [SandboxIR] Implement the remaining CastInst sub-classes (PR #101537)   via llvm-commits
• [llvm] 41439d5 - AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)   via llvm-commits
• [llvm] ab91371 - [AMDGPU][True16][MC] Support v_swap_b16. (#100442)   via llvm-commits
• [llvm] [AMDGPU][True16][MC] Support v_swap_b16. (PR #100442)   via llvm-commits
• [lld] f95bd62 - [lld][InstrProf] Add "Separate" irpgo-profile-sort option (#101084)   via llvm-commits
• [llvm] Globalopt pass produces invalid debug info (PR #100654)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] workflows: Fix libclc-tests (PR #101524)   via llvm-commits
• [llvm] b6b0a24 - [SandboxIR] Implement the remaining CastInst sub-classes (#101537)   via llvm-commits
• [llvm] [SandboxIR] Implement the remaining CastInst sub-classes (PR #101537)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [clang] [llvm] [AArch64] Add updated FEAT_SVE_B16B16 and begin replacement of 'b16b16' flag (PR #101480)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] [MC] Add .loc_label instruction (PR #99710)   via llvm-commits
• [llvm] 5e84646 - [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (#101549)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] f0944f4 - [SCEV] Prove no-self-wrap from negative power of two step (#101416)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [clang] [llvm] [LV] Support generating masks for switch terminators. (PR #99808)   via llvm-commits
• [llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)   via llvm-commits
• [compiler-rt] c584c42 - [asan] Speed up ASan ODR indicator-based checking (#100923)   via llvm-commits
• [compiler-rt] [asan] Speed up ASan ODR indicator-based checking (PR #100923)   via llvm-commits
• [llvm] 289c049 - Simplify hot-path size computations in BumpPtrAllocator. (#101467)   via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] Add __size_returning_new variant detection to TLI. (PR #101564)   via llvm-commits
• [llvm] [RISCV][GISel] Don't custom legalize load/store of vector of pointers if ELEN < XLEN. (PR #101565)   via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE printf test incompatible with glibc 2.40 (PR #101566)   via llvm-commits
• [compiler-rt] [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40 (PR #101566)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] [RISCV][GISel] Support nxv16p0 for RV32. (PR #101573)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101574)   via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101575)   via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101575)   via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101575)   via llvm-commits
• [compiler-rt] [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp (PR #101575)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] Workflows: Add composite actions for managing sccache caches for a PR (PR #101578)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [llvm] b6a2eb0 - Add support for verifying local type units in .debug_names. (#101133)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [NFC] Remove reference to Differential (PR #101587)   via llvm-commits
• [llvm] f9392fc - [SandboxIR] Implement UnaryInstruction class (#101541)   via llvm-commits
• [llvm] [SandboxIR] Implement UnaryInstruction class (PR #101541)   via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   via llvm-commits
• [llvm] [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (PR #101589)   via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   via llvm-commits
• [llvm] [llvm-lit] Unhashable TypeError Support (PR #101590)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-CONVERT new instructions. (PR #101600)   via llvm-commits
• [llvm] [cmake] Optimize RelWithDebInfo compiler options on windows (PR #101533)   via llvm-commits
• [clang] [llvm] [Clang] Fix nomerge attribute not working with __builtin_trap(), __debugbreak(), __builtin_verbose_trap() (PR #101549)   via llvm-commits
• [llvm] [Inliner] Fix bugs for partial inlining with vector (PR #101481)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-BF16 new instructions. (PR #101603)   via llvm-commits
• [llvm] 9373a43 - [Attributor] Indicate optimistic fixed point if an instruction already has non-zero address space (#101589)   via llvm-commits
• [llvm] [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (PR #98536)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [LoongArch] Align stack objects passed to memory intrinsics (PR #101309)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   via llvm-commits
• [llvm] [RISCV] Generalize existing SRA combine to fix #101040. (PR #101610)   via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   via llvm-commits
• [llvm] 10bad2c - [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)   via llvm-commits
• [compiler-rt] [scudo] Separated committed and decommitted entries. (PR #101409)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [compiler-rt] Test PR, please ignore (PR #100439)   via llvm-commits
• [llvm] 2e0588d - Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (#101612)   via llvm-commits
• [clang] [compiler-rt] [llvm] Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (PR #101612)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] 60a7d33 - [LVI][NFC] Delete an outdated comment (#101504)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   via llvm-commits
• [llvm] [AMDGPU] Auto-generate lit pattern for test CodeGen/AMDGPU/merge-sbuffer-load.mir. (PR #101618)   via llvm-commits
• [clang] [llvm] [RISCV] Support bf16 vmv.v.v and vmerge.vvm intrinsics with `zvfbfmin` (PR #101611)   via llvm-commits
• [compiler-rt] 46bc11d - [NFC][asan] Use Thread Safety Analysis in asan_globals.cpp   via llvm-commits
• [compiler-rt] 54a940b - [NFC][asan] Switch to IntrusiveList in asan_globals (#101577)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #96264)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw` (PR #101622)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw` (PR #101622)   via llvm-commits
• [llvm] goldsteinn/noreturn on exit abort (PR #101623)   via llvm-commits
• [llvm] goldsteinn/noreturn on exit abort (PR #101623)   via llvm-commits
• [llvm] goldsteinn/noreturn on exit abort (PR #101623)   via llvm-commits
• [llvm] [TLI] Add `noreturn` on `exit`, `_Exit` and `abort` (PR #101623)   via llvm-commits
• [llvm] [TLI] Add `noreturn` on `exit`, `_Exit` and `abort` (PR #101623)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [AArch64] Fix MatchDup Lane Out Of Range In AArch64 (PR #101275)   via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (PR #101626)   via llvm-commits
• [llvm] 85c5265 - [SCEV] Unify and optimize constant folding (NFC) (#101473)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [llvm] [Utils] Add new merge-release-pr.py script. (PR #101630)   via llvm-commits
• [clang] [compiler-rt] [llvm] [RISCV] Support new groupid/bitmask for cpu_model (PR #101632)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #101637)   via llvm-commits
• [llvm] [BinaryFormat] Disable MachOTest.UnalignedLC on SPARC (PR #100086)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #101637)   via llvm-commits
• [llvm] [LV][EVL] Introduce MergeUntilPivot VPInstruction to enable out-loop reduction in EVL vectorization. (PR #101641)   via llvm-commits
• [llvm] [SCEV] Avoid erase+insert in constant folding (NFC) (PR #101642)   via llvm-commits
• [llvm] [SCEV] Avoid erase+insert in constant folding (NFC) (PR #101642)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #101637)   via llvm-commits
• [llvm] 08decd2 - [WebAssembly] load_zero to initialise build_vector (#100610)   via llvm-commits
• [llvm] [APFloat] Fix `IEEEFloat::addOrSubtractSignificand` and `IEEEFloat::normalize` (PR #98721)   via llvm-commits
• [llvm] fb470db - [AArch64] Avoid inlining if ZT0 needs preserving. (#101343)   via llvm-commits
• [llvm] 92e18ff - [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (#99752)   via llvm-commits
• [clang] [llvm] [NVPTX] Support __usAtomicCAS builtin (PR #99646)   via llvm-commits
• [llvm] [FastISel] Don't use sizeWithoutDebug() for debug records (PR #101648)   via llvm-commits
• [llvm] 92fbc96 - [AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)   via llvm-commits
• [llvm] [WIP] v_lshrrev uses vector register operand in wave space after scaling offset materialization in v_mad (PR #101649)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] StructurizeCFG: Optimize phi insertion during ssa reconstruction (PR #101301)   via llvm-commits
• [llvm] 84b1e59 - [MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples (#100156)   via llvm-commits
• [llvm] [VP] Merge ExpandVP pass into PreISelIntrinsicLowering (PR #101652)   via llvm-commits
• [llvm] aa0a33b - [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)   via llvm-commits
• [llvm] [InstCombine] Factorise add/sub and max/min using distributivity (PR #101507)   via llvm-commits
• [llvm] [llvm] Make InstSimplifyFolder constructor explicit (NFC) (PR #101654)   via llvm-commits
• [llvm] [llvm] Make InstSimplifyFolder constructor explicit (NFC) (PR #101654)   via llvm-commits
• [llvm] 79af689 - [SCEV] Handle more adds in computeConstantDifference() (#101339)   via llvm-commits
• [llvm] adac04f - [AMDGPU] Fix using wrong register in frame index shift (#101649)   via llvm-commits
• [llvm] [StructuralHashPrinter] Always print 16-digit hash (PR #101655)   via llvm-commits
• [clang] [llvm] [NVPTX] Support __usAtomicCAS builtin (PR #99646)   via llvm-commits
• [llvm] 1525abb - [FastISel] Don't use sizeWithoutDebug() for debug records (#101648)   via llvm-commits
• [llvm] Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (PR #101658)   via llvm-commits
• [llvm] [SLP]Support vectorization of small strided loads only graph. (PR #101659)   via llvm-commits
• [llvm] [llvm][SandboxIR] Fix some clang-cl warnings on Windows (PR #101660)   via llvm-commits
• [llvm] 58964c8 - Revert "[llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (#100301)" (#101658)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [llvm] [llvm][CodeGen] Address the issue of multiple resource reservations In window scheduling (PR #101665)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [llvm] 423aec6 - [NFC][AMDGPU] Reformat code for creating AA (#101591)   via llvm-commits
• [llvm] [VP] Provide createAlignedLoad to emit VP load instruction. (PR #101666)   via llvm-commits
• [clang] [llvm] [NVPTX] Support __usAtomicCAS builtin (PR #99646)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [llvm] [SLP]Try detect strided loads, if any pointer op require extraction. (PR #101668)   via llvm-commits
• [llvm] 23609a3 - [llvm-profgen] Revert #99826 and #99026 (#100147)   via llvm-commits
• [llvm] [LegacyPM] Drop analysis groups (PR #101670)   via llvm-commits
• [llvm] dba3dfa - [InstCombine] Fold isnan idioms (#101510)   via llvm-commits
• [llvm] 4e93b16 - [llvm] Make InstSimplifyFolder constructor explicit (NFC) (#101654)   via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   via llvm-commits
• [llvm] [GlobalISel] Look between instructions to be matched (PR #101675)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [compiler-rt] Test diff, please ignore (PR #101349)   via llvm-commits
• [compiler-rt] Test PR for a test, please ignore (PR #101349)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Align map clause generation and fix issue with non-shared allocations for assumed shape/size descriptor types (PR #97855)   via llvm-commits
• [llvm] [AMDGPU] Optimize the register uses if offset inlinable (PR #101676)   via llvm-commits
• [llvm] [AArch64] Avoid NEON dot product in streaming[-compatible] functions (PR #101677)   via llvm-commits
• [compiler-rt] [compiler-rt][ASan] Remove alignment message in ASan error reporting (PR #94103)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Align map clause generation and fix issue with non-shared allocations for assumed shape/size descriptor types (PR #97855)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Add ADDO combine to the postlegalizer combiner (PR #101327)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Add ADDO combine to the postlegalizer combiner (PR #101327)   via llvm-commits
• [llvm] [LLVM][SME] Allow optional auto-vectorisation for streaming functions. (PR #101679)   via llvm-commits
• [llvm] 293df8a - [LegacyPM] Drop analysis groups (#101670)   via llvm-commits
• [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #96264)   via llvm-commits
• [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #96264)   via llvm-commits
• [llvm] [TLI] Add `noreturn` on `exit`, `_Exit` and `abort` (PR #101623)   via llvm-commits
• [llvm] [TLI] Add support for inferring attr `cold`/`noreturn` on `std::terminate` and `__cxa_throw` (PR #101622)   via llvm-commits
• [llvm] 461126c - [AArch64] Fix incorrectly getting the destination reg of an insn (#101205)   via llvm-commits
• [llvm] 12937b1 - [AArch64] Avoid NEON dot product in streaming[-compatible] functions (#101677)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] Fixes #101613 (PR #101686)   via llvm-commits
• [llvm] Fixes #101613 (PR #101686)   via llvm-commits
• [llvm] Fixes #101613 simple check to ignore Inline asm fwait insertion (PR #101686)   via llvm-commits
• [llvm] Fixes #101613 simple check to ignore Inline asm fwait insertion (PR #101686)   via llvm-commits
• [llvm] [BOLT] Support map other function entry address (PR #101466)   via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] __ptr32 support for z/OS (PR #101696)   via llvm-commits
• [llvm] 8d5cc01 - [AArch64] Optimize two large shifts and a combine into a single combine and shift (#99480)   via llvm-commits
• [llvm] [AArch64] Optimize two large shifts and a combine into a single combine and shift (PR #99480)   via llvm-commits
• [llvm] [llvm][SandboxIR] Fix some clang-cl warnings on Windows (PR #101660)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [llvm] 4aac78d - [RISCV] Generalize existing SRA combine to fix #101040. (#101610)   via llvm-commits
• [llvm] 6c36716 - [InstCombine] Remove transformation on call instruction where return value need void to non-void conversion (#98536)   via llvm-commits
• [llvm] [Support] Use block numbers for DomTree construction (PR #101706)   via llvm-commits
• [llvm] [Support] Store dominator tree nodes in a vector (PR #101705)   via llvm-commits
• [llvm] Add IntrWillReturn to intrinsics (PR #101562)   via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   via llvm-commits
• [llvm] [NVPTX] Emit `NVPTXISD::DYNAMIC_STACKALLOC`'s chain (PR #101714)   via llvm-commits
• [compiler-rt] d6649f2 - [AArch64][SME] Rewrite __arm_sc_memset to remove invalid instruction (#101522)   via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   via llvm-commits
• [compiler-rt] bbdccf4 - [asan,test] Disable _FORTIFY_SOURCE test incompatible with glibc 2.40   via llvm-commits
• [compiler-rt] 982cfae - [test][asan] Check for order of DynInitPoison (#101584)   via llvm-commits
• [llvm] [GlobalISel][TableGen] Fix match-table-variadics tests label checking (PR #101625)   via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   via llvm-commits
• [llvm] [LangRef] Clarify semantics of masked vector load/store (PR #82469)   via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   via llvm-commits
• [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)   via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [Sample Profile] Expand functionality of llvm-profdata function filter (PR #101615)   via llvm-commits
• [llvm] [InstCombine] Fold `(X & Mask) == 0 ? TC : FC -> TC binop (X & Mask)` (PR #100437)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] [SPIR-V] Improve test suite pass rate when expensive checks are on (PR #101732)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [PowerPC] Fix codegen for transparent_union function params (PR #101738)   via llvm-commits
• [clang] [llvm] [PowerPC] Fix codegen for transparent_union function params (PR #101738)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (PR #101740)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] 858bea8 - [LangRef] Adjust the documentation of some fast-math flags. (#99557)   via llvm-commits
• [llvm] Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (PR #101740)   via llvm-commits
• [llvm] ADT: Add non-const overload of PackedVector::raw_bits() (PR #101742)   via llvm-commits
• [llvm] [LV]Process alloca in isPredicatedInst for tail-folded analysis. (PR #101743)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] 5edb493 - ADT: Add non-const overload of PackedVector::raw_bits() (#101742)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] [llvm-lit] Fixing lit's Internal Shell's Unhashable TypeError (PR #101590)   via llvm-commits
• [compiler-rt] Fix prctl to handle PR_GET_PDEATHSIG. (PR #101749)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [compiler-rt] Fix prctl to handle PR_GET_PDEATHSIG. (PR #101749)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [NFC][ModuleUtils] Rename test function (PR #101750)   via llvm-commits
• [llvm] [TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (PR #101751)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [compiler-rt] 72a514f - [NFC][asan] Report DynInitUnPoison (#101586)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] ab819d7 - [Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [llvm-lit] Fix Unhashable TypeError when using lit's internal shell (PR #101590)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] [llvm-lit][test] Precommit tests for lit's built-in cat command (PR #101530)   via llvm-commits
• [llvm] [libc] add sin/cos/tan functions to bazel build file (PR #101756)   via llvm-commits
• [llvm] [libc] add sin/cos/tan functions to bazel build file (PR #101756)   via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   via llvm-commits
• [clang] [llvm] [OpenMP]Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [compiler-rt] b0b4906 - [compiler-rt] Call __sys_mmap in internal_mmap on FreeBSD   via llvm-commits
• [clang] [llvm] [OpenMP] Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [compiler-rt] 1ae837a - [compiler-rt] Update AllSupportedArchDefs.cmake for FreeBSD   via llvm-commits
• [llvm] [NFC][llvm][support] rename INFINITY in regcomp (PR #101758)   via llvm-commits
• [llvm] [NFC][llvm][support] rename INFINITY in regcomp (PR #101758)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [ADT] Add `<cstdint>` to SmallVector (PR #101761)   via llvm-commits
• [llvm] 8cf8565 - [DirectX] Make DXILOpBuilder's API more useable   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [SandboxIR] Implement missing PHINode functions (PR #101734)   via llvm-commits
• [llvm] [llvm-lit] Fix Unhashable TypeError when using lit's internal shell (PR #101590)   via llvm-commits
• [llvm] 88ef76c - [NFC][ModuleUtils] Rename test function (#101750)   via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   via llvm-commits
• [llvm] 4527fba - Revert "[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall" (#101740)   via llvm-commits
• [llvm] 043ec2f - [test][asan] Precommit test (#101769)   via llvm-commits
• [llvm] a0a9bf5 - [NFC][ModuleUtils] Test appendToGlobalCtors/appendToGlobalDtors (#101753)   via llvm-commits
• [llvm] workflows/release-binaries: Fix problem with python installation on macos-14 (PR #101774)   via llvm-commits
• [llvm] Add support for verifying .debug_names in split DWARF for CUs and TUs. (PR #101775)   via llvm-commits
• [llvm] 048cf88 - [ModuleUtils] Add transformGlobal{C, D}tors (#101757)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [llvm] [DirectX] Add triples to two tests after #97593 (PR #101779)   via llvm-commits
• [llvm] 1c7540c - [DirectX] Add triples to two tests after #97593 (#101779)   via llvm-commits
• [clang] [llvm] [OpenMP] Generate implicit default mapper for mapping array section. (PR #101101)   via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   via llvm-commits
• [llvm] ba4da5a - [ctx_prof] "Use" support for pre-thinlink. (#101338)   via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   via llvm-commits
• [llvm] 259ca9e - Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (#101616)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 VNNI FP16/INT8/INT16 new instructions (PR #101783)   via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store to legalize `EXTRACT_VECTOR_ELT` type when Stack is non-realignable (PR #98176)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [compiler-rt] [sanitizer] Optimize DenseMap::{find, erase} (PR #101785)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   via llvm-commits
• [llvm] ed5b0e1 - Add length builtins and length HLSL function to DirectX Backend (#101256)   via llvm-commits
• [llvm] 95b366c - [SandboxIR] Add setVolatile function to LoadInst and StoreInst (#101759)   via llvm-commits
• [llvm] [SandboxIR] Added setVolatile function to LoadInst and StoreInst (PR #101759)   via llvm-commits
• [llvm] workflows/release-binaries: Disable flang on macOS X64 (PR #101790)   via llvm-commits
• [llvm] workflows: Re-implement the get-llvm-version action as a composite action (PR #101569)   via llvm-commits
• [llvm] 8bd9ade - [InstCombine] Fold `fcmp pred sqrt(X), 0.0 -> fcmp pred2 X, 0.0` (#101626)   via llvm-commits
• [llvm] 8f39502 - [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (#101766)   via llvm-commits
• [llvm] [llvm-profdata] Enabled functionality to write split-layout profile (PR #101795)   via llvm-commits
• [llvm] [llvm-profdata] Enabled functionality to write split-layout profile (PR #101795)   via llvm-commits
• [llvm] [AMDGPU] Include `<cstdint>` in AMDGPUMCTargetDesc (PR #101766)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)   via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   via llvm-commits
• [llvm] [InstCombine][WIP] Fold `(binop VarTwoPossibleVals, C)` to `select` (PR #101731)   via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   via llvm-commits
• [llvm] [GlobalIsel][AArch64] Add ADDO combine to the postlegalizer combiner (PR #101327)   via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   via llvm-commits
• [compiler-rt] [compiler-rt] [test] Add an XFAIL for the initialization-nobug.cpp test on mingw (PR #101814)   via llvm-commits
• [llvm] a3cf864 - [AArch64] Cleanup existing values in getMemOpInfo (#98196)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] 79f7630 - [LangRef] Clarify semantics of masked vector load/store (#82469)   via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   via llvm-commits
• [llvm] [SLP] The order of store chains needs to consider the size of the values. (PR #101810)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   via llvm-commits
• [compiler-rt] [test][asan] Check for order of DynInitPoison (PR #101584)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support YMM rounding new instructions (PR #101825)   via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   via llvm-commits
• [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing (PR #101822)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Sign Bit (PR #101822)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Sign Bit (PR #101822)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Sign Bit (PR #101822)   via llvm-commits
• [compiler-rt] 242e8b9 - [NFC][asan] Switch from list to DynInitGlobalsByModule (#101596)   via llvm-commits
• [llvm] [InstCombine] Missed optimization for select a%2==0, (a/2*2)*(a/2*2), 0 (PR #92658)   via llvm-commits
• [llvm] [LLVM] [X86] Fix integer overflows in frame layout for huge frames (PR #101840)   via llvm-commits
• [llvm] [CodeGen] Construct SmallVector with ArrayRef (NFC) (PR #101841)   via llvm-commits
• [llvm] [ConstantRange] Improve `shlWithNoWrap` (PR #101800)   via llvm-commits
• [llvm] [InstCombine] Factorise Add and Min/Max using Distributivity (PR #101717)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   via llvm-commits
• [llvm] 85da961 - [SandboxIR][Tracker] Track InsertIntoBB (#101595)   via llvm-commits
• [llvm] [SandboxIR][Tracker] Track InsertIntoBB (PR #101595)   via llvm-commits
• [compiler-rt] 3a7861e - [NFC][asan] Track current dynamic init module (#101597)   via llvm-commits
• [compiler-rt] 63a7786 - [builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (#101662)   via llvm-commits
• [compiler-rt] 3368a32 - [sanitizer_common] Fix UnwindFast on SPARC (#101634)   via llvm-commits
• [compiler-rt] [builtins] Fix divtc3.c etc. compilation on Solaris/SPARC with gcc (PR #101662)   via llvm-commits
• [compiler-rt] [sanitizer_common] Fix UnwindFast on SPARC (PR #101634)   via llvm-commits
• [llvm] Test faild with amd. (PR #101781)   via llvm-commits
• [clang] [llvm] [BPF] introduce `__attribute__((bpf_fastcall))` (PR #101228)   via llvm-commits
• [llvm] [Transforms] Construct SmallVector with ArrayRef (NFC) (PR #101851)   via llvm-commits
• [llvm] [Transforms] Construct SmallVector with ArrayRef (NFC) (PR #101851)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] b7146ae - [Transforms] Construct SmallVector with ArrayRef (NFC) (#101851)   via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #101855)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Attributor] Improve debug string of `AAUnderlyingObjects` (PR #101861)   via llvm-commits
• [llvm] [Attributor] Fix an issue that an access is skipped by mistake (PR #101862)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [TargetLowering] Fix the problem of emulated-TLS implementation witho… (PR #101490)   via llvm-commits
• [llvm] [gSYM] Add support merged functions in gSYM format (PR #101604)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (PR #101838)   via llvm-commits
• [llvm] [Metadata] Use const APInt &. NFC (PR #101865)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] workflows/release-binaries-all: Pass secrets on to release-binaries workflow (PR #101866)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] Optimize fptrunc(x)>=C1 --> x>=C2 (PR #99475)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] 533190a - [InstCombine] Canonicalize Bit Testing by Shifting to Bit 0 (#101838)   via llvm-commits
• [llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)   via llvm-commits
• [lld] [NFC][lld][ELF] move "initSymbolAnchors" to "lld/ELF/Writer.cpp" (#101867) (PR #101869)   via llvm-commits
• [lld] [NFC][lld][ELF] move "initSymbolAnchors" to "lld/ELF/Writer.cpp" (PR #101869)   via llvm-commits
• [lld] [NFC][lld][ELF] move "initSymbolAnchors" to "lld/ELF/Writer.cpp" (PR #101869)   via llvm-commits
• [lld] [NFC][lld][ELF] move "initSymbolAnchors" to "lld/ELF/Writer.cpp" (PR #101869)   via llvm-commits
• [llvm] 8d1b17b - [CodeGen] Construct SmallVector with ArrayRef (NFC) (#101841)   via llvm-commits
• [lld] [NFC][lld][ELF] move "initSymbolAnchors" to "lld/ELF/Writer.cpp" (PR #101869)   via llvm-commits
• [llvm] [TableGen] Construct SmallVector with ArrayRef (NFC) (PR #101870)   via llvm-commits
• [llvm] [llvm] Construct SmallVector with ArrayRef (NFC) (PR #101872)   via llvm-commits
• [llvm] 4377656 - [Metadata] Try to merge the first and last ranges. (#101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] [Metadata] Try to merge the first and last ranges. (PR #101860)   via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   via llvm-commits
• [llvm] InferAddressSpaces: Fix mishandling stores of pointers to themselves (PR #101877)   via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   via llvm-commits
• [llvm] [CodeGen] Use BasicBlock numbers to map to MBBs (PR #101883)   via llvm-commits
• [llvm] [InstCombine] Don't add extra 0 to string in str[np]cpy optimization (PR #101884)   via llvm-commits
• [llvm] [IR] Use block numbers in PredIteratorCache (PR #101885)   via llvm-commits
• [llvm] 3c483b8 - InferAddressSpaces: Fix mishandling stores of pointers to themselves (#101877)   via llvm-commits
• [llvm] 0dba538 - [X86][AVX10.2] Support YMM rounding new instructions (#101825)   via llvm-commits
• [llvm] 5c48f6f - [InstCombine] Don't add extra 0 to string in str[np]cpy optimization (#101884)   via llvm-commits
• [llvm] [NVPTX] Fixing debug symbols for ptx target emitting (PR #101891)   via llvm-commits
• [llvm] [NVPTX] Fixing debug symbols for ptx target emitting (PR #101891)   via llvm-commits
• [llvm] [CodeGen][NFC] Add wrapper method for MBBMap (PR #101893)   via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (PR #101894)   via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (PR #101894)   via llvm-commits
• [lld] [lld][WebAssembly] Fix stub library deps causing LTO archive members to be required post-LTO (PR #101894)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #101294)   via llvm-commits
• [llvm] [BOLT] Refactor AArch64 Relocation Print (PR #101895)   via llvm-commits
• [llvm] [BOLT] Refactor AArch64 Relocation Print (PR #101895)   via llvm-commits
• [llvm] 2e9d2f1 - [TableGen] Construct SmallVector with ArrayRef (NFC) (#101870)   via llvm-commits
• [llvm] 7df9da7 - [llvm] Construct SmallVector with ArrayRef (NFC) (#101872)   via llvm-commits
• [llvm] da0e66e - [CodeGen][NFC] Add wrapper method for MBBMap (#101893)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] be031b1 - [llvm-locstats] Switch shebang from python to python3 (#101864)   via llvm-commits
• [llvm] e525f91 - [llvm] Use llvm::is_contained (NFC) (#101855)   via llvm-commits
• [clang] [llvm] Partialmaptype (PR #101903)   via llvm-commits
• [llvm] 8dd065d - [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (#101828)   via llvm-commits
• [llvm] [ARM] [Windows] Use IMAGE_SYM_CLASS_STATIC for private functions (PR #101828)   via llvm-commits
• [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)   via llvm-commits
• [llvm] [ARM] [Windows] Error out on branch relocations that require a symbol offset (PR #101906)   via llvm-commits
• [llvm] [ARM] [Windows] Error out on branch relocations that require a symbol offset (PR #101906)   via llvm-commits
• [llvm] d341911 - [Metadata] Use const APInt &. NFC (#101865)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfield extraction (PR #101605)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [SandboxIR] Implement UnreachableInst (PR #101856)   via llvm-commits
• [llvm] [ValueTracking] Infer relationship for the select with ICmp (PR #66668)   via llvm-commits
• [llvm] 3d5cc7e - [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (#101598)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   via llvm-commits
• [clang] [llvm] [Clang] Protect ObjCMethodList assignment operator against self-assignment (PR #97933)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)   via llvm-commits
• [llvm] [MIPS] Fix missing ANDI optimization (PR #97689)   via llvm-commits
• [llvm] c566769 - BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (#101428)   via llvm-commits
• [llvm] BPF: Ensure __sync_fetch_and_add() always generate atomic_fetch_add insn (PR #101428)   via llvm-commits
• [llvm] a5b6539 - [RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (#101123)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] [MachinePipeliner] Give up machine pipeliner when the loop body is re… (PR #98292)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] [llvm-lit] Resolve env subcommand required error (PR #98414)   via llvm-commits
• [llvm] 5bc99fb - [RISCV] Select (and (sra x, c2), c1) as (srli (srai x, c2-c3), c3). (#101868)   via llvm-commits
• [llvm] InferAddressSpaces: Improve handling of instructions with multiple pointer uses (PR #101922)   via llvm-commits
• [llvm] InferAddressSpaces: Improve handling of instructions with multiple pointer uses (PR #101922)   via llvm-commits
• [llvm] [LoongArch] Load floating-point immediate using VLDI (PR #101923)   via llvm-commits
• [llvm] [LoongArch] Load floating-point immediate using VLDI (PR #101923)   via llvm-commits
• [llvm] [LV] Fix emission of debug message in legality check (PR #101924)   via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] [LV] Fix emission of debug message in legality check (PR #101924)   via llvm-commits
• [llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)   via llvm-commits
• [llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)   via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits
• [llvm] [llvm-objdump] print out xcoff file header and load section header for xcoff object file with option private-headers (PR #96350)   zhijian lin via llvm-commits