[llvm] [GlobalIsel][AArch64] Replace N bit G_ADD with N/2 bit G_ADD if the lower bits are known to be zeros (PR #101327)

[David Green via llvm-commits]

davemgreen wrote:

This sounds like an interesting optimization. Why doesn't it happen already after legalizing the add?

https://github.com/llvm/llvm-project/pull/101327