[llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)
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Sun Aug 4 23:43:34 PDT 2024
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git-clang-format --diff d4e46f0e864e37085da0c5e56e4f6f278e2f7aee c7886071d08d5cee5d0010a1ead6cdee8ad8805d --extensions cpp -- llvm/lib/Target/X86/X86RegisterInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 33e883a94f..6284b86107 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -47,9 +47,9 @@ EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
static cl::opt<bool>
DisableRegAllocNDDHints("x86-disable-regalloc-hints-for-ndd", cl::Hidden,
- cl::init(false),
- cl::desc("Disable two address hints for register "
- "allocation"));
+ cl::init(false),
+ cl::desc("Disable two address hints for register "
+ "allocation"));
X86RegisterInfo::X86RegisterInfo(const Triple &TT)
: X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
@@ -1163,5 +1163,4 @@ bool X86RegisterInfo::getRegAllocationHints(Register VirtReg,
#undef DEBUG_TYPE
return true;
-
}
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https://github.com/llvm/llvm-project/pull/98603
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