[llvm] [MIPS] Fix missing ANDI optimization (PR #97689)

[via llvm-commits]

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@@ -830,6 +830,12 @@ def : MipsPat<(sra GPR64:$rt, (i32 (trunc GPR64:$rs))),
 def : MipsPat<(rotr GPR64:$rt, (i32 (trunc GPR64:$rs))),
               (DROTRV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>,
               ISA_MIPS3, GPR_64;
+def : MipsPat<(and (srl (i32 (trunc GPR64:$src)), immZExt5:$imm5), immZExt5:$value),
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yingopq wrote:

> Can the `and` immediate be larger than 5 bits? I'm not very familiar with Mips encodings.

Sorry, it can be larger than 5, it should be `immZExt16`. I would submit again. Thanks!

https://github.com/llvm/llvm-project/pull/97689