[llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)
Sameer Sahasrabuddhe via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 11:44:59 PDT 2024
https://github.com/ssahasra created https://github.com/llvm/llvm-project/pull/101386
1. CycleInfo efficiently locates all cycles in a single pass, while the SCC is repeated inside every natural loop.
2. CycleInfo provides a hierarchy of irreducible cycles, and the new implementation transforms each cycle in this hierarchy separately instead of reducing an entire irreducible SCC in a single step. This reduces the number of control-flow paths that pass through the header of each newly created loop. This is evidenced by the reduced number of predecessors on the "guard" blocks in the lit tests, and fewer operands on the corresponding PHI nodes.
3. When an entry of an irreducible cycle is the header of a child natural loop, the original impleementation destroyed that loop. This is now preserved, since the incoming edges on non-header entries are not touched.
>From c60ea0639b7df3723a08eb667aae18ca35b29888 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: Thu, 1 Aug 2024 00:10:20 +0530
Subject: [PATCH] [FixIrreducible] Use CycleInfo instead of a custom SCC
traversal
1. CycleInfo efficiently locates all cycles in a single pass, while the SCC is
repeated inside every natural loop.
2. CycleInfo provides a hierarchy of irreducible cycles, and the new
implementation transforms each cycle in this hierarchy separately instead of
reducing an entire irreducible SCC in a single step. This reduces the number
of control-flow paths that pass through the header of each newly created
loop. This is evidenced by the reduced number of predecessors on the "guard"
blocks in the lit tests, and fewer operands on the corresponding PHI nodes.
3. When an entry of an irreducible cycle is the header of a child natural loop,
the original impleementation destroyed that loop. This is now preserved,
since the incoming edges on non-header entries are not touched.
---
llvm/include/llvm/ADT/GenericCycleInfo.h | 33 ++-
llvm/lib/Transforms/Utils/FixIrreducible.cpp | 256 +++++++-----------
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 15 +-
llvm/test/Transforms/FixIrreducible/basic.ll | 83 +++---
.../Transforms/FixIrreducible/bug45623.ll | 8 +-
llvm/test/Transforms/FixIrreducible/nested.ll | 73 ++---
llvm/test/Transforms/FixIrreducible/switch.ll | 4 +-
.../workarounds/needs-fix-reducible.ll | 52 ++--
.../workarounds/needs-fr-ule.ll | 175 ++++++------
9 files changed, 350 insertions(+), 349 deletions(-)
diff --git a/llvm/include/llvm/ADT/GenericCycleInfo.h b/llvm/include/llvm/ADT/GenericCycleInfo.h
index b601fc9bae38a..e6d76d5163b1e 100644
--- a/llvm/include/llvm/ADT/GenericCycleInfo.h
+++ b/llvm/include/llvm/ADT/GenericCycleInfo.h
@@ -107,6 +107,12 @@ template <typename ContextT> class GenericCycle {
return is_contained(Entries, Block);
}
+ /// \brief Replace all entries with \p Block as single entry.
+ void setSingleEntry(BlockT *Block) {
+ Entries.clear();
+ Entries.push_back(Block);
+ }
+
/// \brief Return whether \p Block is contained in the cycle.
bool contains(const BlockT *Block) const { return Blocks.contains(Block); }
@@ -189,6 +195,21 @@ template <typename ContextT> class GenericCycle {
//@{
using const_entry_iterator =
typename SmallVectorImpl<BlockT *>::const_iterator;
+ const_entry_iterator entry_begin() const {
+ return const_entry_iterator{Entries.begin()};
+ }
+ const_entry_iterator entry_end() const {
+ return const_entry_iterator{Entries.end()};
+ }
+
+ using const_reverse_entry_iterator =
+ typename SmallVectorImpl<BlockT *>::const_reverse_iterator;
+ const_reverse_entry_iterator entry_rbegin() const {
+ return const_reverse_entry_iterator{Entries.rbegin()};
+ }
+ const_reverse_entry_iterator entry_rend() const {
+ return const_reverse_entry_iterator{Entries.rend()};
+ }
size_t getNumEntries() const { return Entries.size(); }
iterator_range<const_entry_iterator> entries() const {
@@ -252,12 +273,6 @@ template <typename ContextT> class GenericCycleInfo {
/// the subtree.
void moveTopLevelCycleToNewParent(CycleT *NewParent, CycleT *Child);
- /// Assumes that \p Cycle is the innermost cycle containing \p Block.
- /// \p Block will be appended to \p Cycle and all of its parent cycles.
- /// \p Block will be added to BlockMap with \p Cycle and
- /// BlockMapTopLevel with \p Cycle's top level parent cycle.
- void addBlockToCycle(BlockT *Block, CycleT *Cycle);
-
public:
GenericCycleInfo() = default;
GenericCycleInfo(GenericCycleInfo &&) = default;
@@ -275,6 +290,12 @@ template <typename ContextT> class GenericCycleInfo {
unsigned getCycleDepth(const BlockT *Block) const;
CycleT *getTopLevelParentCycle(BlockT *Block);
+ /// Assumes that \p Cycle is the innermost cycle containing \p Block.
+ /// \p Block will be appended to \p Cycle and all of its parent cycles.
+ /// \p Block will be added to BlockMap with \p Cycle and
+ /// BlockMapTopLevel with \p Cycle's top level parent cycle.
+ void addBlockToCycle(BlockT *Block, CycleT *Cycle);
+
/// Methods for debug and self-test.
//@{
#ifndef NDEBUG
diff --git a/llvm/lib/Transforms/Utils/FixIrreducible.cpp b/llvm/lib/Transforms/Utils/FixIrreducible.cpp
index 11e24d0585be4..9cad689c50e90 100644
--- a/llvm/lib/Transforms/Utils/FixIrreducible.cpp
+++ b/llvm/lib/Transforms/Utils/FixIrreducible.cpp
@@ -6,58 +6,55 @@
//
//===----------------------------------------------------------------------===//
//
-// An irreducible SCC is one which has multiple "header" blocks, i.e., blocks
-// with control-flow edges incident from outside the SCC. This pass converts a
-// irreducible SCC into a natural loop by applying the following transformation:
+// To convert an irreducible cycle C to a natural loop L:
//
-// 1. Collect the set of headers H of the SCC.
-// 2. Collect the set of predecessors P of these headers. These may be inside as
-// well as outside the SCC.
-// 3. Create block N and redirect every edge from set P to set H through N.
+// 1. Add a new node N to C.
+// 2. Redirect all external incoming edges through N.
+// 3. Redirect all edges incident on header H through N.
//
-// This converts the SCC into a natural loop with N as the header: N is the only
-// block with edges incident from outside the SCC, and all backedges in the SCC
-// are incident on N, i.e., for every backedge, the head now dominates the tail.
+// This is sufficient to ensure that:
//
-// INPUT CFG: The blocks A and B form an irreducible loop with two headers.
+// a. Every closed path in C also exists in L, with the modification that any
+// path passing through H now passes through N before reaching H.
+// b. Every external path incident on any entry of C is now incident on N and
+// then redirected to the entry.
+//
+// Thus, L is a strongly connected component dominated by N, and hence L is a
+// natural loop with header N.
+//
+// INPUT CFG: The blocks H and B form an irreducible loop with two headers.
//
// Entry
// / \
// v v
-// A ----> B
+// H ----> B
// ^ /|
// `----' |
// v
// Exit
//
-// OUTPUT CFG: Edges incident on A and B are now redirected through a
-// new block N, forming a natural loop consisting of N, A and B.
+// OUTPUT CFG:
//
// Entry
// |
// v
-// .---> N <---.
-// / / \ \
-// | / \ |
-// \ v v /
-// `-- A B --'
+// N <---.
+// / \ \
+// / \ |
+// v v /
+// H --> B --'
// |
// v
// Exit
//
-// The transformation is applied to every maximal SCC that is not already
-// recognized as a loop. The pass operates on all maximal SCCs found in the
-// function body outside of any loop, as well as those found inside each loop,
-// including inside any newly created loops. This ensures that any SCC hidden
-// inside a maximal SCC is also transformed.
//
// The actual transformation is handled by function CreateControlFlowHub, which
// takes a set of incoming blocks (the predecessors) and outgoing blocks (the
-// headers). The function also moves every PHINode in an outgoing block to the
+// entries). The function also moves every PHINode in an outgoing block to the
// hub. Since the hub dominates all the outgoing blocks, each such PHINode
-// continues to dominate its uses. Since every header in an SCC has at least two
-// predecessors, every value used in the header (or later) but defined in a
-// predecessor (or earlier) is represented by a PHINode in a header. Hence the
+// continues to dominate its uses. Since every entry the cycle has at least two
+// predecessors, every value used in the entry (or later) but defined in a
+// predecessor (or earlier) is represented by a PHINode in a entry. Hence the
// above handling of PHINodes is sufficient and no further processing is
// required to restore SSA.
//
@@ -68,8 +65,9 @@
#include "llvm/Transforms/Utils/FixIrreducible.h"
#include "llvm/ADT/SCCIterator.h"
+#include "llvm/Analysis/CycleAnalysis.h"
#include "llvm/Analysis/DomTreeUpdater.h"
-#include "llvm/Analysis/LoopIterator.h"
+#include "llvm/Analysis/LoopInfo.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/Transforms/Utils.h"
@@ -88,8 +86,9 @@ struct FixIrreducible : public FunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<DominatorTreeWrapperPass>();
- AU.addRequired<LoopInfoWrapperPass>();
+ AU.addRequired<CycleInfoWrapperPass>();
AU.addPreserved<DominatorTreeWrapperPass>();
+ AU.addPreserved<CycleInfoWrapperPass>();
AU.addPreserved<LoopInfoWrapperPass>();
}
@@ -113,27 +112,23 @@ INITIALIZE_PASS_END(FixIrreducible, "fix-irreducible",
// When a new loop is created, existing children of the parent loop may now be
// fully inside the new loop. Reconnect these as children of the new loop.
static void reconnectChildLoops(LoopInfo &LI, Loop *ParentLoop, Loop *NewLoop,
- SetVector<BasicBlock *> &Blocks,
- SetVector<BasicBlock *> &Headers) {
+ BasicBlock *OldHeader) {
auto &CandidateLoops = ParentLoop ? ParentLoop->getSubLoopsVector()
: LI.getTopLevelLoopsVector();
- // The new loop cannot be its own child, and any candidate is a
- // child iff its header is owned by the new loop. Move all the
- // children to a new vector.
+ // Any candidate is a child iff its header is owned by the new loop. Move all
+ // the children to a new vector.
auto FirstChild = std::partition(
- CandidateLoops.begin(), CandidateLoops.end(), [&](Loop *L) {
- return L == NewLoop || !Blocks.contains(L->getHeader());
- });
+ CandidateLoops.begin(), CandidateLoops.end(),
+ [&](Loop *L) { return !NewLoop->contains(L->getHeader()); });
SmallVector<Loop *, 8> ChildLoops(FirstChild, CandidateLoops.end());
CandidateLoops.erase(FirstChild, CandidateLoops.end());
for (Loop *Child : ChildLoops) {
LLVM_DEBUG(dbgs() << "child loop: " << Child->getHeader()->getName()
<< "\n");
- // TODO: A child loop whose header is also a header in the current
- // SCC gets destroyed since its backedges are removed. That may
- // not be necessary if we can retain such backedges.
- if (Headers.count(Child->getHeader())) {
+ // A child loop whose header was the old cycle header gets destroyed since
+ // its backedges are removed.
+ if (Child->getHeader() == OldHeader) {
for (auto *BB : Child->blocks()) {
if (LI.getLoopFor(BB) != Child)
continue;
@@ -161,21 +156,25 @@ static void reconnectChildLoops(LoopInfo &LI, Loop *ParentLoop, Loop *NewLoop,
// Given a set of blocks and headers in an irreducible SCC, convert it into a
// natural loop. Also insert this new loop at its appropriate place in the
// hierarchy of loops.
-static void createNaturalLoopInternal(LoopInfo &LI, DominatorTree &DT,
- Loop *ParentLoop,
- SetVector<BasicBlock *> &Blocks,
- SetVector<BasicBlock *> &Headers) {
-#ifndef NDEBUG
- // All headers are part of the SCC
- for (auto *H : Headers) {
- assert(Blocks.count(H));
- }
-#endif
+static bool fixIrreducible(Cycle &C, CycleInfo &CI, DominatorTree &DT,
+ LoopInfo *LI) {
+ if (C.isReducible())
+ return false;
SetVector<BasicBlock *> Predecessors;
- for (auto *H : Headers) {
- for (auto *P : predecessors(H)) {
+
+ // Redirect internal edges incident on the header.
+ BasicBlock *OldHeader = C.getHeader();
+ for (BasicBlock *P : predecessors(OldHeader)) {
+ if (C.contains(P))
Predecessors.insert(P);
+ }
+
+ // Redirect external incoming edges. This includes the edges on the header.
+ for (BasicBlock *E : C.entries()) {
+ for (BasicBlock *P : predecessors(E)) {
+ if (!C.contains(P))
+ Predecessors.insert(P);
}
}
@@ -189,21 +188,40 @@ static void createNaturalLoopInternal(LoopInfo &LI, DominatorTree &DT,
// Redirect all the backedges through a "hub" consisting of a series
// of guard blocks that manage the flow of control from the
// predecessors to the headers.
- SmallVector<BasicBlock *, 8> GuardBlocks;
+ SmallVector<BasicBlock *> GuardBlocks;
+
+ // Minor optimization: The cycle entries are discovered in an order that is
+ // the opposite of the order in which these blocks appear as branch targets.
+ // This results in a lot of condition inversions in the control flow out of
+ // the new ControlFlowHub, which can be mitigated if the orders match. So we
+ // reverse the entries when adding them to the hub.
+ SetVector<BasicBlock *> Entries;
+ Entries.insert(C.entry_rbegin(), C.entry_rend());
+
DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Eager);
- CreateControlFlowHub(&DTU, GuardBlocks, Predecessors, Headers, "irr");
+ CreateControlFlowHub(&DTU, GuardBlocks, Predecessors, Entries, "irr");
#if defined(EXPENSIVE_CHECKS)
assert(DT.verify(DominatorTree::VerificationLevel::Full));
#else
assert(DT.verify(DominatorTree::VerificationLevel::Fast));
#endif
+ for (auto *G : GuardBlocks) {
+ LLVM_DEBUG(dbgs() << "added guard block: " << G->getName() << "\n");
+ CI.addBlockToCycle(G, &C);
+ }
+ C.setSingleEntry(GuardBlocks[0]);
+
+ if (!LI)
+ return true;
+
+ Loop *ParentLoop = LI->getLoopFor(OldHeader);
// Create a new loop from the now-transformed cycle
- auto NewLoop = LI.AllocateLoop();
+ auto *NewLoop = LI->AllocateLoop();
if (ParentLoop) {
ParentLoop->addChildLoop(NewLoop);
} else {
- LI.addTopLevelLoop(NewLoop);
+ LI->addTopLevelLoop(NewLoop);
}
// Add the guard blocks to the new loop. The first guard block is
@@ -213,16 +231,15 @@ static void createNaturalLoopInternal(LoopInfo &LI, DominatorTree &DT,
// are also propagated up the chain of parent loops.
for (auto *G : GuardBlocks) {
LLVM_DEBUG(dbgs() << "added guard block: " << G->getName() << "\n");
- NewLoop->addBasicBlockToLoop(G, LI);
+ NewLoop->addBasicBlockToLoop(G, *LI);
}
- // Add the SCC blocks to the new loop.
- for (auto *BB : Blocks) {
+ for (auto *BB : C.blocks()) {
NewLoop->addBlockEntry(BB);
- if (LI.getLoopFor(BB) == ParentLoop) {
+ if (LI->getLoopFor(BB) == ParentLoop) {
LLVM_DEBUG(dbgs() << "moved block from parent: " << BB->getName()
<< "\n");
- LI.changeLoopFor(BB, NewLoop);
+ LI->changeLoopFor(BB, NewLoop);
} else {
LLVM_DEBUG(dbgs() << "added block from child: " << BB->getName() << "\n");
}
@@ -230,129 +247,58 @@ static void createNaturalLoopInternal(LoopInfo &LI, DominatorTree &DT,
LLVM_DEBUG(dbgs() << "header for new loop: "
<< NewLoop->getHeader()->getName() << "\n");
- reconnectChildLoops(LI, ParentLoop, NewLoop, Blocks, Headers);
+ reconnectChildLoops(*LI, ParentLoop, NewLoop, OldHeader);
NewLoop->verifyLoop();
if (ParentLoop) {
ParentLoop->verifyLoop();
}
#if defined(EXPENSIVE_CHECKS)
- LI.verify(DT);
+ LI->verify(DT);
#endif // EXPENSIVE_CHECKS
-}
-
-namespace llvm {
-// Enable the graph traits required for traversing a Loop body.
-template <> struct GraphTraits<Loop> : LoopBodyTraits {};
-} // namespace llvm
-// Overloaded wrappers to go with the function template below.
-static BasicBlock *unwrapBlock(BasicBlock *B) { return B; }
-static BasicBlock *unwrapBlock(LoopBodyTraits::NodeRef &N) { return N.second; }
-
-static void createNaturalLoop(LoopInfo &LI, DominatorTree &DT, Function *F,
- SetVector<BasicBlock *> &Blocks,
- SetVector<BasicBlock *> &Headers) {
- createNaturalLoopInternal(LI, DT, nullptr, Blocks, Headers);
+ return true;
}
-static void createNaturalLoop(LoopInfo &LI, DominatorTree &DT, Loop &L,
- SetVector<BasicBlock *> &Blocks,
- SetVector<BasicBlock *> &Headers) {
- createNaturalLoopInternal(LI, DT, &L, Blocks, Headers);
-}
-
-// Convert irreducible SCCs; Graph G may be a Function* or a Loop&.
-template <class Graph>
-static bool makeReducible(LoopInfo &LI, DominatorTree &DT, Graph &&G) {
- bool Changed = false;
- for (auto Scc = scc_begin(G); !Scc.isAtEnd(); ++Scc) {
- if (Scc->size() < 2)
- continue;
- SetVector<BasicBlock *> Blocks;
- LLVM_DEBUG(dbgs() << "Found SCC:");
- for (auto N : *Scc) {
- auto BB = unwrapBlock(N);
- LLVM_DEBUG(dbgs() << " " << BB->getName());
- Blocks.insert(BB);
- }
- LLVM_DEBUG(dbgs() << "\n");
-
- // Minor optimization: The SCC blocks are usually discovered in an order
- // that is the opposite of the order in which these blocks appear as branch
- // targets. This results in a lot of condition inversions in the control
- // flow out of the new ControlFlowHub, which can be mitigated if the orders
- // match. So we discover the headers using the reverse of the block order.
- SetVector<BasicBlock *> Headers;
- LLVM_DEBUG(dbgs() << "Found headers:");
- for (auto *BB : reverse(Blocks)) {
- for (const auto P : predecessors(BB)) {
- // Skip unreachable predecessors.
- if (!DT.isReachableFromEntry(P))
- continue;
- if (!Blocks.count(P)) {
- LLVM_DEBUG(dbgs() << " " << BB->getName());
- Headers.insert(BB);
- break;
- }
- }
- }
- LLVM_DEBUG(dbgs() << "\n");
-
- if (Headers.size() == 1) {
- assert(LI.isLoopHeader(Headers.front()));
- LLVM_DEBUG(dbgs() << "Natural loop with a single header: skipped\n");
- continue;
- }
- createNaturalLoop(LI, DT, G, Blocks, Headers);
- Changed = true;
- }
- return Changed;
-}
-
-static bool FixIrreducibleImpl(Function &F, LoopInfo &LI, DominatorTree &DT) {
+static bool FixIrreducibleImpl(Function &F, CycleInfo &CI, DominatorTree &DT,
+ LoopInfo *LI) {
LLVM_DEBUG(dbgs() << "===== Fix irreducible control-flow in function: "
<< F.getName() << "\n");
assert(hasOnlySimpleTerminator(F) && "Unsupported block terminator.");
bool Changed = false;
- SmallVector<Loop *, 8> WorkList;
-
- LLVM_DEBUG(dbgs() << "visiting top-level\n");
- Changed |= makeReducible(LI, DT, &F);
-
- // Any SCCs reduced are now already in the list of top-level loops, so simply
- // add them all to the worklist.
- append_range(WorkList, LI);
-
- while (!WorkList.empty()) {
- auto L = WorkList.pop_back_val();
- LLVM_DEBUG(dbgs() << "visiting loop with header "
- << L->getHeader()->getName() << "\n");
- Changed |= makeReducible(LI, DT, *L);
- // Any SCCs reduced are now already in the list of child loops, so simply
- // add them all to the worklist.
- WorkList.append(L->begin(), L->end());
+ SmallVector<Cycle *> Worklist{CI.toplevel_cycles()};
+
+ while (!Worklist.empty()) {
+ Cycle *C = Worklist.pop_back_val();
+ Changed |= fixIrreducible(*C, CI, DT, LI);
+ append_range(Worklist, C->children());
}
return Changed;
}
bool FixIrreducible::runOnFunction(Function &F) {
- auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
+ auto *LIWP = getAnalysisIfAvailable<LoopInfoWrapperPass>();
+ LoopInfo *LI = LIWP ? &LIWP->getLoopInfo() : nullptr;
+ auto &CI = getAnalysis<CycleInfoWrapperPass>().getResult();
auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
- return FixIrreducibleImpl(F, LI, DT);
+ return FixIrreducibleImpl(F, CI, DT, LI);
}
PreservedAnalyses FixIrreduciblePass::run(Function &F,
FunctionAnalysisManager &AM) {
- auto &LI = AM.getResult<LoopAnalysis>(F);
+ auto *LI = AM.getCachedResult<LoopAnalysis>(F);
+ auto &CI = AM.getResult<CycleAnalysis>(F);
auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
- if (!FixIrreducibleImpl(F, LI, DT))
+
+ if (!FixIrreducibleImpl(F, CI, DT, LI))
return PreservedAnalyses::all();
+
PreservedAnalyses PA;
PA.preserve<LoopAnalysis>();
+ PA.preserve<CycleAnalysis>();
PA.preserve<DominatorTreeAnalysis>();
return PA;
}
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index b61838c06a1f9..62b42c892a11e 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -68,8 +68,9 @@
; GCN-O0-NEXT: Uniformity Analysis
; GCN-O0-NEXT: Unify divergent function exit nodes
; GCN-O0-NEXT: Dominator Tree Construction
-; GCN-O0-NEXT: Natural Loop Information
+; GCN-O0-NEXT: Cycle Info Analysis
; GCN-O0-NEXT: Convert irreducible control-flow into natural loops
+; GCN-O0-NEXT: Natural Loop Information
; GCN-O0-NEXT: Fixup each natural loop to have a single exit block
; GCN-O0-NEXT: Post-Dominator Tree Construction
; GCN-O0-NEXT: Dominance Frontier Construction
@@ -262,8 +263,9 @@
; GCN-O1-NEXT: Post-Dominator Tree Construction
; GCN-O1-NEXT: Unify divergent function exit nodes
; GCN-O1-NEXT: Dominator Tree Construction
-; GCN-O1-NEXT: Natural Loop Information
+; GCN-O1-NEXT: Cycle Info Analysis
; GCN-O1-NEXT: Convert irreducible control-flow into natural loops
+; GCN-O1-NEXT: Natural Loop Information
; GCN-O1-NEXT: Fixup each natural loop to have a single exit block
; GCN-O1-NEXT: Post-Dominator Tree Construction
; GCN-O1-NEXT: Dominance Frontier Construction
@@ -556,8 +558,9 @@
; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes
; GCN-O1-OPTS-NEXT: Dominator Tree Construction
-; GCN-O1-OPTS-NEXT: Natural Loop Information
+; GCN-O1-OPTS-NEXT: Cycle Info Analysis
; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops
+; GCN-O1-OPTS-NEXT: Natural Loop Information
; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block
; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
; GCN-O1-OPTS-NEXT: Dominance Frontier Construction
@@ -862,8 +865,9 @@
; GCN-O2-NEXT: Post-Dominator Tree Construction
; GCN-O2-NEXT: Unify divergent function exit nodes
; GCN-O2-NEXT: Dominator Tree Construction
-; GCN-O2-NEXT: Natural Loop Information
+; GCN-O2-NEXT: Cycle Info Analysis
; GCN-O2-NEXT: Convert irreducible control-flow into natural loops
+; GCN-O2-NEXT: Natural Loop Information
; GCN-O2-NEXT: Fixup each natural loop to have a single exit block
; GCN-O2-NEXT: Post-Dominator Tree Construction
; GCN-O2-NEXT: Dominance Frontier Construction
@@ -1182,8 +1186,9 @@
; GCN-O3-NEXT: Post-Dominator Tree Construction
; GCN-O3-NEXT: Unify divergent function exit nodes
; GCN-O3-NEXT: Dominator Tree Construction
-; GCN-O3-NEXT: Natural Loop Information
+; GCN-O3-NEXT: Cycle Info Analysis
; GCN-O3-NEXT: Convert irreducible control-flow into natural loops
+; GCN-O3-NEXT: Natural Loop Information
; GCN-O3-NEXT: Fixup each natural loop to have a single exit block
; GCN-O3-NEXT: Post-Dominator Tree Construction
; GCN-O3-NEXT: Dominance Frontier Construction
diff --git a/llvm/test/Transforms/FixIrreducible/basic.ll b/llvm/test/Transforms/FixIrreducible/basic.ll
index 7ba1360160db2..2552ccfc048a0 100644
--- a/llvm/test/Transforms/FixIrreducible/basic.ll
+++ b/llvm/test/Transforms/FixIrreducible/basic.ll
@@ -7,17 +7,18 @@ define i32 @basic(i1 %PredEntry, i1 %PredLeft, i1 %PredRight, i32 %X, i32 %Y) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[IRR_GUARD:%.*]]
; CHECK: left:
-; CHECK-NEXT: [[L:%.*]] = add i32 [[L_PHI_MOVED:%.*]], 1
+; CHECK-NEXT: [[L_PHI:%.*]] = phi i32 [ [[R_PHI_MOVED:%.*]], [[RIGHT:%.*]] ], [ [[L_PHI_MOVED:%.*]], [[IRR_GUARD]] ]
+; CHECK-NEXT: [[L:%.*]] = add i32 [[L_PHI]], 1
; CHECK-NEXT: br i1 [[PREDLEFT:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: right:
-; CHECK-NEXT: br i1 [[PREDRIGHT:%.*]], label [[IRR_GUARD]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[PREDRIGHT:%.*]], label [[LEFT:%.*]], label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[Z:%.*]] = phi i32 [ [[L]], [[LEFT:%.*]] ], [ [[R_PHI_MOVED:%.*]], [[RIGHT:%.*]] ]
+; CHECK-NEXT: [[Z:%.*]] = phi i32 [ [[L]], [[LEFT]] ], [ [[R_PHI_MOVED]], [[RIGHT]] ]
; CHECK-NEXT: ret i32 [[Z]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[R_PHI_MOVED]] = phi i32 [ [[R_PHI_MOVED]], [[RIGHT]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ], [ [[L]], [[LEFT]] ]
-; CHECK-NEXT: [[L_PHI_MOVED]] = phi i32 [ [[R_PHI_MOVED]], [[RIGHT]] ], [ [[X:%.*]], [[ENTRY]] ], [ [[L_PHI_MOVED]], [[LEFT]] ]
-; CHECK-NEXT: [[GUARD_LEFT:%.*]] = phi i1 [ true, [[RIGHT]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ], [ false, [[LEFT]] ]
+; CHECK-NEXT: [[R_PHI_MOVED]] = phi i32 [ [[L]], [[LEFT]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[L_PHI_MOVED]] = phi i32 [ [[L_PHI_MOVED]], [[LEFT]] ], [ [[X:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[GUARD_LEFT:%.*]] = phi i1 [ false, [[LEFT]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ]
; CHECK-NEXT: br i1 [[GUARD_LEFT]], label [[LEFT]], label [[RIGHT]]
;
entry:
@@ -42,16 +43,17 @@ define i32 @feedback_loop(i1 %PredEntry, i1 %PredLeft, i1 %PredRight, i32 %X, i3
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[IRR_GUARD:%.*]]
; CHECK: left:
+; CHECK-NEXT: [[L_PHI:%.*]] = phi i32 [ [[R_PHI_MOVED:%.*]], [[RIGHT:%.*]] ], [ [[L_PHI_MOVED:%.*]], [[IRR_GUARD]] ]
; CHECK-NEXT: br i1 [[PREDLEFT:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: right:
-; CHECK-NEXT: br i1 [[PREDRIGHT:%.*]], label [[IRR_GUARD]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[PREDRIGHT:%.*]], label [[LEFT:%.*]], label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[Z:%.*]] = phi i32 [ [[L_PHI_MOVED:%.*]], [[LEFT:%.*]] ], [ [[R_PHI_MOVED:%.*]], [[RIGHT:%.*]] ]
+; CHECK-NEXT: [[Z:%.*]] = phi i32 [ [[L_PHI]], [[LEFT]] ], [ [[R_PHI_MOVED]], [[RIGHT]] ]
; CHECK-NEXT: ret i32 [[Z]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[R_PHI_MOVED]] = phi i32 [ [[R_PHI_MOVED]], [[RIGHT]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ], [ [[L_PHI_MOVED]], [[LEFT]] ]
-; CHECK-NEXT: [[L_PHI_MOVED]] = phi i32 [ [[R_PHI_MOVED]], [[RIGHT]] ], [ [[X:%.*]], [[ENTRY]] ], [ [[L_PHI_MOVED]], [[LEFT]] ]
-; CHECK-NEXT: [[GUARD_LEFT:%.*]] = phi i1 [ true, [[RIGHT]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ], [ false, [[LEFT]] ]
+; CHECK-NEXT: [[R_PHI_MOVED]] = phi i32 [ [[L_PHI]], [[LEFT]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[L_PHI_MOVED]] = phi i32 [ [[L_PHI_MOVED]], [[LEFT]] ], [ [[X:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[GUARD_LEFT:%.*]] = phi i1 [ false, [[LEFT]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ]
; CHECK-NEXT: br i1 [[GUARD_LEFT]], label [[LEFT]], label [[RIGHT]]
;
entry:
@@ -73,7 +75,7 @@ exit:
define i32 @multiple_predecessors(i1 %PredEntry, i1 %PredA, i1 %PredB, i1 %PredC, i1 %PredD, i32 %X, i32 %Y) {
; CHECK-LABEL: @multiple_predecessors(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[PREDB_INV:%.*]] = xor i1 [[PREDB:%.*]], true
+; CHECK-NEXT: [[PREDA_INV:%.*]] = xor i1 [[PREDA:%.*]], true
; CHECK-NEXT: br i1 [[PREDENTRY:%.*]], label [[A:%.*]], label [[B:%.*]]
; CHECK: A:
; CHECK-NEXT: [[A_INC:%.*]] = add i32 [[X:%.*]], 1
@@ -81,18 +83,19 @@ define i32 @multiple_predecessors(i1 %PredEntry, i1 %PredA, i1 %PredB, i1 %PredC
; CHECK: B:
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: C:
-; CHECK-NEXT: br i1 [[PREDC:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
+; CHECK-NEXT: br i1 [[PREDC:%.*]], label [[D:%.*]], label [[EXIT:%.*]]
; CHECK: D:
-; CHECK-NEXT: [[D_INC:%.*]] = add i32 [[D_PHI_MOVED:%.*]], 1
+; CHECK-NEXT: [[D_PHI:%.*]] = phi i32 [ [[C_PHI_MOVED:%.*]], [[C:%.*]] ], [ [[D_PHI_MOVED:%.*]], [[IRR_GUARD]] ]
+; CHECK-NEXT: [[D_INC:%.*]] = add i32 [[D_PHI]], 1
; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT]], label [[IRR_GUARD]]
; CHECK: exit:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[C_PHI_MOVED:%.*]], [[C:%.*]] ], [ [[D_INC]], [[D:%.*]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[C_PHI_MOVED]], [[C]] ], [ [[D_INC]], [[D]] ]
; CHECK-NEXT: ret i32 [[RET]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[D_PHI_MOVED]] = phi i32 [ [[D_PHI_MOVED]], [[D]] ], [ [[Y:%.*]], [[B]] ], [ [[A_INC]], [[A]] ], [ [[C_PHI_MOVED]], [[C]] ]
-; CHECK-NEXT: [[C_PHI_MOVED]] = phi i32 [ [[D_INC]], [[D]] ], [ [[Y]], [[B]] ], [ [[X]], [[A]] ], [ [[C_PHI_MOVED]], [[C]] ]
-; CHECK-NEXT: [[GUARD_C:%.*]] = phi i1 [ true, [[D]] ], [ [[PREDB_INV]], [[B]] ], [ [[PREDA:%.*]], [[A]] ], [ false, [[C]] ]
-; CHECK-NEXT: br i1 [[GUARD_C]], label [[C]], label [[D]]
+; CHECK-NEXT: [[C_PHI_MOVED]] = phi i32 [ [[D_INC]], [[D]] ], [ [[Y:%.*]], [[B]] ], [ [[X]], [[A]] ]
+; CHECK-NEXT: [[D_PHI_MOVED]] = phi i32 [ [[D_PHI_MOVED]], [[D]] ], [ [[Y]], [[B]] ], [ [[A_INC]], [[A]] ]
+; CHECK-NEXT: [[GUARD_D:%.*]] = phi i1 [ false, [[D]] ], [ [[PREDB:%.*]], [[B]] ], [ [[PREDA_INV]], [[A]] ]
+; CHECK-NEXT: br i1 [[GUARD_D]], label [[D]], label [[C]]
;
entry:
br i1 %PredEntry, label %A, label %B
@@ -128,17 +131,18 @@ define i32 @separate_predecessors(i1 %PredEntry, i1 %PredA, i1 %PredB, i1 %PredC
; CHECK: B:
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: C:
+; CHECK-NEXT: [[C_PHI:%.*]] = phi i32 [ [[D_INC:%.*]], [[D:%.*]] ], [ [[C_PHI_MOVED:%.*]], [[IRR_GUARD]] ]
; CHECK-NEXT: br i1 [[PREDC:%.*]], label [[EXIT:%.*]], label [[IRR_GUARD]]
; CHECK: D:
-; CHECK-NEXT: [[D_INC:%.*]] = add i32 [[D_PHI_MOVED:%.*]], 1
-; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT]], label [[IRR_GUARD]]
+; CHECK-NEXT: [[D_INC]] = add i32 [[D_PHI_MOVED:%.*]], 1
+; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT]], label [[C:%.*]]
; CHECK: exit:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[C_PHI_MOVED:%.*]], [[C:%.*]] ], [ [[D_INC]], [[D:%.*]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[C_PHI]], [[C]] ], [ [[D_INC]], [[D]] ]
; CHECK-NEXT: ret i32 [[RET]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[D_PHI_MOVED]] = phi i32 [ [[D_PHI_MOVED]], [[D]] ], [ undef, [[A]] ], [ [[C_PHI_MOVED]], [[C]] ], [ [[Y:%.*]], [[B]] ]
-; CHECK-NEXT: [[C_PHI_MOVED]] = phi i32 [ [[D_INC]], [[D]] ], [ [[X]], [[A]] ], [ [[C_PHI_MOVED]], [[C]] ], [ undef, [[B]] ]
-; CHECK-NEXT: [[GUARD_C:%.*]] = phi i1 [ true, [[D]] ], [ true, [[A]] ], [ false, [[C]] ], [ false, [[B]] ]
+; CHECK-NEXT: [[D_PHI_MOVED]] = phi i32 [ [[C_PHI]], [[C]] ], [ [[Y:%.*]], [[B]] ], [ undef, [[A]] ]
+; CHECK-NEXT: [[C_PHI_MOVED]] = phi i32 [ [[C_PHI_MOVED]], [[C]] ], [ undef, [[B]] ], [ [[X]], [[A]] ]
+; CHECK-NEXT: [[GUARD_C:%.*]] = phi i1 [ false, [[C]] ], [ false, [[B]] ], [ true, [[A]] ]
; CHECK-NEXT: br i1 [[GUARD_C]], label [[C]], label [[D]]
;
entry:
@@ -174,24 +178,24 @@ define void @four_headers(i1 %PredEntry, i1 %PredX, i1 %PredY, i1 %PredD) {
; CHECK: Y:
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: A:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[B:%.*]]
; CHECK: B:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[C:%.*]]
; CHECK: C:
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: D:
-; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT:%.*]], label [[IRR_GUARD]]
+; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT:%.*]], label [[A:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ true, [[D:%.*]] ], [ [[PREDX:%.*]], [[X]] ], [ false, [[A:%.*]] ], [ false, [[B:%.*]] ], [ false, [[Y]] ], [ false, [[C:%.*]] ]
-; CHECK-NEXT: [[GUARD_B:%.*]] = phi i1 [ false, [[D]] ], [ true, [[X]] ], [ true, [[A]] ], [ false, [[B]] ], [ false, [[Y]] ], [ false, [[C]] ]
-; CHECK-NEXT: [[GUARD_C:%.*]] = phi i1 [ false, [[D]] ], [ false, [[X]] ], [ false, [[A]] ], [ true, [[B]] ], [ [[PREDY:%.*]], [[Y]] ], [ false, [[C]] ]
+; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ false, [[C]] ], [ false, [[Y]] ], [ [[PREDX:%.*]], [[X]] ]
+; CHECK-NEXT: [[GUARD_B:%.*]] = phi i1 [ false, [[C]] ], [ false, [[Y]] ], [ true, [[X]] ]
+; CHECK-NEXT: [[GUARD_C:%.*]] = phi i1 [ false, [[C]] ], [ [[PREDY:%.*]], [[Y]] ], [ false, [[X]] ]
; CHECK-NEXT: br i1 [[GUARD_A]], label [[A]], label [[IRR_GUARD1:%.*]]
; CHECK: irr.guard1:
; CHECK-NEXT: br i1 [[GUARD_B]], label [[B]], label [[IRR_GUARD2:%.*]]
; CHECK: irr.guard2:
-; CHECK-NEXT: br i1 [[GUARD_C]], label [[C]], label [[D]]
+; CHECK-NEXT: br i1 [[GUARD_C]], label [[C]], label [[D:%.*]]
;
entry:
br i1 %PredEntry, label %X, label %Y
@@ -223,23 +227,24 @@ define i32 @hidden_nodes(i1 %PredEntry, i1 %PredA, i1 %PredB, i1 %PredC, i1 %Pre
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[IRR_GUARD:%.*]]
; CHECK: A:
-; CHECK-NEXT: [[A_INC:%.*]] = add i32 [[A_PHI_MOVED:%.*]], 1
+; CHECK-NEXT: [[A_PHI:%.*]] = phi i32 [ [[C_INC:%.*]], [[E:%.*]] ], [ [[A_PHI_MOVED:%.*]], [[IRR_GUARD]] ]
+; CHECK-NEXT: [[A_INC:%.*]] = add i32 [[A_PHI]], 1
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: B:
; CHECK-NEXT: br label [[C:%.*]]
; CHECK: C:
-; CHECK-NEXT: [[C_INC:%.*]] = add i32 [[B_PHI_MOVED:%.*]], 1
+; CHECK-NEXT: [[C_INC]] = add i32 [[B_PHI_MOVED:%.*]], 1
; CHECK-NEXT: br label [[D:%.*]]
; CHECK: D:
-; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT:%.*]], label [[E:%.*]]
+; CHECK-NEXT: br i1 [[PREDD:%.*]], label [[EXIT:%.*]], label [[E]]
; CHECK: E:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[A:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 [[B_PHI_MOVED]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[B_PHI_MOVED]] = phi i32 [ undef, [[E]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ], [ [[A_INC]], [[A:%.*]] ]
-; CHECK-NEXT: [[A_PHI_MOVED]] = phi i32 [ [[C_INC]], [[E]] ], [ [[X:%.*]], [[ENTRY]] ], [ [[A_PHI_MOVED]], [[A]] ]
-; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ true, [[E]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ], [ false, [[A]] ]
+; CHECK-NEXT: [[B_PHI_MOVED]] = phi i32 [ [[A_INC]], [[A]] ], [ [[Y:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[A_PHI_MOVED]] = phi i32 [ [[A_PHI_MOVED]], [[A]] ], [ [[X:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ false, [[A]] ], [ [[PREDENTRY:%.*]], [[ENTRY]] ]
; CHECK-NEXT: br i1 [[GUARD_A]], label [[A]], label [[B:%.*]]
;
entry:
diff --git a/llvm/test/Transforms/FixIrreducible/bug45623.ll b/llvm/test/Transforms/FixIrreducible/bug45623.ll
index 89d31dd4fea6b..0201eaa2bba5b 100644
--- a/llvm/test/Transforms/FixIrreducible/bug45623.ll
+++ b/llvm/test/Transforms/FixIrreducible/bug45623.ll
@@ -12,7 +12,7 @@ define dso_local void @tre_tnfa_run_backtrack() {
; CHECK: if.then250:
; CHECK-NEXT: br label [[FOR_COND264:%.*]]
; CHECK: for.cond264:
-; CHECK-NEXT: br i1 undef, label [[FOR_BODY267:%.*]], label [[IRR_GUARD]]
+; CHECK-NEXT: br i1 undef, label [[FOR_BODY267:%.*]], label [[BACKTRACK:%.*]]
; CHECK: for.body267:
; CHECK-NEXT: br label [[FOR_COND264]]
; CHECK: if.end275:
@@ -22,7 +22,7 @@ define dso_local void @tre_tnfa_run_backtrack() {
; CHECK: for.body345:
; CHECK-NEXT: br label [[FOR_COND342]]
; CHECK: for.end580:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[BACKTRACK]]
; CHECK: backtrack:
; CHECK-NEXT: br i1 undef, label [[IF_THEN595:%.*]], label [[IF_ELSE629:%.*]]
; CHECK: if.then595:
@@ -36,8 +36,8 @@ define dso_local void @tre_tnfa_run_backtrack() {
; CHECK: if.else629:
; CHECK-NEXT: br label [[RETRY]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_BACKTRACK:%.*]] = phi i1 [ true, [[FOR_END580]] ], [ true, [[FOR_COND264]] ], [ undef, [[RETRY]] ], [ false, [[FOR_END626]] ]
-; CHECK-NEXT: br i1 [[GUARD_BACKTRACK]], label [[BACKTRACK:%.*]], label [[WHILE_BODY248:%.*]]
+; CHECK-NEXT: [[GUARD_BACKTRACK:%.*]] = phi i1 [ false, [[FOR_END626]] ], [ undef, [[RETRY]] ]
+; CHECK-NEXT: br i1 [[GUARD_BACKTRACK]], label [[BACKTRACK]], label [[WHILE_BODY248:%.*]]
;
entry:
br label %retry
diff --git a/llvm/test/Transforms/FixIrreducible/nested.ll b/llvm/test/Transforms/FixIrreducible/nested.ll
index 85f7d39920b9d..2d47a70f1d324 100644
--- a/llvm/test/Transforms/FixIrreducible/nested.ll
+++ b/llvm/test/Transforms/FixIrreducible/nested.ll
@@ -10,19 +10,19 @@ define void @nested_irr_top_level(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1
; CHECK: B1:
; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD1]], label [[A3:%.*]]
; CHECK: B2:
-; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[IRR_GUARD1]], label [[A3]]
+; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[B1:%.*]], label [[A3]]
; CHECK: A3:
; CHECK-NEXT: br i1 [[PRED4:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: A2:
-; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[IRR_GUARD]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[A1:%.*]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ], [ false, [[A3]] ]
-; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1:%.*]], label [[A2]]
+; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ false, [[A3]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2:%.*]]
; CHECK: irr.guard1:
-; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ true, [[B2:%.*]] ], [ [[PRED1:%.*]], [[A1]] ], [ false, [[B1:%.*]] ]
-; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2]]
+; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ false, [[B1]] ], [ [[PRED1:%.*]], [[A1]] ]
+; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2:%.*]]
;
entry:
br i1 %Pred0, label %A1, label %A2
@@ -57,21 +57,21 @@ define void @nested_irr_in_loop(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1 %
; CHECK: B1:
; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD1]], label [[A3:%.*]]
; CHECK: B2:
-; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[IRR_GUARD1]], label [[A3]]
+; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[B1:%.*]], label [[A3]]
; CHECK: A3:
; CHECK-NEXT: br i1 [[PRED4:%.*]], label [[IRR_GUARD]], label [[L1:%.*]]
; CHECK: A2:
-; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[IRR_GUARD]], label [[L1]]
+; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[A1:%.*]], label [[L1]]
; CHECK: L1:
; CHECK-NEXT: br i1 [[PRED6:%.*]], label [[EXIT:%.*]], label [[H1]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ [[PRED0:%.*]], [[H1]] ], [ false, [[A3]] ]
-; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1:%.*]], label [[A2]]
+; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ false, [[A3]] ], [ [[PRED0:%.*]], [[H1]] ]
+; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2:%.*]]
; CHECK: irr.guard1:
-; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ true, [[B2:%.*]] ], [ [[PRED1:%.*]], [[A1]] ], [ false, [[B1:%.*]] ]
-; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2]]
+; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ false, [[B1]] ], [ [[PRED1:%.*]], [[A1]] ]
+; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2:%.*]]
;
entry:
br label %H1
@@ -114,12 +114,12 @@ define void @loop_in_irr(i1 %Pred0, i1 %Pred1, i1 %Pred2) {
; CHECK: A3:
; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: A2:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[A1:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ], [ false, [[A3]] ]
-; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1:%.*]], label [[A2]]
+; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ false, [[A3]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2:%.*]]
;
entry:
br i1 %Pred0, label %A1, label %A2
@@ -150,16 +150,16 @@ define void @loop_in_irr_shared_header(i1 %Pred0, i1 %Pred1, i1 %Pred2) {
; CHECK: H1:
; CHECK-NEXT: br label [[L1:%.*]]
; CHECK: L1:
-; CHECK-NEXT: br i1 [[PRED1:%.*]], label [[IRR_GUARD]], label [[A3:%.*]]
+; CHECK-NEXT: br i1 [[PRED1:%.*]], label [[H1:%.*]], label [[A3:%.*]]
; CHECK: A3:
; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: A2:
-; CHECK-NEXT: br label [[IRR_GUARD]]
+; CHECK-NEXT: br label [[H1]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_H1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ true, [[L1]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ], [ false, [[A3]] ]
-; CHECK-NEXT: br i1 [[GUARD_H1]], label [[H1:%.*]], label [[A2]]
+; CHECK-NEXT: [[GUARD_H1:%.*]] = phi i1 [ false, [[A3]] ], [ [[PRED0:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[GUARD_H1]], label [[H1]], label [[A2:%.*]]
;
entry:
br i1 %Pred0, label %H1, label %A2
@@ -189,7 +189,7 @@ define void @siblings_top_level(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1 %
; CHECK: A1:
; CHECK-NEXT: br label [[IRR_GUARD1]]
; CHECK: A2:
-; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD1]], label [[L1:%.*]]
+; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[A1:%.*]], label [[L1:%.*]]
; CHECK: L1:
; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[H1]], label [[EXIT:%.*]]
; CHECK: fork1:
@@ -201,15 +201,15 @@ define void @siblings_top_level(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1 %
; CHECK: L2:
; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[H2]], label [[IRR_GUARD]]
; CHECK: B2:
-; CHECK-NEXT: br i1 [[PRED6:%.*]], label [[IRR_GUARD]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[PRED6:%.*]], label [[B1:%.*]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ true, [[B2:%.*]] ], [ [[PRED4:%.*]], [[FORK1]] ], [ false, [[L2]] ]
-; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1:%.*]], label [[B2]]
+; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ false, [[L2]] ], [ [[PRED4:%.*]], [[FORK1]] ]
+; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2:%.*]]
; CHECK: irr.guard1:
-; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ [[PRED1:%.*]], [[H1]] ], [ false, [[A1:%.*]] ]
-; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2]]
+; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ false, [[A1]] ], [ [[PRED1:%.*]], [[H1]] ]
+; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2:%.*]]
;
entry:
br i1 %Pred0, label %H1, label %fork1
@@ -256,7 +256,7 @@ define void @siblings_in_loop(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1 %Pr
; CHECK: A1:
; CHECK-NEXT: br label [[IRR_GUARD1]]
; CHECK: A2:
-; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[IRR_GUARD1]], label [[L1:%.*]]
+; CHECK-NEXT: br i1 [[PRED2:%.*]], label [[A1:%.*]], label [[L1:%.*]]
; CHECK: L1:
; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[H1]], label [[L0:%.*]]
; CHECK: fork1:
@@ -268,17 +268,17 @@ define void @siblings_in_loop(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3, i1 %Pr
; CHECK: L2:
; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[H2]], label [[IRR_GUARD]]
; CHECK: B2:
-; CHECK-NEXT: br i1 [[PRED6:%.*]], label [[IRR_GUARD]], label [[L0]]
+; CHECK-NEXT: br i1 [[PRED6:%.*]], label [[B1:%.*]], label [[L0]]
; CHECK: L0:
; CHECK-NEXT: br i1 [[PRED7:%.*]], label [[EXIT:%.*]], label [[H0]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ true, [[B2:%.*]] ], [ [[PRED4:%.*]], [[FORK1]] ], [ false, [[L2]] ]
-; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1:%.*]], label [[B2]]
+; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ false, [[L2]] ], [ [[PRED4:%.*]], [[FORK1]] ]
+; CHECK-NEXT: br i1 [[GUARD_B1]], label [[B1]], label [[B2:%.*]]
; CHECK: irr.guard1:
-; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ true, [[A2:%.*]] ], [ [[PRED1:%.*]], [[H1]] ], [ false, [[A1:%.*]] ]
-; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2]]
+; CHECK-NEXT: [[GUARD_A1:%.*]] = phi i1 [ false, [[A1]] ], [ [[PRED1:%.*]], [[H1]] ]
+; CHECK-NEXT: br i1 [[GUARD_A1]], label [[A1]], label [[A2:%.*]]
;
entry:
br label %H0
@@ -337,13 +337,13 @@ define void @irreducible_mountain_bug(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3
; CHECK: while.cond:
; CHECK-NEXT: br i1 [[PRED3:%.*]], label [[IRR_GUARD:%.*]], label [[LOR_RHS:%.*]]
; CHECK: cond.true49:
-; CHECK-NEXT: br i1 [[PRED4:%.*]], label [[IF_THEN69:%.*]], label [[WHILE_BODY63:%.*]]
+; CHECK-NEXT: br i1 [[PRED4:%.*]], label [[IF_THEN69:%.*]], label [[IRR_GUARD1:%.*]]
; CHECK: while.body63:
; CHECK-NEXT: br i1 [[PRED5:%.*]], label [[EXIT:%.*]], label [[WHILE_COND47:%.*]]
; CHECK: while.cond47:
; CHECK-NEXT: br label [[IRR_GUARD]]
; CHECK: cond.end61:
-; CHECK-NEXT: br i1 [[PRED7:%.*]], label [[WHILE_BODY63]], label [[WHILE_COND]]
+; CHECK-NEXT: br i1 [[PRED7:%.*]], label [[IRR_GUARD1]], label [[WHILE_COND]]
; CHECK: if.then69:
; CHECK-NEXT: br i1 [[PRED8:%.*]], label [[EXIT]], label [[WHILE_COND]]
; CHECK: lor.rhs:
@@ -365,8 +365,11 @@ define void @irreducible_mountain_bug(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_COND_TRUE49:%.*]] = phi i1 [ [[PRED6:%.*]], [[WHILE_COND47]] ], [ true, [[WHILE_COND]] ], [ false, [[LOR_RHS]] ]
-; CHECK-NEXT: br i1 [[GUARD_COND_TRUE49]], label [[COND_TRUE49:%.*]], label [[COND_END61:%.*]]
+; CHECK-NEXT: [[GUARD_COND_TRUE49:%.*]] = phi i1 [ [[PRED6:%.*]], [[WHILE_COND47]] ], [ false, [[LOR_RHS]] ], [ true, [[WHILE_COND]] ]
+; CHECK-NEXT: br i1 [[GUARD_COND_TRUE49]], label [[IRR_GUARD1]], label [[COND_END61:%.*]]
+; CHECK: irr.guard1:
+; CHECK-NEXT: [[GUARD_COND_TRUE492:%.*]] = phi i1 [ false, [[COND_TRUE49:%.*]] ], [ false, [[COND_END61]] ], [ true, [[IRR_GUARD]] ]
+; CHECK-NEXT: br i1 [[GUARD_COND_TRUE492]], label [[COND_TRUE49]], label [[WHILE_BODY63:%.*]]
;
entry:
br i1 %Pred0, label %if.end, label %if.then
diff --git a/llvm/test/Transforms/FixIrreducible/switch.ll b/llvm/test/Transforms/FixIrreducible/switch.ll
index 27b9f9bf3b53b..5acef273ceed5 100644
--- a/llvm/test/Transforms/FixIrreducible/switch.ll
+++ b/llvm/test/Transforms/FixIrreducible/switch.ll
@@ -17,11 +17,11 @@ define void @loop_1(i32 %Value, i1 %PredEntry, i1 %PredD) {
; CHECK-NEXT: br i1 [[SWITCHLEAF2]], label [[IRR_GUARD]], label [[EXIT:%.*]]
; CHECK: LeafBlock:
; CHECK-NEXT: [[SWITCHLEAF:%.*]] = icmp eq i32 [[VALUE]], 0
-; CHECK-NEXT: br i1 [[SWITCHLEAF]], label [[IRR_GUARD]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[SWITCHLEAF]], label [[A:%.*]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ true, [[LEAFBLOCK]] ], [ [[PREDENTRY:%.*]], [[ENTRY:%.*]] ], [ false, [[LEAFBLOCK1]] ], [ false, [[A:%.*]] ]
+; CHECK-NEXT: [[GUARD_A:%.*]] = phi i1 [ false, [[LEAFBLOCK1]] ], [ false, [[A]] ], [ [[PREDENTRY:%.*]], [[ENTRY:%.*]] ]
; CHECK-NEXT: br i1 [[GUARD_A]], label [[A]], label [[B:%.*]]
;
entry:
diff --git a/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll b/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll
index 172a0da8d2d4b..d858f33c3b492 100644
--- a/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll
+++ b/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll
@@ -9,37 +9,47 @@ define void @irreducible(i1 %PredEntry, i1 %PredB1, i1 %PredB2, i1 %PredB3, i1 %
; CHECK-LABEL: @irreducible(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[PREDB2_INV:%.*]] = xor i1 [[PREDB2:%.*]], true
-; CHECK-NEXT: [[PREDB1_INV:%.*]] = xor i1 [[PREDB1:%.*]], true
; CHECK-NEXT: br label [[IRR_GUARD:%.*]]
-; CHECK: Flow:
-; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ [[PREDB4:%.*]], [[B4:%.*]] ], [ false, [[IRR_GUARD]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ false, [[B4]] ], [ true, [[IRR_GUARD]] ]
-; CHECK-NEXT: br i1 [[TMP1]], label [[B1:%.*]], label [[FLOW1:%.*]]
+; CHECK: Flow3:
+; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ undef, [[FLOW4:%.*]] ], [ [[TMP9:%.*]], [[FLOW:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ [[TMP3:%.*]], [[FLOW4]] ], [ [[TMP10:%.*]], [[FLOW]] ]
+; CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ [[TMP4:%.*]], [[FLOW4]] ], [ false, [[FLOW]] ]
+; CHECK-NEXT: br i1 true, label [[FLOW5:%.*]], label [[FLOW]]
; CHECK: B1:
-; CHECK-NEXT: br label [[FLOW1]]
-; CHECK: Flow1:
-; CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ [[PREDB1_INV]], [[B1]] ], [ [[TMP0]], [[FLOW:%.*]] ]
-; CHECK-NEXT: br i1 [[TMP2]], label [[B2:%.*]], label [[FLOW2:%.*]]
+; CHECK-NEXT: br label [[FLOW4]]
+; CHECK: Flow4:
+; CHECK-NEXT: [[TMP3]] = phi i1 [ false, [[B1:%.*]] ], [ undef, [[IRR_GUARD1:%.*]] ]
+; CHECK-NEXT: [[TMP4]] = phi i1 [ false, [[B1]] ], [ true, [[IRR_GUARD1]] ]
+; CHECK-NEXT: br label [[FLOW3:%.*]]
+; CHECK: Flow5:
+; CHECK-NEXT: br i1 [[TMP2]], label [[B2:%.*]], label [[FLOW6:%.*]]
; CHECK: B2:
-; CHECK-NEXT: br i1 [[PREDB2_INV]], label [[B3:%.*]], label [[FLOW3:%.*]]
-; CHECK: Flow2:
-; CHECK-NEXT: [[TMP3:%.*]] = phi i1 [ [[TMP5:%.*]], [[FLOW3]] ], [ undef, [[FLOW1]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ [[TMP6:%.*]], [[FLOW3]] ], [ true, [[FLOW1]] ]
-; CHECK-NEXT: br i1 [[TMP4]], label [[EXIT:%.*]], label [[IRR_GUARD]]
+; CHECK-NEXT: br i1 [[PREDB2_INV]], label [[B3:%.*]], label [[FLOW7:%.*]]
+; CHECK: Flow6:
+; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ [[TMP7:%.*]], [[FLOW7]] ], [ [[TMP0]], [[FLOW5]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = phi i1 [ [[TMP8:%.*]], [[FLOW7]] ], [ true, [[FLOW5]] ]
+; CHECK-NEXT: br i1 [[TMP6]], label [[EXIT:%.*]], label [[IRR_GUARD]]
; CHECK: B3:
-; CHECK-NEXT: br label [[FLOW3]]
+; CHECK-NEXT: br label [[FLOW7]]
; CHECK: B4:
; CHECK-NEXT: br label [[FLOW]]
-; CHECK: Flow3:
-; CHECK-NEXT: [[TMP5]] = phi i1 [ [[PREDB3:%.*]], [[B3]] ], [ undef, [[B2]] ]
-; CHECK-NEXT: [[TMP6]] = phi i1 [ false, [[B3]] ], [ true, [[B2]] ]
-; CHECK-NEXT: br label [[FLOW2]]
+; CHECK: Flow7:
+; CHECK-NEXT: [[TMP7]] = phi i1 [ [[PREDB3:%.*]], [[B3]] ], [ undef, [[B2]] ]
+; CHECK-NEXT: [[TMP8]] = phi i1 [ false, [[B3]] ], [ true, [[B2]] ]
+; CHECK-NEXT: br label [[FLOW6]]
; CHECK: exit:
; CHECK-NEXT: ret void
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ [[PREDENTRY:%.*]], [[ENTRY:%.*]] ], [ [[TMP3]], [[FLOW2]] ]
+; CHECK-NEXT: [[GUARD_B1:%.*]] = phi i1 [ [[PREDENTRY:%.*]], [[ENTRY:%.*]] ], [ [[TMP5]], [[FLOW6]] ]
; CHECK-NEXT: [[GUARD_B1_INV:%.*]] = xor i1 [[GUARD_B1]], true
-; CHECK-NEXT: br i1 [[GUARD_B1_INV]], label [[B4]], label [[FLOW]]
+; CHECK-NEXT: br i1 [[GUARD_B1_INV]], label [[B4:%.*]], label [[FLOW]]
+; CHECK: Flow:
+; CHECK-NEXT: [[TMP9]] = phi i1 [ [[TMP0]], [[FLOW3]] ], [ undef, [[B4]] ], [ undef, [[IRR_GUARD]] ]
+; CHECK-NEXT: [[TMP10]] = phi i1 [ [[TMP1]], [[FLOW3]] ], [ false, [[B4]] ], [ true, [[IRR_GUARD]] ]
+; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[FLOW3]] ], [ [[PREDB4:%.*]], [[B4]] ], [ true, [[IRR_GUARD]] ]
+; CHECK-NEXT: br i1 [[TMP11]], label [[IRR_GUARD1]], label [[FLOW3]]
+; CHECK: irr.guard1:
+; CHECK-NEXT: br i1 [[TMP10]], label [[B1]], label [[FLOW4]]
;
{
entry:
diff --git a/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll b/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
index f588d3fe7cef3..26afd0b9baddb 100644
--- a/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
+++ b/llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
@@ -8,126 +8,137 @@ define void @irreducible_mountain_bug(i1 %Pred0, i1 %Pred1, i1 %Pred2, i1 %Pred3
; CHECK-NEXT: [[PRED2_INV:%.*]] = xor i1 [[PRED2:%.*]], true
; CHECK-NEXT: [[PRED3_INV:%.*]] = xor i1 [[PRED3:%.*]], true
; CHECK-NEXT: [[PRED5_INV:%.*]] = xor i1 [[PRED5:%.*]], true
-; CHECK-NEXT: [[PRED4_INV:%.*]] = xor i1 [[PRED4:%.*]], true
; CHECK-NEXT: [[PRED10_INV:%.*]] = xor i1 [[PRED10:%.*]], true
; CHECK-NEXT: [[PRED11_INV:%.*]] = xor i1 [[PRED11:%.*]], true
; CHECK-NEXT: [[PRED12_INV:%.*]] = xor i1 [[PRED12:%.*]], true
; CHECK-NEXT: [[PRED13_INV:%.*]] = xor i1 [[PRED13:%.*]], true
-; CHECK-NEXT: br i1 [[PRED0_INV]], label [[IF_THEN:%.*]], label [[FLOW19:%.*]]
-; CHECK: Flow19:
-; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ false, [[FLOW3:%.*]] ], [ true, [[ENTRY:%.*]] ]
-; CHECK-NEXT: br i1 [[TMP0]], label [[IF_END:%.*]], label [[FLOW20:%.*]]
+; CHECK-NEXT: br i1 [[PRED0_INV]], label [[IF_THEN:%.*]], label [[FLOW23:%.*]]
+; CHECK: Flow23:
+; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ false, [[FLOW6:%.*]] ], [ true, [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[TMP0]], label [[IF_END:%.*]], label [[FLOW24:%.*]]
; CHECK: if.end:
-; CHECK-NEXT: br i1 [[PRED1_INV]], label [[IF_ELSE:%.*]], label [[FLOW18:%.*]]
-; CHECK: Flow18:
+; CHECK-NEXT: br i1 [[PRED1_INV]], label [[IF_ELSE:%.*]], label [[FLOW22:%.*]]
+; CHECK: Flow22:
; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ false, [[IF_ELSE]] ], [ true, [[IF_END]] ]
; CHECK-NEXT: br i1 [[TMP1]], label [[IF_THEN7:%.*]], label [[IF_END16:%.*]]
; CHECK: if.then7:
; CHECK-NEXT: br label [[IF_END16]]
; CHECK: if.else:
-; CHECK-NEXT: br label [[FLOW18]]
-; CHECK: Flow20:
+; CHECK-NEXT: br label [[FLOW22]]
+; CHECK: Flow24:
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: if.end16:
-; CHECK-NEXT: br i1 [[PRED2_INV]], label [[IF_THEN39:%.*]], label [[FLOW16:%.*]]
-; CHECK: Flow16:
-; CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[FLOW5:%.*]] ], [ true, [[IF_END16]] ]
-; CHECK-NEXT: br i1 [[TMP2]], label [[WHILE_COND_PREHEADER:%.*]], label [[FLOW17:%.*]]
+; CHECK-NEXT: br i1 [[PRED2_INV]], label [[IF_THEN39:%.*]], label [[FLOW20:%.*]]
+; CHECK: Flow20:
+; CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[FLOW8:%.*]] ], [ true, [[IF_END16]] ]
+; CHECK-NEXT: br i1 [[TMP2]], label [[WHILE_COND_PREHEADER:%.*]], label [[FLOW21:%.*]]
; CHECK: while.cond.preheader:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
-; CHECK: Flow17:
-; CHECK-NEXT: br label [[FLOW20]]
+; CHECK: Flow21:
+; CHECK-NEXT: br label [[FLOW24]]
; CHECK: while.cond:
-; CHECK-NEXT: br i1 [[PRED3_INV]], label [[LOR_RHS:%.*]], label [[FLOW12:%.*]]
-; CHECK: Flow7:
-; CHECK-NEXT: [[TMP3:%.*]] = phi i1 [ false, [[COND_END61:%.*]] ], [ undef, [[IRR_GUARD:%.*]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ true, [[COND_END61]] ], [ undef, [[IRR_GUARD]] ]
-; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ [[PRED7:%.*]], [[COND_END61]] ], [ false, [[IRR_GUARD]] ]
-; CHECK-NEXT: [[TMP6:%.*]] = phi i1 [ false, [[COND_END61]] ], [ true, [[IRR_GUARD]] ]
-; CHECK-NEXT: br i1 [[TMP6]], label [[COND_TRUE49:%.*]], label [[FLOW8:%.*]]
+; CHECK-NEXT: br i1 [[PRED3_INV]], label [[LOR_RHS:%.*]], label [[FLOW16:%.*]]
; CHECK: cond.true49:
-; CHECK-NEXT: br label [[FLOW8]]
-; CHECK: Flow8:
-; CHECK-NEXT: [[TMP7:%.*]] = phi i1 [ false, [[COND_TRUE49]] ], [ [[TMP3]], [[FLOW7:%.*]] ]
-; CHECK-NEXT: [[TMP8:%.*]] = phi i1 [ false, [[COND_TRUE49]] ], [ [[TMP4]], [[FLOW7]] ]
-; CHECK-NEXT: [[TMP9:%.*]] = phi i1 [ [[PRED4_INV]], [[COND_TRUE49]] ], [ [[TMP5]], [[FLOW7]] ]
-; CHECK-NEXT: br i1 [[TMP9]], label [[WHILE_BODY63:%.*]], label [[FLOW9:%.*]]
+; CHECK-NEXT: br label [[FLOW10:%.*]]
; CHECK: while.body63:
-; CHECK-NEXT: br i1 [[PRED5_INV]], label [[WHILE_COND47:%.*]], label [[FLOW10:%.*]]
-; CHECK: Flow9:
-; CHECK-NEXT: [[TMP10:%.*]] = phi i1 [ [[TMP22:%.*]], [[FLOW10]] ], [ undef, [[FLOW8]] ]
-; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[FLOW10]] ], [ [[TMP7]], [[FLOW8]] ]
-; CHECK-NEXT: [[TMP12:%.*]] = phi i1 [ false, [[FLOW10]] ], [ [[TMP8]], [[FLOW8]] ]
-; CHECK-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[FLOW10]] ], [ undef, [[FLOW8]] ]
-; CHECK-NEXT: [[TMP14:%.*]] = phi i1 [ [[TMP23:%.*]], [[FLOW10]] ], [ true, [[FLOW8]] ]
-; CHECK-NEXT: [[DOTINV11:%.*]] = xor i1 [[TMP11]], true
-; CHECK-NEXT: [[DOTINV:%.*]] = xor i1 [[TMP12]], true
-; CHECK-NEXT: br i1 [[TMP14]], label [[LOOP_EXIT_GUARD1:%.*]], label [[IRR_GUARD]]
+; CHECK-NEXT: br i1 [[PRED5_INV]], label [[WHILE_COND47:%.*]], label [[FLOW14:%.*]]
+; CHECK: Flow13:
+; CHECK-NEXT: [[TMP3:%.*]] = phi i1 [ [[TMP19:%.*]], [[FLOW14]] ], [ undef, [[LOOP_EXIT_GUARD5:%.*]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ true, [[FLOW14]] ], [ [[TMP24:%.*]], [[LOOP_EXIT_GUARD5]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ false, [[FLOW14]] ], [ [[TMP24]], [[LOOP_EXIT_GUARD5]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = phi i1 [ false, [[FLOW14]] ], [ undef, [[LOOP_EXIT_GUARD5]] ]
+; CHECK-NEXT: [[TMP7:%.*]] = phi i1 [ [[TMP20:%.*]], [[FLOW14]] ], [ true, [[LOOP_EXIT_GUARD5]] ]
+; CHECK-NEXT: br label [[FLOW12:%.*]]
; CHECK: while.cond47:
-; CHECK-NEXT: br label [[FLOW10]]
+; CHECK-NEXT: br label [[FLOW14]]
; CHECK: cond.end61:
-; CHECK-NEXT: br label [[FLOW7]]
-; CHECK: Flow14:
-; CHECK-NEXT: [[TMP15:%.*]] = phi i1 [ [[TMP20:%.*]], [[FLOW15:%.*]] ], [ undef, [[LOOP_EXIT_GUARD1]] ]
-; CHECK-NEXT: [[TMP16:%.*]] = phi i1 [ [[TMP21:%.*]], [[FLOW15]] ], [ [[DOTINV]], [[LOOP_EXIT_GUARD1]] ]
-; CHECK-NEXT: br label [[FLOW13:%.*]]
+; CHECK-NEXT: br label [[FLOW11:%.*]]
+; CHECK: Flow18:
+; CHECK-NEXT: [[TMP8:%.*]] = phi i1 [ [[TMP17:%.*]], [[FLOW19:%.*]] ], [ undef, [[LOOP_EXIT_GUARD3:%.*]] ]
+; CHECK-NEXT: [[TMP9:%.*]] = phi i1 [ [[TMP18:%.*]], [[FLOW19]] ], [ [[DOTINV:%.*]], [[LOOP_EXIT_GUARD3]] ]
+; CHECK-NEXT: br label [[FLOW17:%.*]]
; CHECK: if.then69:
-; CHECK-NEXT: br label [[FLOW15]]
+; CHECK-NEXT: br label [[FLOW19]]
; CHECK: lor.rhs:
-; CHECK-NEXT: br label [[FLOW12]]
+; CHECK-NEXT: br label [[FLOW16]]
; CHECK: while.end76:
-; CHECK-NEXT: br label [[FLOW6:%.*]]
+; CHECK-NEXT: br label [[FLOW9:%.*]]
; CHECK: if.then39:
-; CHECK-NEXT: br i1 [[PRED10_INV]], label [[IF_END_I145:%.*]], label [[FLOW5]]
+; CHECK-NEXT: br i1 [[PRED10_INV]], label [[IF_END_I145:%.*]], label [[FLOW8]]
; CHECK: if.end.i145:
-; CHECK-NEXT: br i1 [[PRED11_INV]], label [[IF_END8_I149:%.*]], label [[FLOW4:%.*]]
+; CHECK-NEXT: br i1 [[PRED11_INV]], label [[IF_END8_I149:%.*]], label [[FLOW7:%.*]]
; CHECK: if.end8.i149:
-; CHECK-NEXT: br label [[FLOW4]]
+; CHECK-NEXT: br label [[FLOW7]]
; CHECK: if.then:
-; CHECK-NEXT: br i1 [[PRED12_INV]], label [[IF_END_I:%.*]], label [[FLOW3]]
+; CHECK-NEXT: br i1 [[PRED12_INV]], label [[IF_END_I:%.*]], label [[FLOW6]]
; CHECK: if.end.i:
; CHECK-NEXT: br i1 [[PRED13_INV]], label [[IF_END8_I:%.*]], label [[FLOW:%.*]]
; CHECK: if.end8.i:
; CHECK-NEXT: br label [[FLOW]]
; CHECK: Flow:
-; CHECK-NEXT: br label [[FLOW3]]
-; CHECK: Flow3:
-; CHECK-NEXT: br label [[FLOW19]]
-; CHECK: Flow4:
-; CHECK-NEXT: br label [[FLOW5]]
-; CHECK: Flow5:
-; CHECK-NEXT: br label [[FLOW16]]
+; CHECK-NEXT: br label [[FLOW6]]
; CHECK: Flow6:
-; CHECK-NEXT: br label [[FLOW17]]
+; CHECK-NEXT: br label [[FLOW23]]
+; CHECK: Flow7:
+; CHECK-NEXT: br label [[FLOW8]]
+; CHECK: Flow8:
+; CHECK-NEXT: br label [[FLOW20]]
+; CHECK: Flow9:
+; CHECK-NEXT: br label [[FLOW21]]
; CHECK: exit:
; CHECK-NEXT: ret void
-; CHECK: Flow12:
-; CHECK-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[LOR_RHS]] ], [ undef, [[WHILE_COND]] ]
-; CHECK-NEXT: [[TMP18:%.*]] = phi i1 [ false, [[LOR_RHS]] ], [ true, [[WHILE_COND]] ]
-; CHECK-NEXT: [[TMP19:%.*]] = phi i1 [ [[PRED9:%.*]], [[LOR_RHS]] ], [ [[PRED3]], [[WHILE_COND]] ]
-; CHECK-NEXT: br i1 [[TMP19]], label [[IRR_GUARD]], label [[FLOW13]]
+; CHECK: Flow16:
+; CHECK-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[LOR_RHS]] ], [ undef, [[WHILE_COND]] ]
+; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[LOR_RHS]] ], [ true, [[WHILE_COND]] ]
+; CHECK-NEXT: [[TMP12:%.*]] = phi i1 [ [[PRED9:%.*]], [[LOR_RHS]] ], [ true, [[WHILE_COND]] ]
+; CHECK-NEXT: br i1 [[TMP12]], label [[IRR_GUARD:%.*]], label [[FLOW17]]
; CHECK: irr.guard:
-; CHECK-NEXT: [[GUARD_COND_TRUE49:%.*]] = phi i1 [ [[TMP10]], [[FLOW9]] ], [ [[TMP18]], [[FLOW12]] ]
+; CHECK-NEXT: [[GUARD_COND_TRUE49:%.*]] = phi i1 [ [[TMP26:%.*]], [[FLOW12]] ], [ [[TMP11]], [[FLOW16]] ]
; CHECK-NEXT: [[GUARD_COND_TRUE49_INV:%.*]] = xor i1 [[GUARD_COND_TRUE49]], true
-; CHECK-NEXT: br i1 [[GUARD_COND_TRUE49_INV]], label [[COND_END61]], label [[FLOW7]]
-; CHECK: Flow15:
-; CHECK-NEXT: [[TMP20]] = phi i1 [ false, [[IF_THEN69:%.*]] ], [ [[TMP13]], [[LOOP_EXIT_GUARD2:%.*]] ]
-; CHECK-NEXT: [[TMP21]] = phi i1 [ [[PRED8:%.*]], [[IF_THEN69]] ], [ [[DOTINV]], [[LOOP_EXIT_GUARD2]] ]
-; CHECK-NEXT: br label [[FLOW14:%.*]]
+; CHECK-NEXT: br i1 [[GUARD_COND_TRUE49_INV]], label [[COND_END61:%.*]], label [[FLOW11]]
+; CHECK: Flow11:
+; CHECK-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[COND_END61]] ], [ undef, [[IRR_GUARD]] ]
+; CHECK-NEXT: [[TMP14:%.*]] = phi i1 [ true, [[COND_END61]] ], [ undef, [[IRR_GUARD]] ]
+; CHECK-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[COND_END61]] ], [ true, [[IRR_GUARD]] ]
+; CHECK-NEXT: [[TMP16:%.*]] = phi i1 [ [[PRED7:%.*]], [[COND_END61]] ], [ true, [[IRR_GUARD]] ]
+; CHECK-NEXT: br i1 [[TMP16]], label [[IRR_GUARD1:%.*]], label [[FLOW12]]
+; CHECK: irr.guard1:
+; CHECK-NEXT: [[GUARD_COND_TRUE492:%.*]] = phi i1 [ [[TMP24]], [[FLOW10]] ], [ [[TMP15]], [[FLOW11]] ]
+; CHECK-NEXT: br i1 [[GUARD_COND_TRUE492]], label [[COND_TRUE49:%.*]], label [[FLOW10]]
+; CHECK: Flow19:
+; CHECK-NEXT: [[TMP17]] = phi i1 [ false, [[IF_THEN69:%.*]] ], [ [[TMP29:%.*]], [[LOOP_EXIT_GUARD4:%.*]] ]
+; CHECK-NEXT: [[TMP18]] = phi i1 [ [[PRED8:%.*]], [[IF_THEN69]] ], [ [[DOTINV]], [[LOOP_EXIT_GUARD4]] ]
+; CHECK-NEXT: br label [[FLOW18:%.*]]
; CHECK: loop.exit.guard:
-; CHECK-NEXT: br i1 [[TMP24:%.*]], label [[WHILE_END76:%.*]], label [[FLOW6]]
+; CHECK-NEXT: br i1 [[TMP21:%.*]], label [[WHILE_END76:%.*]], label [[FLOW9]]
+; CHECK: Flow14:
+; CHECK-NEXT: [[TMP19]] = phi i1 [ [[PRED6:%.*]], [[WHILE_COND47]] ], [ undef, [[WHILE_BODY63:%.*]] ]
+; CHECK-NEXT: [[TMP20]] = phi i1 [ false, [[WHILE_COND47]] ], [ true, [[WHILE_BODY63]] ]
+; CHECK-NEXT: br label [[FLOW13:%.*]]
+; CHECK: Flow17:
+; CHECK-NEXT: [[TMP21]] = phi i1 [ [[TMP8]], [[FLOW18]] ], [ [[TMP10]], [[FLOW16]] ]
+; CHECK-NEXT: [[TMP22:%.*]] = phi i1 [ [[TMP9]], [[FLOW18]] ], [ true, [[FLOW16]] ]
+; CHECK-NEXT: br i1 [[TMP22]], label [[LOOP_EXIT_GUARD:%.*]], label [[WHILE_COND]]
+; CHECK: loop.exit.guard3:
+; CHECK-NEXT: br i1 [[DOTINV]], label [[LOOP_EXIT_GUARD4]], label [[FLOW18]]
+; CHECK: loop.exit.guard4:
+; CHECK-NEXT: br i1 [[DOTINV15:%.*]], label [[IF_THEN69]], label [[FLOW19]]
; CHECK: Flow10:
-; CHECK-NEXT: [[TMP22]] = phi i1 [ [[PRED6:%.*]], [[WHILE_COND47]] ], [ undef, [[WHILE_BODY63]] ]
-; CHECK-NEXT: [[TMP23]] = phi i1 [ false, [[WHILE_COND47]] ], [ true, [[WHILE_BODY63]] ]
-; CHECK-NEXT: br label [[FLOW9]]
-; CHECK: Flow13:
-; CHECK-NEXT: [[TMP24]] = phi i1 [ [[TMP15]], [[FLOW14]] ], [ [[TMP17]], [[FLOW12]] ]
-; CHECK-NEXT: [[TMP25:%.*]] = phi i1 [ [[TMP16]], [[FLOW14]] ], [ true, [[FLOW12]] ]
-; CHECK-NEXT: br i1 [[TMP25]], label [[LOOP_EXIT_GUARD:%.*]], label [[WHILE_COND]]
-; CHECK: loop.exit.guard1:
-; CHECK-NEXT: br i1 [[DOTINV]], label [[LOOP_EXIT_GUARD2]], label [[FLOW14]]
-; CHECK: loop.exit.guard2:
-; CHECK-NEXT: br i1 [[DOTINV11]], label [[IF_THEN69]], label [[FLOW15]]
+; CHECK-NEXT: [[TMP23:%.*]] = phi i1 [ false, [[COND_TRUE49]] ], [ true, [[IRR_GUARD1]] ]
+; CHECK-NEXT: [[TMP24]] = phi i1 [ false, [[COND_TRUE49]] ], [ undef, [[IRR_GUARD1]] ]
+; CHECK-NEXT: [[TMP25:%.*]] = phi i1 [ [[PRED4:%.*]], [[COND_TRUE49]] ], [ true, [[IRR_GUARD1]] ]
+; CHECK-NEXT: br i1 [[TMP25]], label [[LOOP_EXIT_GUARD5]], label [[IRR_GUARD1]]
+; CHECK: Flow12:
+; CHECK-NEXT: [[TMP26]] = phi i1 [ [[TMP3]], [[FLOW13]] ], [ undef, [[FLOW11]] ]
+; CHECK-NEXT: [[TMP27:%.*]] = phi i1 [ [[TMP4]], [[FLOW13]] ], [ [[TMP13]], [[FLOW11]] ]
+; CHECK-NEXT: [[TMP28:%.*]] = phi i1 [ [[TMP5]], [[FLOW13]] ], [ [[TMP14]], [[FLOW11]] ]
+; CHECK-NEXT: [[TMP29]] = phi i1 [ [[TMP6]], [[FLOW13]] ], [ undef, [[FLOW11]] ]
+; CHECK-NEXT: [[TMP30:%.*]] = phi i1 [ [[TMP7]], [[FLOW13]] ], [ true, [[FLOW11]] ]
+; CHECK-NEXT: [[DOTINV15]] = xor i1 [[TMP27]], true
+; CHECK-NEXT: [[DOTINV]] = xor i1 [[TMP28]], true
+; CHECK-NEXT: br i1 [[TMP30]], label [[LOOP_EXIT_GUARD3]], label [[IRR_GUARD]]
+; CHECK: loop.exit.guard5:
+; CHECK-NEXT: br i1 [[TMP23]], label [[WHILE_BODY63]], label [[FLOW13]]
;
entry:
br i1 %Pred0, label %if.end, label %if.then
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