[llvm] fd6faee - [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (#101151)
via llvm-commits
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Tue Jul 30 19:38:38 PDT 2024
Author: Shengchen Kan
Date: 2024-07-31T10:38:33+08:00
New Revision: fd6faee5b3b5a7c0e5e87aa0b5719a1a48159ea0
URL: https://github.com/llvm/llvm-project/commit/fd6faee5b3b5a7c0e5e87aa0b5719a1a48159ea0
DIFF: https://github.com/llvm/llvm-project/commit/fd6faee5b3b5a7c0e5e87aa0b5719a1a48159ea0.diff
LOG: [Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (#101151)
In front-end, now we detect for `-mapx-features=/-mapxf` and `-muintr`,
which is aligned with GCC
https://gcc.gnu.org/bugzilla/attachment.cgi?id=58698&action=diff
In backend, we just disable these 64-bit-only features silently, so that
there is no error for
`-march=native -m32` on APX-supported arch.
llvm-issue: https://github.com/llvm/llvm-project/issues/94810
GCC thread: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115978
Added:
llvm/test/CodeGen/X86/apx/i386-ndd.ll
Modified:
clang/lib/Driver/ToolChains/Arch/X86.cpp
clang/test/Driver/x86-target-features.c
llvm/lib/Target/X86/X86Subtarget.cpp
Removed:
################################################################################
diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp b/clang/lib/Driver/ToolChains/Arch/X86.cpp
index 2f63333b732f6..dc6c8695488bb 100644
--- a/clang/lib/Driver/ToolChains/Arch/X86.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp
@@ -266,19 +266,29 @@ void x86::getX86TargetFeatures(const Driver &D, const llvm::Triple &Triple,
}
bool IsNegative = Name.starts_with("no-");
+
+ bool Not64Bit = ArchType != llvm::Triple::x86_64;
+ if (Not64Bit && Name == "uintr")
+ D.Diag(diag::err_drv_unsupported_opt_for_target)
+ << A->getSpelling() << Triple.getTriple();
+
if (A->getOption().matches(options::OPT_mapx_features_EQ) ||
A->getOption().matches(options::OPT_mno_apx_features_EQ)) {
+ if (Not64Bit && !IsNegative)
+ D.Diag(diag::err_drv_unsupported_opt_for_target)
+ << StringRef(A->getSpelling().str() + "|-mapxf")
+ << Triple.getTriple();
+
for (StringRef Value : A->getValues()) {
- if (Value == "egpr" || Value == "push2pop2" || Value == "ppx" ||
- Value == "ndd" || Value == "ccmp" || Value == "nf" ||
- Value == "cf" || Value == "zu") {
- Features.push_back(
- Args.MakeArgString((IsNegative ? "-" : "+") + Value));
- continue;
- }
- D.Diag(clang::diag::err_drv_unsupported_option_argument)
- << A->getSpelling() << Value;
+ if (Value != "egpr" && Value != "push2pop2" && Value != "ppx" &&
+ Value != "ndd" && Value != "ccmp" && Value != "nf" &&
+ Value != "cf" && Value != "zu")
+ D.Diag(clang::diag::err_drv_unsupported_option_argument)
+ << A->getSpelling() << Value;
+
+ Features.push_back(
+ Args.MakeArgString((IsNegative ? "-" : "+") + Value));
}
continue;
}
diff --git a/clang/test/Driver/x86-target-features.c b/clang/test/Driver/x86-target-features.c
index 63237cbc3e7ef..7d77ae75f8c47 100644
--- a/clang/test/Driver/x86-target-features.c
+++ b/clang/test/Driver/x86-target-features.c
@@ -309,8 +309,8 @@
// HRESET: "-target-feature" "+hreset"
// NO-HRESET: "-target-feature" "-hreset"
-// RUN: %clang --target=i386 -march=i386 -muintr %s -### 2>&1 | FileCheck -check-prefix=UINTR %s
-// RUN: %clang --target=i386 -march=i386 -mno-uintr %s -### 2>&1 | FileCheck -check-prefix=NO-UINTR %s
+// RUN: %clang --target=x86_64 -muintr %s -### 2>&1 | FileCheck -check-prefix=UINTR %s
+// RUN: %clang --target=x86_64 -mno-uintr %s -### 2>&1 | FileCheck -check-prefix=NO-UINTR %s
// UINTR: "-target-feature" "+uintr"
// NO-UINTR: "-target-feature" "-uintr"
@@ -409,6 +409,15 @@
// NONX86-NEXT: warning: argument unused during compilation: '-msse4.2' [-Wunused-command-line-argument]
// NONX86-NEXT: error: unsupported option '-mno-sgx' for target 'aarch64'
+// RUN: not %clang -### --target=i386 -muintr %s 2>&1 | FileCheck --check-prefix=NON-UINTR %s
+// RUN: %clang -### --target=i386 -mno-uintr %s 2>&1 > /dev/null
+// RUN: not %clang -### --target=i386 -mapx-features=ndd %s 2>&1 | FileCheck --check-prefix=NON-APX %s
+// RUN: not %clang -### --target=i386 -mapxf %s 2>&1 | FileCheck --check-prefix=NON-APX %s
+// RUN: %clang -### --target=i386 -mno-apxf %s 2>&1 > /dev/null
+// NON-UINTR: error: unsupported option '-muintr' for target 'i386'
+// NON-APX: error: unsupported option '-mapx-features=|-mapxf' for target 'i386'
+// NON-APX-NOT: error: {{.*}} -mapx-features=
+
// RUN: %clang --target=i386 -march=i386 -mharden-sls=return %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-RET,NO-SLS %s
// RUN: %clang --target=i386 -march=i386 -mharden-sls=indirect-jmp %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-IJMP,NO-SLS %s
// RUN: %clang --target=i386 -march=i386 -mharden-sls=none -mharden-sls=all %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-IJMP,SLS-RET %s
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 4e8e04b1112c0..7d5af2ede99cf 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -279,6 +279,13 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
FullFS += ",+evex512";
}
+ // Disable 64-bit only features in non-64-bit mode.
+ SmallVector<StringRef, 9> FeaturesIn64BitOnly = {
+ "egpr", "push2pop2", "ppx", "ndd", "ccmp", "nf", "cf", "zu", "uintr"};
+ if (FullFS.find("-64bit-mode") != std::string::npos)
+ llvm::for_each(FeaturesIn64BitOnly,
+ [&](StringRef F) { FullFS += ",-" + F.str(); });
+
// Parse features string and set the CPU.
ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
diff --git a/llvm/test/CodeGen/X86/apx/i386-ndd.ll b/llvm/test/CodeGen/X86/apx/i386-ndd.ll
new file mode 100644
index 0000000000000..146a99340eb66
--- /dev/null
+++ b/llvm/test/CodeGen/X86/apx/i386-ndd.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=i386-linux-gnu -mattr=+cmov,+ndd < %s | FileCheck %s
+define i32 @test(i1 %cmp, i32 %x, i32 %y) nounwind {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
+; CHECK-NEXT: leal {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: leal {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: cmovnel %eax, %ecx
+; CHECK-NEXT: movl (%ecx), %eax
+; CHECK-NEXT: retl
+entry:
+ %cmov = select i1 %cmp, i32 %x, i32 %y
+ ret i32 %cmov
+}
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