[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

Jessica Clarke via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 2 08:35:41 PDT 2024


================
@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in {
                             [IntrNoMem, IntrWillReturn, IntrSpeculatable,
                             ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
 
+  def int_riscv_cv_alu_slet  : ScalarCoreVAluGprGprIntrinsic;
----------------
jrtc27 wrote:

*Especially* if they're being renamed.

https://github.com/llvm/llvm-project/pull/100684


More information about the llvm-commits mailing list