[llvm] d2b6a8e - AMDGPU: Fix asserting when trying to print scc (#101175)
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Tue Jul 30 06:41:16 PDT 2024
Author: Matt Arsenault
Date: 2024-07-30T17:41:13+04:00
New Revision: d2b6a8ee67efc16d6594dfa9fdcf4a27251c7dac
URL: https://github.com/llvm/llvm-project/commit/d2b6a8ee67efc16d6594dfa9fdcf4a27251c7dac
DIFF: https://github.com/llvm/llvm-project/commit/d2b6a8ee67efc16d6594dfa9fdcf4a27251c7dac.diff
LOG: AMDGPU: Fix asserting when trying to print scc (#101175)
This is printable using inline assembly. Also we should
handle using scc directly as instruction operands.
Added:
Modified:
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/test/CodeGen/AMDGPU/inline-asm.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index a75391fcfa8a4..94bf5e4b95270 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -323,8 +323,6 @@ void AMDGPUInstPrinter::printRegOperand(unsigned RegNo, raw_ostream &O,
case AMDGPU::SP_REG:
case AMDGPU::PRIVATE_RSRC_REG:
llvm_unreachable("pseudo-register should not ever be emitted");
- case AMDGPU::SCC:
- llvm_unreachable("pseudo scc should not ever be emitted");
default:
break;
}
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm.ll b/llvm/test/CodeGen/AMDGPU/inline-asm.ll
index 555af5013bc4e..dfb696fb3e29a 100644
--- a/llvm/test/CodeGen/AMDGPU/inline-asm.ll
+++ b/llvm/test/CodeGen/AMDGPU/inline-asm.ll
@@ -314,3 +314,21 @@ exit:
tail call void asm sideeffect "; use $0", "v"(i64 %v1)
ret void
}
+
+; CHECK-LABEL: {{^}}scc_as_i32:
+; CHECK: ; def scc
+; CHECK: ; use scc
+define void @scc_as_i32() {
+ %scc = call i32 asm sideeffect "; def $0", "={scc}"()
+ call void asm sideeffect "; use $0 ", "{scc}"(i32 %scc)
+ ret void
+}
+
+; CHECK-LABEL: {{^}}scc_as_i1:
+; CHECK: ; def scc
+; CHECK: ; use scc
+define void @scc_as_i1() {
+ %scc = call i1 asm sideeffect "; def $0", "={scc}"()
+ call void asm sideeffect "; use $0 ", "{scc}"(i1 %scc)
+ ret void
+}
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