[llvm] [HEXAGON] Utilize new mask instruction (PR #92365)

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github-actions[bot] wrote:

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``````````bash
git-clang-format --diff a8e1c3e1239604ac787b6a2d39b5278ddec8aa8a fed67f7151518d35afcacd7a3da61ff2701fcc05 --extensions cpp -- llvm/lib/Target/Hexagon/HexagonMask.cpp llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/Hexagon/HexagonMask.cpp b/llvm/lib/Target/Hexagon/HexagonMask.cpp
index 6a06efd307..ac9abfa6c1 100644
--- a/llvm/lib/Target/Hexagon/HexagonMask.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonMask.cpp
@@ -90,9 +90,10 @@ bool HexagonMask::runOnMachineFunction(MachineFunction &MF) {
 
   if (!F.hasFnAttribute(Attribute::OptimizeForSize))
     return false;
-  // The mask instruction available in v66 can be used to generate values in registers using 2 immediates
-  // Eg. to form 0x07fffffc in R0, you would write "R0 = mask(#25,#2)"
-  // Since it is a single-word instruction, it takes less code size than a constant-extended transfer at Os
+  // The mask instruction available in v66 can be used to generate values in
+  // registers using 2 immediates Eg. to form 0x07fffffc in R0, you would write
+  // "R0 = mask(#25,#2)" Since it is a single-word instruction, it takes less
+  // code size than a constant-extended transfer at Os
   replaceConstExtTransferImmWithMask(MF);
 
   return true;

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https://github.com/llvm/llvm-project/pull/92365