[llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)

[via llvm-commits]

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@@ -820,68 +845,76 @@ static unsigned int getCodeMemorySemantic(MemSDNode *N,
       (CodeAddrSpace == NVPTX::PTXLdStInstCode::GENERIC ||
        CodeAddrSpace == NVPTX::PTXLdStInstCode::GLOBAL ||
        CodeAddrSpace == NVPTX::PTXLdStInstCode::SHARED);
+  if (!AddrGenericOrGlobalOrShared)
+    return NVPTX::Ordering::NotAtomic;
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gonzalobg wrote:

> Technically it could be updated by the host and we may need to have a way to force a read from it.

If the host updates a `const` while a kernel that has accessed it once has not finished, the behavior is undefined. 

https://github.com/llvm/llvm-project/pull/98551