[llvm] [SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (PR #101415)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 14:52:25 PDT 2024
https://github.com/tltao updated https://github.com/llvm/llvm-project/pull/101415
>From 78838a98d08d0f5c9a482e8c99acf1f1be94ec3b Mon Sep 17 00:00:00 2001
From: Tony Tao <tonytao at ca.ibm.com>
Date: Wed, 31 Jul 2024 17:39:51 -0400
Subject: [PATCH 1/2] Fix incorrect MCInstBuilder for ALGFI and prevent r0 from
being used in addressing the ADA
---
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 2 +-
llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 4 +--
.../CodeGen/SystemZ/Large/large-ada-01.py | 30 +++++++++++++++++
.../CodeGen/SystemZ/Large/large-ada-02.py | 33 +++++++++++++++++++
4 files changed, 66 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/CodeGen/SystemZ/Large/large-ada-01.py
create mode 100644 llvm/test/CodeGen/SystemZ/Large/large-ada-02.py
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 3d025a99b3d83..9d0fbd309786b 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -348,7 +348,7 @@ void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
} else
EmitToStreamer(
*OutStreamer,
- MCInstBuilder(SystemZ::ALGFI).addReg(TargetReg).addImm(Disp));
+ MCInstBuilder(SystemZ::ALGFI).addReg(TargetReg).addReg(TargetReg).addImm(Disp));
Disp = 0;
Op = Op0;
}
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
index 7ab0b36636304..95ed1a00e603f 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -298,13 +298,13 @@ let Predicates = [IsTargetXPLINK64] in {
}
let hasNoSchedulingInfo = 1, Defs = [CC] in {
- def ADA_ENTRY : Alias<12, (outs GR64:$Reg), (ins adasym:$addr,
+ def ADA_ENTRY : Alias<12, (outs ADDR64:$Reg), (ins adasym:$addr,
ADDR64:$ADA, imm64:$Offset),
[(set i64:$Reg, (z_ada_entry i64:$addr,
i64:$ADA, i64:$Offset))]>;
}
let mayLoad = 1, AddedComplexity = 20, hasNoSchedulingInfo = 1, Defs = [CC] in {
- def ADA_ENTRY_VALUE : Alias<12, (outs GR64:$Reg), (ins adasym:$addr,
+ def ADA_ENTRY_VALUE : Alias<12, (outs ADDR64:$Reg), (ins adasym:$addr,
ADDR64:$ADA, imm64:$Offset),
[(set i64:$Reg, (z_load (z_ada_entry
iPTR:$addr, iPTR:$ADA, i64:$Offset)))]>;
diff --git a/llvm/test/CodeGen/SystemZ/Large/large-ada-01.py b/llvm/test/CodeGen/SystemZ/Large/large-ada-01.py
new file mode 100644
index 0000000000000..abb17d4af5b1e
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/Large/large-ada-01.py
@@ -0,0 +1,30 @@
+# Test code generation for retrieving function descriptors
+# from the ADA when the ADA is extremely large and forces the
+# generation of a different instruction sequence
+# RUN: %python %s | llc -mtriple=s390x-ibm-zos -O2 | FileCheck %s
+
+# CHECK: llilf 1, {{[0-9]+}}
+# CHECK-NEXT: la 1, 0(1,8)
+
+from __future__ import print_function
+
+num_calls = 35000
+
+print("define hidden signext i32 @main() {")
+print("entry:")
+
+for i in range(num_calls):
+ print(" call void @foo%d()" % i)
+
+print(" call void @bar(ptr noundef @foo)")
+print("ret i32 0")
+print("}")
+
+for i in range(num_calls):
+ print("declare void @foo%d(...)" % i)
+
+print("declare void @bar(ptr noundef)")
+print("define internal void @foo() {")
+print("entry:")
+print(" ret void")
+print(" }")
diff --git a/llvm/test/CodeGen/SystemZ/Large/large-ada-02.py b/llvm/test/CodeGen/SystemZ/Large/large-ada-02.py
new file mode 100644
index 0000000000000..ca89cf684f6a8
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/Large/large-ada-02.py
@@ -0,0 +1,33 @@
+# Test code generation for retrieving function descriptors
+# from the ADA when the ADA is extremely large and forces the
+# generation of a different instruction sequence
+# RUN: %python %s | llc -mtriple=s390x-ibm-zos -O2 | FileCheck %s
+
+# CHECK: algfi 8, {{[0-9]+}}
+# CHECK: la 8, 0(8)
+
+from __future__ import print_function
+
+num_calls = 35000
+
+print("define hidden signext i32 @main() {")
+print("entry:")
+
+for i in range(num_calls):
+ print(" call void @foo%d()" % i)
+
+# This is added to force the use of register r8 to generate
+# la 8, 0(8) which generates the algfi instruction
+print("%0 = call ptr asm \" LGR $0,$1\0A\", \"=r,{r8}\"(ptr nonnull @foo)")
+print(" call void @bar(ptr noundef %0)")
+print("ret i32 0")
+print("}")
+
+for i in range(num_calls):
+ print("declare void @foo%d(...)" % i)
+
+print("declare void @bar(ptr noundef)")
+print("define internal void @foo() {")
+print("entry:")
+print(" ret void")
+print(" }")
>From 13f08783f5bf911ea212d04d4aba3f332a0ea414 Mon Sep 17 00:00:00 2001
From: Tony Tao <tonytao at ca.ibm.com>
Date: Wed, 31 Jul 2024 17:51:50 -0400
Subject: [PATCH 2/2] fix formatting
---
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 9d0fbd309786b..ed400e9eceb9c 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -346,9 +346,10 @@ void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
*OutStreamer,
MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp));
} else
- EmitToStreamer(
- *OutStreamer,
- MCInstBuilder(SystemZ::ALGFI).addReg(TargetReg).addReg(TargetReg).addImm(Disp));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::ALGFI)
+ .addReg(TargetReg)
+ .addReg(TargetReg)
+ .addImm(Disp));
Disp = 0;
Op = Op0;
}
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