[clang] [llvm] [RISCV] Add Syntacore SCR4 RV32/64 processors definition (PR #101321)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 1 02:14:04 PDT 2024
https://github.com/wangpc-pp approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/101321
More information about the llvm-commits
mailing list