[llvm] [SPARC][IAS] Add v8plus feature bit (PR #101367)
Sergei Barannikov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 10:47:57 PDT 2024
================
@@ -21,11 +21,16 @@ using namespace llvm;
namespace {
class SparcELFObjectWriter : public MCELFObjectTargetWriter {
public:
- SparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI)
+ SparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, bool HasV9, uint8_t OSABI)
: MCELFObjectTargetWriter(
Is64Bit, OSABI,
- Is64Bit ? ELF::EM_SPARCV9
- : (HasV9 ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
+ Is64Bit
+ ? ELF::EM_SPARCV9
+ // Note that we still need to emit an EM_SPARC32PLUS object
+ // even when V8+ isn't explicitly requested, if we're
+ // targeting a V9-capable CPU. This matches GAS behavior upon
+ // encountering any V9 instructions in its input.
+ : ((IsV8Plus || HasV9) ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
----------------
s-barannikov wrote:
Are you sure this is correct? Does sparc-gcc produce EM_SPARC32PLUS binary by default (taking into account that -mcpu=v9 is the default)?
I only have sparc64-gcc on hands.
https://github.com/llvm/llvm-project/pull/101367
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