[llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 12:15:45 PDT 2024
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@@ -1889,7 +1962,25 @@ bool NVPTXDAGToDAGISel::tryStore(SDNode *N) {
CurDAG->getDataLayout().getPointerSizeInBits(ST->getAddressSpace());
// Memory Semantic Setting
- unsigned int CodeMemorySem = getCodeMemorySemantic(ST, Subtarget);
+ auto [InstructionOrdering, FenceOrdering] =
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gonzalobg wrote:
Not fully sure what you mean. The code is in a function that returns a struct. This `auto [x, y] = value;` is just extracting the fields of the struct into separate variables.
I can also just do:
```cpp=
auto Orderings = getOperationOrdering(...);
auto InstructionOrdering = Orderings.InstructionOrdering;
auto FenceOrdering = Orderings.FenceOrdering;
```
?
https://github.com/llvm/llvm-project/pull/98551
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