[llvm] AMDGPU: Add some leaf intrinsics to isAlwaysUniform (PR #101925)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 4 23:35:56 PDT 2024
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/101925
These would always be uniform anyway, but it shouldn't hurt to
mark them as always uniform. This will help use TTI::isAlwaysUniform
in place of proper uniformity analysis in trivial situations.
>From e32536ee7f08cbb7665f115d95ff616b8bdfe3fb Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Mon, 5 Aug 2024 10:32:39 +0400
Subject: [PATCH] AMDGPU: Add some leaf intrinsics to isAlwaysUniform
These would always be uniform anyway, but it shouldn't hurt to
mark them as always uniform. This will help use TTI::isAlwaysUniform
in place of proper uniformity analysis in trivial situations.
---
.../Target/AMDGPU/AMDGPUSearchableTables.td | 4 +++
.../AMDGPU/always_uniform.ll | 33 +++++++++++++++++++
2 files changed, 37 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td b/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
index a323f63767737..98c93b1c6801f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
@@ -378,3 +378,7 @@ def : AlwaysUniform<int_amdgcn_icmp>;
def : AlwaysUniform<int_amdgcn_fcmp>;
def : AlwaysUniform<int_amdgcn_ballot>;
def : AlwaysUniform<int_amdgcn_if_break>;
+def : AlwaysUniform<int_amdgcn_s_getpc>;
+def : AlwaysUniform<int_amdgcn_s_getreg>;
+def : AlwaysUniform<int_amdgcn_s_memrealtime>;
+def : AlwaysUniform<int_amdgcn_s_memtime>;
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
index d7d8d29fbfd42..285bd04a93bbc 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
@@ -79,6 +79,39 @@ define void @no_divergent_args_if_inreg(i32 inreg %i32, i1 inreg %i1) {
ret void
}
+; CHECK-LABEL: for function 's_getpc':
+; CHECK: ALL VALUES UNIFORM
+define void @s_getpc(ptr addrspace(1) inreg %out) {
+ %result = call i64 @llvm.amdgcn.s.getpc()
+ store i64 %result, ptr addrspace(1) %out, align 8
+ ret void
+}
+
+; CHECK-LABEL: for function 's_getreg':
+; CHECK: ALL VALUES UNIFORM
+define void @s_getreg(ptr addrspace(1) inreg %out) {
+ %result = call i32 @llvm.amdgcn.s.getreg(i32 123)
+ store i32 %result, ptr addrspace(1) %out, align 4
+ ret void
+}
+
+; CHECK-LABEL: for function 's_memtime':
+; CHECK: ALL VALUES UNIFORM
+define void @s_memtime(ptr addrspace(1) inreg %out) {
+ %result = call i64 @llvm.amdgcn.s.memtime()
+ store i64 %result, ptr addrspace(1) %out, align 8
+ ret void
+}
+
+; CHECK-LABEL: for function 's_memrealtime':
+; CHECK: ALL VALUES UNIFORM
+define void @s_memrealtime(ptr addrspace(1) inreg %out) {
+ %result = call i64 @llvm.amdgcn.s.memrealtime()
+ store i64 %result, ptr addrspace(1) %out, align 8
+ ret void
+}
+
+
declare i32 @llvm.amdgcn.workitem.id.x() #0
declare i32 @llvm.amdgcn.readfirstlane(i32) #0
declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1
More information about the llvm-commits
mailing list