[llvm] [AArch64] Implement promotion type legalisation for histogram intrinsic (PR #101017)

[Graham Hunter via llvm-commits]

================
@@ -28018,9 +28021,17 @@ SDValue AArch64TargetLowering::LowerVECTOR_HISTOGRAM(SDValue Op,
   EVT IndexVT = Index.getValueType();
   EVT MemVT = EVT::getVectorVT(*DAG.getContext(), IncVT,
                                IndexVT.getVectorElementCount());
+  EVT IncExtVT = IndexVT.getVectorElementCount().getKnownMinValue() == 4
----------------
huntergr-arm wrote:

Since the context and element count are used more than once here, having locals for them would make it a little neater. Ctx and EC are typical names in this file.

```suggestion
  EVT IncExtVT = EVT::getIntegerVT(Ctx, AArch64::SVEBitsPerBlock / EC.getKnownMinValue());
```


https://github.com/llvm/llvm-project/pull/101017