[llvm] AMDGPU/GlobalISel: Partially move constant selection to patterns (PR #100786)
Joe Nash via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 29 11:13:45 PDT 2024
================
@@ -269,13 +276,14 @@ define double @v_rsq_clamp_f64_non_ieee(double %src) #2 {
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_rsq_f64_e32 v[0:1], v[0:1]
-; GFX12-NEXT: s_mov_b32 s0, -1
-; GFX12-NEXT: s_mov_b32 s1, 0x7fefffff
-; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-NEXT: s_mov_b32 s1, 0xffefffff
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-NEXT: v_mov_b32_e32 v2, -1
+; GFX12-NEXT: v_mov_b32_e32 v3, 0x7fefffff
+; GFX12-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
----------------
Sisyph wrote:
> I guess we also could make the VGPRImm predicate do a similar analysis that the DAG path does
If that fixes the issue I would be for it. Or perhaps it could be a fix to SIFoldOperands. If it's doing something different for 64 bit values or instructions? We should always be trying to save VGPRs.
https://github.com/llvm/llvm-project/pull/100786
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