[llvm] [AArch64] Fix incorrectly getting the destination reg of an insn (PR #101205)

[Eli Friedman via llvm-commits]

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@@ -1956,7 +1956,7 @@ maybeMoveCFI(MachineInstr &MI, MachineBasicBlock::iterator MaybeCFI) {
       MaybeCFI->getOpcode() != TargetOpcode::CFI_INSTRUCTION ||
       !(MI.getFlag(MachineInstr::FrameSetup) ||
         MI.getFlag(MachineInstr::FrameDestroy)) ||
-      AArch64InstrInfo::getLdStBaseOp(MI).getReg() != AArch64::SP)
+      MI.getOperand(0).getReg() != AArch64::SP)
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efriedma-quic wrote:

Oh, they're the same value because of the context; that's fine, then.  Some assert/documentation indicating that MI is an update instruction would be helpful.

https://github.com/llvm/llvm-project/pull/101205