[llvm] [SelectionDAG][RISCV] Operations with static rounding (PR #100999)

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git-clang-format --diff 19b785b7334d01354e8430634bab3c3341c671ca 38dadb6e81f3b9426cfb925ea3e44115c4676869 --extensions cpp,h -- llvm/include/llvm/CodeGen/ISDOpcodes.h llvm/include/llvm/CodeGen/TargetLowering.h llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index d3be39faca..3cb7e18209 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1943,7 +1943,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   case ISD::VP_SIGN_EXTEND: Res = PromoteIntOp_VP_SIGN_EXTEND(N); break;
   case ISD::VP_SINT_TO_FP:
   case ISD::SINT_TO_FP:   Res = PromoteIntOp_SINT_TO_FP(N); break;
-  case ISD::SINT_TO_FP_MODE: Res = PromoteIntOp_SINT_TO_FP_MODE(N); break;
+  case ISD::SINT_TO_FP_MODE:
+    Res = PromoteIntOp_SINT_TO_FP_MODE(N);
+    break;
   case ISD::STRICT_SINT_TO_FP: Res = PromoteIntOp_STRICT_SINT_TO_FP(N); break;
   case ISD::STORE:        Res = PromoteIntOp_STORE(cast<StoreSDNode>(N),
                                                    OpNo); break;
@@ -1964,7 +1966,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   case ISD::FP16_TO_FP:
   case ISD::VP_UINT_TO_FP:
   case ISD::UINT_TO_FP:   Res = PromoteIntOp_UINT_TO_FP(N); break;
-  case ISD::UINT_TO_FP_MODE: Res = PromoteIntOp_UINT_TO_FP_MODE(N); break;
+  case ISD::UINT_TO_FP_MODE:
+    Res = PromoteIntOp_UINT_TO_FP_MODE(N);
+    break;
   case ISD::STRICT_FP16_TO_FP:
   case ISD::STRICT_UINT_TO_FP:  Res = PromoteIntOp_STRICT_UINT_TO_FP(N); break;
   case ISD::ZERO_EXTEND:  Res = PromoteIntOp_ZERO_EXTEND(N); break;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 26de077171..f00275d73a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -8185,8 +8185,8 @@ void SelectionDAGBuilder::visitConstrainedFPIntrinsic(
       int MachineRM = TLI.getMachineRoundingMode(*RM);
       assert(MachineRM >= 0 && "Unsupported rounding mode");
       EVT RMType = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::i32);
-      Opers.push_back(DAG.getConstant(static_cast<uint64_t>(MachineRM), sdl,
-                                      RMType, true));
+      Opers.push_back(
+          DAG.getConstant(static_cast<uint64_t>(MachineRM), sdl, RMType, true));
       SDValue Result = DAG.getNode(Opcode, sdl, VT, Opers, Flags);
       setValue(&FPI, Result);
       return;

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https://github.com/llvm/llvm-project/pull/100999