[llvm] [llvm][CodeGen] Address the issue of multiple resource reservations in window scheduling (PR #100301)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `llvm-clang-x86_64-gcc-ubuntu` running on `sie-linux-worker3` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/174/builds/2746

Here is the relevant piece of the build log for the reference:
```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/Hexagon/swp-ws-resource-reserve.mir' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 2: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llc --march=hexagon /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir -run-pass=pipeliner -debug-only=pipeliner  -window-sched=force -filetype=null -verify-machineinstrs 2>&1  -window-search-ratio=100 -window-search-num=100 -window-diff-limit=1  | /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
+ /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llc --march=hexagon /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir -run-pass=pipeliner -debug-only=pipeliner -window-sched=force -filetype=null -verify-machineinstrs -window-search-ratio=100 -window-search-num=100 -window-diff-limit=1
+ /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir
/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir:9:15: error: CHECK-NEXT: is not on the line after the previous match
# CHECK-NEXT: Cycle [[CycleNum:[0-9]+]] [[[StageNum:S.[0-9]+]]]: {{%[0-9]+}}:hvxvr = V6_vaddw {{%[0-9]+}}:hvxvr, {{%[0-9]+}}:hvxvr
              ^
<stdin>:1003:2: note: 'next' match was here
 Cycle 0 [S.1]: %21:hvxvr = V6_vaddw %18:hvxvr, %19:hvxvr
 ^
<stdin>:1000:42: note: previous match ended here
Best window offset is 6 and Best II is 2.
                                         ^
<stdin>:1001:1: note: non-matching line after previous match is here
 Cycle 0 [S.0]: %13:intregs = PHI %1:intregs, %bb.1, %14:intregs, %bb.3
^

Input file: <stdin>
Check file: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/CodeGen/Hexagon/swp-ws-resource-reserve.mir

-dump-input=help explains the following input dump.

Input was:
<<<<<<
          1: SU(0): %17:hvxvr, %14:intregs = V6_vL32b_pi %13:intregs(tied-def 1), 128 :: (load (s1024) from %ir.lsr.iv1) 
          2:  # preds left : 0 
          3:  # succs left : 2 
          4:  # rdefs left : 0 
          5:  Latency : 1 
          6:  Depth : 0 
          7:  Height : 3 
          8:  Successors: 
          9:  SU(3): Data Latency=1 Reg=%17 
         10:  SU(2): Data Latency=1 Reg=%17 
         11:  SU(1): Data Latency=0 Reg=%17 
         12:  ExitSU: Data Latency=1 Reg=%14 
         13:  Pressure Diff : HvxVR -1 
         14:  Single Issue : false; 
         15: SU(1): %18:hvxvr = V6_vaddw %7:hvxvr, %17:hvxvr 
         16:  # preds left : 0 
         17:  # succs left : 0 
         18:  # rdefs left : 0 
         19:  Latency : 1 
         20:  Depth : 0 
         21:  Height : 2 
         22:  Predecessors: 
...

```

https://github.com/llvm/llvm-project/pull/100301