[llvm] [RISCV] Add back missing vmv_v_x_vl pattern predicates (PR #101455)

[Luke Lau via llvm-commits]

https://github.com/lukel97 created https://github.com/llvm/llvm-project/pull/101455

Looks like these got left behind in 17e2d07ad15e02c9c757fdd4a532c43747ed8bf3

I tried to create a test case by adding run lines for +zvl32x,+zvl128b in the existing splat tests but they crashed for a separate reason:

    WidenVectorResult #0: t8: nxv1i8 = llvm.riscv.vmv.v.x TargetConstant:i64<10683>, undef:nxv1i8, t5, t4

    LLVM ERROR: Do not know how to widen the result of this operator!


>From d83d1953a7d8cf91c82f16620fc7f63b94c8e7c6 Mon Sep 17 00:00:00 2001
From: Luke Lau <luke at igalia.com>
Date: Thu, 1 Aug 2024 14:14:12 +0800
Subject: [PATCH] [RISCV] Add back missing vmv_v_x_vl pattern predicates

Looks like these got left behind in 17e2d07ad15e02c9c757fdd4a532c43747ed8bf3

I tried to create a test case by adding run lines for +zvl32x,+zvl128b in the existing splat tests but they crashed for a separate reason:

    WidenVectorResult #0: t8: nxv1i8 = llvm.riscv.vmv.v.x TargetConstant:i64<10683>, undef:nxv1i8, t5, t4

    LLVM ERROR: Do not know how to widen the result of this operator!
---
 .../Target/RISCV/RISCVInstrInfoVVLPatterns.td  | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index 394da8040a13e..699536b186969 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -2369,14 +2369,16 @@ foreach vti = AllVectors in {
 }
 
 foreach vti = AllIntegerVectors in {
-    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, GPR:$rs2, VLOpFrag)),
-              (!cast<Instruction>("PseudoVMV_V_X_"#vti.LMul.MX)
-               vti.RegClass:$passthru, GPR:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
-    defvar ImmPat = !cast<ComplexPattern>("sew"#vti.SEW#"simm5");
-    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, (ImmPat simm5:$imm5),
-                                                VLOpFrag)),
-              (!cast<Instruction>("PseudoVMV_V_I_"#vti.LMul.MX)
-               vti.RegClass:$passthru, simm5:$imm5, GPR:$vl, vti.Log2SEW, TU_MU)>;
+  let Predicates = GetVTypePredicates<vti>.Predicates in {
+      def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, GPR:$rs2, VLOpFrag)),
+                (!cast<Instruction>("PseudoVMV_V_X_"#vti.LMul.MX)
+                 vti.RegClass:$passthru, GPR:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
+      defvar ImmPat = !cast<ComplexPattern>("sew"#vti.SEW#"simm5");
+      def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, (ImmPat simm5:$imm5),
+                                                  VLOpFrag)),
+                (!cast<Instruction>("PseudoVMV_V_I_"#vti.LMul.MX)
+                 vti.RegClass:$passthru, simm5:$imm5, GPR:$vl, vti.Log2SEW, TU_MU)>;
+    }
   }
 }