[llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)

[Jeffrey Byrnes via llvm-commits]

================
@@ -1040,6 +1096,37 @@ int GCNHazardRecognizer::checkInlineAsmHazards(MachineInstr *IA) {
     if (Op.isReg() && Op.isDef()) {
       WaitStatesNeeded =
           std::max(WaitStatesNeeded, checkVALUHazardsHelper(Op, MRI));
+
+      if (!TRI.isVectorRegister(MRI, Op.getReg()))
+        continue;
+
+      if (ST.hasDstSelForwardingHazard()) {
+        const int Shift16DefWaitstates = 1;
+
+        auto IsShift16BitDefFn = [this, &IA](const MachineInstr &MI) {
+          const MachineOperand *Dst = getDstSelForwardingOperand(MI, ST);
+          // Assume inline asm reads the dst
+          if (Dst)
+            return true;
+
+          if (MI.isInlineAsm()) {
----------------
jrbyrnes wrote:

IA is known to be inline asm -- MI is unknown, can be VALU with dst forwarding issue, inline asm, anything.. not sure if renaming is appropriate

https://github.com/llvm/llvm-project/pull/100276