[llvm] [LV] Support binary and unary operations with EVL-vectorization (PR #93854)

[Florian Hahn via llvm-commits]

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@@ -1405,11 +1407,16 @@ class VPInstruction : public VPRecipeWithIRFlags {
 class VPWidenRecipe : public VPRecipeWithIRFlags {
   unsigned Opcode;
 
+protected:
+  template <typename IterT>
+  VPWidenRecipe(unsigned VPDefOpcode, Instruction &I,
+                iterator_range<IterT> Operands)
+      : VPRecipeWithIRFlags(VPDefOpcode, Operands, I), Opcode(I.getOpcode()) {}
+
 public:
   template <typename IterT>
   VPWidenRecipe(Instruction &I, iterator_range<IterT> Operands)
-      : VPRecipeWithIRFlags(VPDef::VPWidenSC, Operands, I),
-        Opcode(I.getOpcode()) {}
+      : VPWidenRecipe(VPDef::VPWidenSC, I, Operands) {}
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fhahn wrote:

The main benefit from having a shared base-class is so analyses don't have to handle all recipes when it makes sense.

I think analyses that apply to VPWidenRecipe should also conservatively apply to WPWidenEVLRecipe, as the later only possibly operates on fewer values. If that's not sound, we probably shouldn't inherit from `VPWidenRecipe` without also implementing the corresponding `isa` relationship.

VPWidenLoad/VPWidenLoadEVL only share  `VPWidenMemoryRecipe` as common base-class, for which all VPWiden[Load|Store](EVL)? return true.

https://github.com/llvm/llvm-project/pull/93854