[llvm] [Hexagon] Do not optimize address of another function's block (PR #101209)
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Wed Jul 31 09:59:14 PDT 2024
https://github.com/yandalur updated https://github.com/llvm/llvm-project/pull/101209
>From 4126ee2b27b78e0e75526372ab3dff4bec88ca14 Mon Sep 17 00:00:00 2001
From: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: Tue, 30 Jul 2024 22:41:14 +0530
Subject: [PATCH 1/2] [Hexagon] Do not optimize extended address pointing to
another function's block
When the constant extender optimization pass encounters an instruction
that uses an extended address pointing to another function's block,
avoid adding the instruction to the extender list for the current
machine function.
---
.../Target/Hexagon/HexagonConstExtenders.cpp | 4 +
.../CodeGen/Hexagon/cext-opt-block-addr.mir | 173 ++++++++++++++++++
2 files changed, 177 insertions(+)
create mode 100644 llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
diff --git a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
index f0933765bbcbd..86ce6b4e05ed2 100644
--- a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
@@ -1223,6 +1223,10 @@ void HCE::recordExtender(MachineInstr &MI, unsigned OpNum) {
if (ER.Kind == MachineOperand::MO_GlobalAddress)
if (ER.V.GV->getName().empty())
return;
+ // Ignore block address that points to block in another function
+ if (ER.Kind == MachineOperand::MO_BlockAddress)
+ if (ER.V.BA->getFunction() != &(MI.getMF()->getFunction()))
+ return;
Extenders.push_back(ED);
}
diff --git a/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir b/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
new file mode 100644
index 0000000000000..9f140132dcd6c
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
@@ -0,0 +1,173 @@
+# REQUIRES: asserts
+# RUN: llc -march=hexagon -run-pass hexagon-cext-opt %s -o - | FileCheck %s
+
+# Check that the HexagonConstantExtenders pass does not assert when block
+# addresses from different functions are used
+# CHECK-LABEL: name: wibble
+# CHECK: A2_tfrsi blockaddress(@baz
+# CHECK: A2_tfrsi blockaddress(@wibble
+
+--- |
+ target triple = "hexagon"
+
+ define dso_local void @baz() {
+ bb:
+ br label %bb1
+
+ bb1: ; preds = %bb
+ %call = tail call fastcc i32 @wibble(i32 poison)
+ ret void
+ }
+
+ define internal fastcc i32 @wibble(i32 %arg) {
+ bb:
+ %call = tail call i32 @eggs(i32 noundef ptrtoint (ptr blockaddress(@baz, %bb1) to i32))
+ br label %bb1
+
+ bb1: ; preds = %bb
+ tail call void @baz.1(i32 noundef ptrtoint (ptr blockaddress(@wibble, %bb1) to i32))
+ ret i32 %call
+ }
+
+ declare i32 @eggs(i32 noundef) local_unnamed_addr
+
+ declare void @baz.1(i32 noundef) local_unnamed_addr
+
+...
+---
+name: baz
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+isOutlined: false
+debugInstrRef: false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: intregs, preferred-register: '' }
+liveins: []
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: true
+ isCalleeSavedInfoValid: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+entry_values: []
+callSites: []
+debugValueSubstitutions: []
+constants: []
+machineFunctionInfo: {}
+body: |
+ bb.0.bb:
+ successors: %bb.1(0x80000000)
+
+ bb.1.bb1 (ir-block-address-taken %ir-block.bb1):
+ %0:intregs = IMPLICIT_DEF
+ $r0 = COPY %0
+ PS_tailcall_i @wibble, hexagoncsr, implicit $r0
+
+...
+---
+name: wibble
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+isOutlined: false
+debugInstrRef: false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: intregs, preferred-register: '' }
+ - { id: 1, class: intregs, preferred-register: '' }
+ - { id: 2, class: intregs, preferred-register: '' }
+ - { id: 3, class: intregs, preferred-register: '' }
+ - { id: 4, class: intregs, preferred-register: '' }
+liveins: []
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: true
+ hasCalls: true
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ isCalleeSavedInfoValid: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+entry_values: []
+callSites: []
+debugValueSubstitutions: []
+constants: []
+machineFunctionInfo: {}
+body: |
+ bb.0.bb:
+ successors: %bb.1(0x80000000)
+
+ %2:intregs = A2_tfrsi blockaddress(@baz, %ir-block.bb1)
+ ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29
+ $r0 = COPY %2
+ J2_call @eggs, hexagoncsr, implicit-def dead $pc, implicit-def dead $r31, implicit $r29, implicit $r0, implicit-def $r29, implicit-def $r0
+ ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29
+ %3:intregs = COPY $r0
+
+ bb.1.bb1 (ir-block-address-taken %ir-block.bb1):
+ %4:intregs = A2_tfrsi blockaddress(@wibble, %ir-block.bb1)
+ ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29
+ $r0 = COPY %4
+ J2_call @baz.1, hexagoncsr, implicit-def dead $pc, implicit-def dead $r31, implicit $r29, implicit $r0, implicit-def $r29
+ ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29
+ $r0 = COPY %3
+ PS_jmpret $r31, implicit-def dead $pc, implicit $r0
+
+...
>From ed6fedab9938eb95eb5eda73498703e59069e85d Mon Sep 17 00:00:00 2001
From: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: Wed, 31 Jul 2024 22:28:30 +0530
Subject: [PATCH 2/2] Retrigger checks
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