[llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)

[Manish Kausik H via llvm-commits]

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@@ -1496,11 +1500,12 @@ SDValue SelectionDAGLegalize::ExpandInsertToVectorThroughStack(SDValue Op) {
     Ch = DAG.getTruncStore(
         Ch, dl, Part, SubStackPtr,
         MachinePointerInfo::getUnknownStack(DAG.getMachineFunction()),
-        VecVT.getVectorElementType());
+        VecVT.getVectorElementType(), ElementAlignment);
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Nirhar wrote:

I have added the assert when PartVT is not a vector. If I have to add the same assert when PartVT is a vector, should I compare the alignment of the StoreSDNode with the alignment of the PartVT or with the alignment of an element of the vector?
Also, I hope I am calculating the element alignment correctly. Please let me know if I am not doing so.

https://github.com/llvm/llvm-project/pull/82130