[llvm] [NVPTX] Add Volta Atomic SequentiallyConsistent Load and Store Operations (PR #98551)
Artem Belevich via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 1 11:45:45 PDT 2024
================
@@ -106,15 +106,49 @@ enum LoadStore {
isStoreShift = 6
};
-namespace PTXLdStInstCode {
-enum MemorySemantic {
+// Extends LLVM AtomicOrdering with PTX Orderings:
+using OrderingUnderlyingType = unsigned int;
+enum class Ordering : OrderingUnderlyingType {
NotAtomic = 0, // PTX calls these: "Weak"
- Volatile = 1,
+ // Unordered = 1, // NVPTX maps LLVM Unorderd to Relaxed
Relaxed = 2,
- Acquire = 3,
- Release = 4,
- RelaxedMMIO = 5
+ // Consume = 3, // Unimplemented in LLVM; NVPTX would map to "Acquire"
+ Acquire = 4,
----------------
Artem-B wrote:
OK. The only problem is that hardcoded numbers may eventually deviate from the values used by `AtomicOrdering`.
Perhaps instead of the literal values, we should use `AtomicOrdering` enum values, possibly with a set of static asserts ensuring that the values in this enum are strictly ordered, if we rely on that.
https://github.com/llvm/llvm-project/pull/98551
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