[llvm] [AMDGPU] Inplace FI elimination during PEI for scalar copy instruction (PR #99556)

[Matt Arsenault via llvm-commits]

================
@@ -2568,17 +2568,20 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
                 } else
                   Add.addImm(Offset).addReg(TmpResultReg, RegState::Kill);
               } else {
-                // We have to produce a carry out, and there isn't a free SGPR
-                // pair for it. This a way around to avoid carry.
-                BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_MOV_B32), ResultReg)
+                BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32),
----------------
arsenm wrote:

When you do this reassociation, you need to multiply the offset by the wavesize. You're doing the mul + add in terms of waves 

https://github.com/llvm/llvm-project/pull/99556