[llvm] [RISCV] Select (and (srl x, c2), c1) as (srli (srai x, c2-c3)). (PR #101868)

[Yingwei Zheng via llvm-commits]

https://github.com/dtcxzyw approved this pull request.

LGTM.

Please add the following regression test (extracted from quickjs): https://godbolt.org/z/n4GsEPh4d
```
define i64 @func000000000000000a(i32 signext %0, i32 signext %1) nounwind {
entry:
  %3 = add i32 %0, %1
  %4 = icmp sgt i32 %3, -1
  %5 = select i1 %4, i64 0, i64 7
  ret i64 %5
}
```
Before:
```
func000000000000000a:                   # @func000000000000000a
        add     a0, a0, a1
        sraiw   a0, a0, 31
        andi    a0, a0, 7
        ret
```
After:
```
func000000000000000a:                   # @func000000000000000a
        add     a0, a0, a1
        slli    a0, a0, 32
        srai    a0, a0, 2
        srli    a0, a0, 61
        ret
```

I wouldn't like to block this patch since the net effect looks good. We can fix this minor regression to avoid stacking too many patches :)


https://github.com/llvm/llvm-project/pull/101868