[llvm] [RISCV] Use zext.[b/w/h] instead of th.extu for bitfieldn extraction (PR #101605)

[Philipp Tomsich via llvm-commits]

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@@ -1228,6 +1228,10 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       if (!Subtarget->hasVendorXTHeadBb())
         return false;
 
+      if ((Subtarget->hasStdExtZba() || Subtarget->hasStdExtZbb()) &&
+          (Msb == 7 || Msb == 15 || Msb == 31) && Lsb == 0)
+        return false;
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ptomsich wrote:

This, of course, assumes that Zba/Zbb instructions have the same or lower cost than XTheadBB instructions, if implemented on the same core.

https://github.com/llvm/llvm-project/pull/101605