[llvm] [DAGCombine] Fold `ctlz_zero_undef(X << C) -> ctlz_zero_undef(X) - C` (PR #100932)

Yingwei Zheng via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 29 10:32:44 PDT 2024


================
@@ -11133,6 +11133,18 @@ SDValue DAGCombiner::visitCTLZ_ZERO_UNDEF(SDNode *N) {
   if (SDValue C =
           DAG.FoldConstantArithmetic(ISD::CTLZ_ZERO_UNDEF, DL, VT, {N0}))
     return C;
+
+  // Fold ctlz_zero_undef(X << C) --> ctlz_zero_undef(X) - C
+  SDValue A;
+  APInt C;
+  if (sd_match(N0, m_Shl(m_Value(A), m_ConstInt(C))) &&
----------------
dtcxzyw wrote:

IIRC DAGCombine doesn't infer poison-generating flags for new SDNodes.
```
Optimized lowered selection DAG: %bb.0 'count_activebits:entry'
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
              t2: i64,ch = CopyFromReg t0, Register:i64 %0
            t3: i16 = truncate t2
          t5: i16 = and t3, Constant:i16<255>
        t6: i16 = ctlz_zero_undef t5
      t8: i16 = sub nuw nsw Constant:i16<16>, t6
    t9: i64 = any_extend t8
  t11: ch,glue = CopyToReg t0, Register:i64 $x10, t9
  t12: ch = RISCVISD::RET_GLUE t11, Register:i64 $x10, t11:1
```
```
Type-legalized selection DAG: %bb.0 'count_activebits:entry'
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
            t2: i64,ch = CopyFromReg t0, Register:i64 %0
          t15: i64 = and t2, Constant:i64<255>
        t17: i64 = shl t15, Constant:i64<48>
      t18: i64 = ctlz_zero_undef t17
    t19: i64 = sub Constant:i64<16>, t18
  t11: ch,glue = CopyToReg t0, Register:i64 $x10, t19
  t12: ch = RISCVISD::RET_GLUE t11, Register:i64 $x10, t11:1
```
```
Optimized type-legalized selection DAG: %bb.0 'count_activebits:entry'
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
            t2: i64,ch = CopyFromReg t0, Register:i64 %0
          t15: i64 = and t2, Constant:i64<255>
        t17: i64 = shl t15, Constant:i64<48>
      t18: i64 = ctlz_zero_undef t17
    t19: i64 = sub Constant:i64<16>, t18
  t11: ch,glue = CopyToReg t0, Register:i64 $x10, t19
  t12: ch = RISCVISD::RET_GLUE t11, Register:i64 $x10, t11:1

```

https://github.com/llvm/llvm-project/pull/100932


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