[llvm] 0dd1128 - [DAG] Add SDPatternMatch::m_VSelect (#100758)

[via llvm-commits]

Author: Michael Maitland
Date: 2024-07-29T13:19:43-04:00
New Revision: 0dd1128d6341283d60150d294a9c4db1ba38f8b2

URL: https://github.com/llvm/llvm-project/commit/0dd1128d6341283d60150d294a9c4db1ba38f8b2
DIFF: https://github.com/llvm/llvm-project/commit/0dd1128d6341283d60150d294a9c4db1ba38f8b2.diff

LOG: [DAG] Add SDPatternMatch::m_VSelect (#100758)

As per the comment in
https://github.com/llvm/llvm-project/pull/100686#pullrequestreview-2201991135

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/SDPatternMatch.h
    llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/SDPatternMatch.h b/llvm/include/llvm/CodeGen/SDPatternMatch.h
index 6ac1aaa01d912..ad1c5415055c2 100644
--- a/llvm/include/llvm/CodeGen/SDPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/SDPatternMatch.h
@@ -496,6 +496,12 @@ m_Select(const T0_P &Cond, const T1_P &T, const T2_P &F) {
   return TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::SELECT, Cond, T, F);
 }
 
+template <typename T0_P, typename T1_P, typename T2_P>
+inline TernaryOpc_match<T0_P, T1_P, T2_P>
+m_VSelect(const T0_P &Cond, const T1_P &T, const T2_P &F) {
+  return TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::VSELECT, Cond, T, F);
+}
+
 // === Binary operations ===
 template <typename LHS_P, typename RHS_P, bool Commutable = false,
           bool ExcludeChain = false>

diff  --git a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
index 2fa8fbb523784..074247e6e7d18 100644
--- a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
@@ -137,6 +137,11 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
   SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT);
   SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F);
 
+  auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
+  SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 6, VInt32VT);
+  SDValue V2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 7, VInt32VT);
+  SDValue VSelect = DAG->getNode(ISD::VSELECT, DL, VInt32VT, Cond, V1, V2);
+
   using namespace SDPatternMatch;
   ISD::CondCode CC;
   EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(),
@@ -166,6 +171,10 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
       Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T))));
   EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1),
                                             m_SpecificCondCode(ISD::SETEQ))));
+  EXPECT_TRUE(sd_match(
+      VSelect, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
+  EXPECT_FALSE(sd_match(
+      Select, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
 }
 
 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) {