[llvm] [NFC][Load] Find better place for `mustSuppressSpeculation` (PR #100794)
Vitaly Buka via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 29 10:28:34 PDT 2024
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/100794
>From dd4531e7e87934589f223e470d133bf1b9cf1a6c Mon Sep 17 00:00:00 2001
From: Vitaly Buka <vitalybuka at google.com>
Date: Fri, 26 Jul 2024 16:42:06 -0700
Subject: [PATCH 1/3] [NFC][InstCombine][SROA][Asan] Precommit test affected by
#100773
Some optimization need to be undone with
sanitizers by #100773.
Pull Request: https://github.com/llvm/llvm-project/pull/100844
---
llvm/test/Transforms/InstCombine/load.ll | 10 +++++
.../multiple-uses-load-bitcast-select.ll | 24 ++++++++++
.../InstCombine/ptr-replace-alloca.ll | 15 +++++++
llvm/test/Transforms/InstCombine/strnlen-2.ll | 10 +++++
llvm/test/Transforms/SROA/phi-and-select.ll | 21 +++++++++
.../SROA/phi-with-duplicate-pred.ll | 45 +++++++++++++++++++
llvm/test/Transforms/SROA/select-load.ll | 24 +++++++++-
7 files changed, 148 insertions(+), 1 deletion(-)
diff --git a/llvm/test/Transforms/InstCombine/load.ll b/llvm/test/Transforms/InstCombine/load.ll
index 7d53c8ee35684..032f9098e1093 100644
--- a/llvm/test/Transforms/InstCombine/load.ll
+++ b/llvm/test/Transforms/InstCombine/load.ll
@@ -56,6 +56,16 @@ define i32 @test5(i1 %C) {
ret i32 %Z
}
+define i32 @test5_asan(i1 %C) sanitize_address {
+; CHECK-LABEL: @test5_asan(
+; CHECK-NEXT: [[Z:%.*]] = select i1 [[C:%.*]], i32 42, i32 47
+; CHECK-NEXT: ret i32 [[Z]]
+;
+ %Y = select i1 %C, ptr @X, ptr @X2 ; <ptr> [#uses=1]
+ %Z = load i32, ptr %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
define i32 @load_gep_null_inbounds(i64 %X) {
; CHECK-LABEL: @load_gep_null_inbounds(
; CHECK-NEXT: store i1 true, ptr poison, align 1
diff --git a/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll b/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
index b2440bfb07b15..38fca0314ae11 100644
--- a/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
+++ b/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
@@ -25,3 +25,27 @@ define void @PR35618(ptr %st1, ptr %st2) {
ret void
}
+define void @PR35618_asan(ptr %st1, ptr %st2) sanitize_address {
+; CHECK-LABEL: @PR35618_asan(
+; CHECK-NEXT: [[Y1:%.*]] = alloca double, align 8
+; CHECK-NEXT: [[Z1:%.*]] = alloca double, align 8
+; CHECK-NEXT: [[LD1:%.*]] = load double, ptr [[Y1]], align 8
+; CHECK-NEXT: [[LD2:%.*]] = load double, ptr [[Z1]], align 8
+; CHECK-NEXT: [[TMP:%.*]] = fcmp olt double [[LD1]], [[LD2]]
+; CHECK-NEXT: [[TMP12_V:%.*]] = select i1 [[TMP]], double [[LD1]], double [[LD2]]
+; CHECK-NEXT: store double [[TMP12_V]], ptr [[ST1:%.*]], align 8
+; CHECK-NEXT: store double [[TMP12_V]], ptr [[ST2:%.*]], align 8
+; CHECK-NEXT: ret void
+;
+ %y1 = alloca double
+ %z1 = alloca double
+ %ld1 = load double, ptr %y1
+ %ld2 = load double, ptr %z1
+ %tmp = fcmp olt double %ld1, %ld2
+ %sel = select i1 %tmp, ptr %y1, ptr %z1
+ %tmp12 = load i64, ptr %sel
+ store i64 %tmp12, ptr %st1
+ store i64 %tmp12, ptr %st2
+ ret void
+}
+
diff --git a/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll b/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
index 7c65a93a00436..00f8f50cb4f02 100644
--- a/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
+++ b/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
@@ -427,6 +427,21 @@ entry:
ret i8 %load
}
+define i8 @select_diff_addrspace_remove_alloca_asan(i1 %cond, ptr %p) sanitize_address {
+; CHECK-LABEL: @select_diff_addrspace_remove_alloca_asan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i8 0
+;
+entry:
+ %alloca = alloca [32 x i8]
+ call void @llvm.memcpy.p0.p1.i64(ptr %alloca, ptr addrspace(1) @g2, i64 32, i1 false)
+ %gep = getelementptr inbounds [32 x i8], ptr %alloca, i32 0, i32 2
+ %sel = select i1 %cond, ptr %alloca, ptr %gep
+ %gep2 = getelementptr inbounds i8, ptr %sel, i64 4
+ %load = load i8, ptr %gep2
+ ret i8 %load
+}
+
declare i8 @readonly_callee(ptr readonly nocapture)
; FIXME: This should be able to fold to call i8 @readonly_callee(ptr nonnull @g1)
diff --git a/llvm/test/Transforms/InstCombine/strnlen-2.ll b/llvm/test/Transforms/InstCombine/strnlen-2.ll
index 5e95aaf8edcd9..36da6df20528c 100644
--- a/llvm/test/Transforms/InstCombine/strnlen-2.ll
+++ b/llvm/test/Transforms/InstCombine/strnlen-2.ll
@@ -38,6 +38,16 @@ define i64 @fold_strnlen_s3_s5_1(i1 %C) {
ret i64 %len
}
+define i64 @fold_strnlen_s3_s5_1_asan(i1 %C) sanitize_address {
+; CHECK-LABEL: @fold_strnlen_s3_s5_1_asan(
+; CHECK-NEXT: ret i64 1
+;
+ %ptr = select i1 %C, ptr @s3, ptr @s6
+
+ %len = call i64 @strnlen(ptr %ptr, i64 1)
+ ret i64 %len
+}
+
; Fold strnlen (C ? s3 : s5, 3) to 3.
diff --git a/llvm/test/Transforms/SROA/phi-and-select.ll b/llvm/test/Transforms/SROA/phi-and-select.ll
index 7c8b27c9de9c0..d237b437b9ce0 100644
--- a/llvm/test/Transforms/SROA/phi-and-select.ll
+++ b/llvm/test/Transforms/SROA/phi-and-select.ll
@@ -344,6 +344,27 @@ entry:
ret i32 %loaded
}
+; We should not unconditionally load with sanitizers.
+define i32 @test9_asan(i32 %b, ptr %ptr) sanitize_address {
+; Same as @test8 but for a select rather than a PHI node.
+;
+; CHECK-LABEL: @test9_asan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: [[LOADED_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i32, ptr [[PTR]], align 4
+; CHECK-NEXT: [[LOADED_SROA_SPECULATED:%.*]] = select i1 [[TEST]], i32 undef, i32 [[LOADED_SROA_SPECULATE_LOAD_FALSE]]
+; CHECK-NEXT: ret i32 [[LOADED_SROA_SPECULATED]]
+;
+entry:
+ %f = alloca float
+ store i32 0, ptr %ptr
+ %test = icmp ne i32 %b, 0
+ %select = select i1 %test, ptr %f, ptr %ptr
+ %loaded = load i32, ptr %select, align 4
+ ret i32 %loaded
+}
+
define float @test10(i32 %b, ptr %ptr) {
; Don't try to promote allocas which are not elligible for it even after
; rewriting due to the necessity of inserting bitcasts when speculating a PHI
diff --git a/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll b/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
index 96262b44f58e0..38ee760c82527 100644
--- a/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
+++ b/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
@@ -52,6 +52,51 @@ cleanup7: ; preds = %cleanup
ret void
}
+define void @f2_hwasan(i1 %c1) sanitize_hwaddress {
+; CHECK-LABEL: @f2_hwasan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[CLEANUP:%.*]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[G_0_SROA_SPECULATE_LOAD_CLEANUP:%.*]] = load i16, ptr @a, align 1
+; CHECK-NEXT: switch i32 2, label [[CLEANUP7:%.*]] [
+; CHECK-NEXT: i32 0, label [[LBL1:%.*]]
+; CHECK-NEXT: i32 2, label [[LBL1]]
+; CHECK-NEXT: ]
+; CHECK: if.else:
+; CHECK-NEXT: br label [[LBL1]]
+; CHECK: lbl1:
+; CHECK-NEXT: [[G_0_SROA_SPECULATED:%.*]] = phi i16 [ [[G_0_SROA_SPECULATE_LOAD_CLEANUP]], [[CLEANUP]] ], [ [[G_0_SROA_SPECULATE_LOAD_CLEANUP]], [[CLEANUP]] ], [ undef, [[IF_ELSE]] ]
+; CHECK-NEXT: unreachable
+; CHECK: cleanup7:
+; CHECK-NEXT: ret void
+;
+entry:
+ %e = alloca i16, align 1
+ br i1 %c1, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ br label %cleanup
+
+cleanup: ; preds = %if.then
+ switch i32 2, label %cleanup7 [
+ i32 0, label %lbl1
+ i32 2, label %lbl1
+ ]
+
+if.else: ; preds = %entry
+ br label %lbl1
+
+lbl1: ; preds = %if.else, %cleanup, %cleanup
+ %g.0 = phi ptr [ @a, %cleanup ], [ @a, %cleanup ], [ %e, %if.else ]
+ %0 = load i16, ptr %g.0, align 1
+ unreachable
+
+cleanup7: ; preds = %cleanup
+ ret void
+}
+
define void @f3(i1 %c1) {
; CHECK-LABEL: @f3(
; CHECK-NEXT: entry:
diff --git a/llvm/test/Transforms/SROA/select-load.ll b/llvm/test/Transforms/SROA/select-load.ll
index 7df72419b0ce5..0ebc8d71b83f6 100644
--- a/llvm/test/Transforms/SROA/select-load.ll
+++ b/llvm/test/Transforms/SROA/select-load.ll
@@ -36,7 +36,7 @@ entry:
%st.args = type { i32, ptr }
; A bitcasted load and a direct load of select.
-define void @test_multiple_loads_select(i1 %cmp){
+define void @test_multiple_loads_select(i1 %cmp) {
; CHECK-LABEL: @test_multiple_loads_select(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADDR_I8_SROA_SPECULATED:%.*]] = select i1 [[CMP:%.*]], ptr undef, ptr undef
@@ -57,6 +57,28 @@ entry:
ret void
}
+; Sanitizer will break optimization.
+define void @test_multiple_loads_select_asan(i1 %cmp) sanitize_address {
+; CHECK-LABEL: @test_multiple_loads_select_asan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ADDR_I8_SROA_SPECULATED:%.*]] = select i1 [[CMP:%.*]], ptr undef, ptr undef
+; CHECK-NEXT: call void @foo_i8(ptr [[ADDR_I8_SROA_SPECULATED]])
+; CHECK-NEXT: [[ADDR_I32_SROA_SPECULATED:%.*]] = select i1 [[CMP]], ptr undef, ptr undef
+; CHECK-NEXT: call void @foo_i32(ptr [[ADDR_I32_SROA_SPECULATED]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %args = alloca [2 x %st.args], align 16
+ %arr1 = getelementptr inbounds [2 x %st.args], ptr %args, i64 0, i64 1
+ %sel = select i1 %cmp, ptr %arr1, ptr %args
+ %addr = getelementptr inbounds %st.args, ptr %sel, i64 0, i32 1
+ %addr.i8 = load ptr, ptr %addr, align 8
+ call void @foo_i8(ptr %addr.i8)
+ %addr.i32 = load ptr, ptr %addr, align 8
+ call void @foo_i32 (ptr %addr.i32)
+ ret void
+}
+
declare void @foo_i8(ptr)
declare void @foo_i32(ptr)
>From a33fda5a7ffc8a032fc12c44cc23e94ff141cf76 Mon Sep 17 00:00:00 2001
From: Vitaly Buka <vitalybuka at google.com>
Date: Fri, 26 Jul 2024 11:18:44 -0700
Subject: [PATCH 2/3] [NFC][Load] Find better place for
`mustSuppressSpeculation`
And extract `suppressSpeculativeLoadForSanitizers`.
Pull Request: https://github.com/llvm/llvm-project/pull/100794
---
llvm/include/llvm/Analysis/Loads.h | 7 +++++++
llvm/include/llvm/Analysis/ValueTracking.h | 7 -------
llvm/lib/Analysis/Loads.cpp | 13 +++++++++++++
llvm/lib/Analysis/ValueTracking.cpp | 11 -----------
4 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/llvm/include/llvm/Analysis/Loads.h b/llvm/include/llvm/Analysis/Loads.h
index 33e817828b754..38f86f77b4158 100644
--- a/llvm/include/llvm/Analysis/Loads.h
+++ b/llvm/include/llvm/Analysis/Loads.h
@@ -106,6 +106,13 @@ bool isSafeToLoadUnconditionally(Value *V, Type *Ty, Align Alignment,
const DominatorTree *DT = nullptr,
const TargetLibraryInfo *TLI = nullptr);
+/// Return true if speculation of the given load must be suppressed to avoid
+/// ordering or interfering with an active sanitizer. If not suppressed,
+/// dereferenceability and alignment must be proven separately. Note: This
+/// is only needed for raw reasoning; if you use the interface below
+/// (isSafeToSpeculativelyExecute), this is handled internally.
+bool mustSuppressSpeculation(const LoadInst &LI);
+
/// The default number of maximum instructions to scan in the block, used by
/// FindAvailableLoadedValue().
extern cl::opt<unsigned> DefMaxInstsToScan;
diff --git a/llvm/include/llvm/Analysis/ValueTracking.h b/llvm/include/llvm/Analysis/ValueTracking.h
index 5ef6e43483906..96fa16970584d 100644
--- a/llvm/include/llvm/Analysis/ValueTracking.h
+++ b/llvm/include/llvm/Analysis/ValueTracking.h
@@ -792,13 +792,6 @@ bool onlyUsedByLifetimeMarkers(const Value *V);
/// droppable instructions.
bool onlyUsedByLifetimeMarkersOrDroppableInsts(const Value *V);
-/// Return true if speculation of the given load must be suppressed to avoid
-/// ordering or interfering with an active sanitizer. If not suppressed,
-/// dereferenceability and alignment must be proven separately. Note: This
-/// is only needed for raw reasoning; if you use the interface below
-/// (isSafeToSpeculativelyExecute), this is handled internally.
-bool mustSuppressSpeculation(const LoadInst &LI);
-
/// Return true if the instruction does not have any effects besides
/// calculating the result and does not have undefined behavior.
///
diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp
index 61c6aa5e5a3eb..1704f0db4c599 100644
--- a/llvm/lib/Analysis/Loads.cpp
+++ b/llvm/lib/Analysis/Loads.cpp
@@ -345,6 +345,19 @@ bool llvm::isDereferenceableAndAlignedInLoop(LoadInst *LI, Loop *L,
HeaderFirstNonPHI, AC, &DT);
}
+static bool suppressSpeculativeLoadForSanitizers(const Instruction &CtxI) {
+ const Function &F = *CtxI.getFunction();
+ // Speculative load may create a race that did not exist in the source.
+ return F.hasFnAttribute(Attribute::SanitizeThread) ||
+ // Speculative load may load data from dirty regions.
+ F.hasFnAttribute(Attribute::SanitizeAddress) ||
+ F.hasFnAttribute(Attribute::SanitizeHWAddress);
+}
+
+bool llvm::mustSuppressSpeculation(const LoadInst &LI) {
+ return !LI.isUnordered() || suppressSpeculativeLoadForSanitizers(LI);
+}
+
/// Check if executing a load of this pointer value cannot trap.
///
/// If DT and ScanFrom are specified this method performs context-sensitive
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index bfd26fadd237b..497f6eafd22d8 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6798,17 +6798,6 @@ bool llvm::onlyUsedByLifetimeMarkersOrDroppableInsts(const Value *V) {
V, /* AllowLifetime */ true, /* AllowDroppable */ true);
}
-bool llvm::mustSuppressSpeculation(const LoadInst &LI) {
- if (!LI.isUnordered())
- return true;
- const Function &F = *LI.getFunction();
- // Speculative load may create a race that did not exist in the source.
- return F.hasFnAttribute(Attribute::SanitizeThread) ||
- // Speculative load may load data from dirty regions.
- F.hasFnAttribute(Attribute::SanitizeAddress) ||
- F.hasFnAttribute(Attribute::SanitizeHWAddress);
-}
-
bool llvm::isSafeToSpeculativelyExecute(const Instruction *Inst,
const Instruction *CtxI,
AssumptionCache *AC,
>From 412c37a75b2613337dbd05d6cbf81b44641623df Mon Sep 17 00:00:00 2001
From: Vitaly Buka <vitalybuka at google.com>
Date: Mon, 29 Jul 2024 10:28:19 -0700
Subject: [PATCH 3/3] rebase
Created using spr 1.3.4
---
llvm/test/Transforms/InstCombine/load.ll | 10 -----
.../multiple-uses-load-bitcast-select.ll | 24 ----------
.../InstCombine/ptr-replace-alloca.ll | 15 -------
llvm/test/Transforms/InstCombine/strnlen-2.ll | 10 -----
llvm/test/Transforms/SROA/phi-and-select.ll | 21 ---------
.../SROA/phi-with-duplicate-pred.ll | 45 -------------------
llvm/test/Transforms/SROA/select-load.ll | 24 +---------
7 files changed, 1 insertion(+), 148 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/load.ll b/llvm/test/Transforms/InstCombine/load.ll
index 032f9098e1093..7d53c8ee35684 100644
--- a/llvm/test/Transforms/InstCombine/load.ll
+++ b/llvm/test/Transforms/InstCombine/load.ll
@@ -56,16 +56,6 @@ define i32 @test5(i1 %C) {
ret i32 %Z
}
-define i32 @test5_asan(i1 %C) sanitize_address {
-; CHECK-LABEL: @test5_asan(
-; CHECK-NEXT: [[Z:%.*]] = select i1 [[C:%.*]], i32 42, i32 47
-; CHECK-NEXT: ret i32 [[Z]]
-;
- %Y = select i1 %C, ptr @X, ptr @X2 ; <ptr> [#uses=1]
- %Z = load i32, ptr %Y ; <i32> [#uses=1]
- ret i32 %Z
-}
-
define i32 @load_gep_null_inbounds(i64 %X) {
; CHECK-LABEL: @load_gep_null_inbounds(
; CHECK-NEXT: store i1 true, ptr poison, align 1
diff --git a/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll b/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
index 38fca0314ae11..b2440bfb07b15 100644
--- a/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
+++ b/llvm/test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll
@@ -25,27 +25,3 @@ define void @PR35618(ptr %st1, ptr %st2) {
ret void
}
-define void @PR35618_asan(ptr %st1, ptr %st2) sanitize_address {
-; CHECK-LABEL: @PR35618_asan(
-; CHECK-NEXT: [[Y1:%.*]] = alloca double, align 8
-; CHECK-NEXT: [[Z1:%.*]] = alloca double, align 8
-; CHECK-NEXT: [[LD1:%.*]] = load double, ptr [[Y1]], align 8
-; CHECK-NEXT: [[LD2:%.*]] = load double, ptr [[Z1]], align 8
-; CHECK-NEXT: [[TMP:%.*]] = fcmp olt double [[LD1]], [[LD2]]
-; CHECK-NEXT: [[TMP12_V:%.*]] = select i1 [[TMP]], double [[LD1]], double [[LD2]]
-; CHECK-NEXT: store double [[TMP12_V]], ptr [[ST1:%.*]], align 8
-; CHECK-NEXT: store double [[TMP12_V]], ptr [[ST2:%.*]], align 8
-; CHECK-NEXT: ret void
-;
- %y1 = alloca double
- %z1 = alloca double
- %ld1 = load double, ptr %y1
- %ld2 = load double, ptr %z1
- %tmp = fcmp olt double %ld1, %ld2
- %sel = select i1 %tmp, ptr %y1, ptr %z1
- %tmp12 = load i64, ptr %sel
- store i64 %tmp12, ptr %st1
- store i64 %tmp12, ptr %st2
- ret void
-}
-
diff --git a/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll b/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
index 00f8f50cb4f02..7c65a93a00436 100644
--- a/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
+++ b/llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
@@ -427,21 +427,6 @@ entry:
ret i8 %load
}
-define i8 @select_diff_addrspace_remove_alloca_asan(i1 %cond, ptr %p) sanitize_address {
-; CHECK-LABEL: @select_diff_addrspace_remove_alloca_asan(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: ret i8 0
-;
-entry:
- %alloca = alloca [32 x i8]
- call void @llvm.memcpy.p0.p1.i64(ptr %alloca, ptr addrspace(1) @g2, i64 32, i1 false)
- %gep = getelementptr inbounds [32 x i8], ptr %alloca, i32 0, i32 2
- %sel = select i1 %cond, ptr %alloca, ptr %gep
- %gep2 = getelementptr inbounds i8, ptr %sel, i64 4
- %load = load i8, ptr %gep2
- ret i8 %load
-}
-
declare i8 @readonly_callee(ptr readonly nocapture)
; FIXME: This should be able to fold to call i8 @readonly_callee(ptr nonnull @g1)
diff --git a/llvm/test/Transforms/InstCombine/strnlen-2.ll b/llvm/test/Transforms/InstCombine/strnlen-2.ll
index 36da6df20528c..5e95aaf8edcd9 100644
--- a/llvm/test/Transforms/InstCombine/strnlen-2.ll
+++ b/llvm/test/Transforms/InstCombine/strnlen-2.ll
@@ -38,16 +38,6 @@ define i64 @fold_strnlen_s3_s5_1(i1 %C) {
ret i64 %len
}
-define i64 @fold_strnlen_s3_s5_1_asan(i1 %C) sanitize_address {
-; CHECK-LABEL: @fold_strnlen_s3_s5_1_asan(
-; CHECK-NEXT: ret i64 1
-;
- %ptr = select i1 %C, ptr @s3, ptr @s6
-
- %len = call i64 @strnlen(ptr %ptr, i64 1)
- ret i64 %len
-}
-
; Fold strnlen (C ? s3 : s5, 3) to 3.
diff --git a/llvm/test/Transforms/SROA/phi-and-select.ll b/llvm/test/Transforms/SROA/phi-and-select.ll
index d237b437b9ce0..7c8b27c9de9c0 100644
--- a/llvm/test/Transforms/SROA/phi-and-select.ll
+++ b/llvm/test/Transforms/SROA/phi-and-select.ll
@@ -344,27 +344,6 @@ entry:
ret i32 %loaded
}
-; We should not unconditionally load with sanitizers.
-define i32 @test9_asan(i32 %b, ptr %ptr) sanitize_address {
-; Same as @test8 but for a select rather than a PHI node.
-;
-; CHECK-LABEL: @test9_asan(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
-; CHECK-NEXT: [[LOADED_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i32, ptr [[PTR]], align 4
-; CHECK-NEXT: [[LOADED_SROA_SPECULATED:%.*]] = select i1 [[TEST]], i32 undef, i32 [[LOADED_SROA_SPECULATE_LOAD_FALSE]]
-; CHECK-NEXT: ret i32 [[LOADED_SROA_SPECULATED]]
-;
-entry:
- %f = alloca float
- store i32 0, ptr %ptr
- %test = icmp ne i32 %b, 0
- %select = select i1 %test, ptr %f, ptr %ptr
- %loaded = load i32, ptr %select, align 4
- ret i32 %loaded
-}
-
define float @test10(i32 %b, ptr %ptr) {
; Don't try to promote allocas which are not elligible for it even after
; rewriting due to the necessity of inserting bitcasts when speculating a PHI
diff --git a/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll b/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
index 38ee760c82527..96262b44f58e0 100644
--- a/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
+++ b/llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
@@ -52,51 +52,6 @@ cleanup7: ; preds = %cleanup
ret void
}
-define void @f2_hwasan(i1 %c1) sanitize_hwaddress {
-; CHECK-LABEL: @f2_hwasan(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
-; CHECK: if.then:
-; CHECK-NEXT: br label [[CLEANUP:%.*]]
-; CHECK: cleanup:
-; CHECK-NEXT: [[G_0_SROA_SPECULATE_LOAD_CLEANUP:%.*]] = load i16, ptr @a, align 1
-; CHECK-NEXT: switch i32 2, label [[CLEANUP7:%.*]] [
-; CHECK-NEXT: i32 0, label [[LBL1:%.*]]
-; CHECK-NEXT: i32 2, label [[LBL1]]
-; CHECK-NEXT: ]
-; CHECK: if.else:
-; CHECK-NEXT: br label [[LBL1]]
-; CHECK: lbl1:
-; CHECK-NEXT: [[G_0_SROA_SPECULATED:%.*]] = phi i16 [ [[G_0_SROA_SPECULATE_LOAD_CLEANUP]], [[CLEANUP]] ], [ [[G_0_SROA_SPECULATE_LOAD_CLEANUP]], [[CLEANUP]] ], [ undef, [[IF_ELSE]] ]
-; CHECK-NEXT: unreachable
-; CHECK: cleanup7:
-; CHECK-NEXT: ret void
-;
-entry:
- %e = alloca i16, align 1
- br i1 %c1, label %if.then, label %if.else
-
-if.then: ; preds = %entry
- br label %cleanup
-
-cleanup: ; preds = %if.then
- switch i32 2, label %cleanup7 [
- i32 0, label %lbl1
- i32 2, label %lbl1
- ]
-
-if.else: ; preds = %entry
- br label %lbl1
-
-lbl1: ; preds = %if.else, %cleanup, %cleanup
- %g.0 = phi ptr [ @a, %cleanup ], [ @a, %cleanup ], [ %e, %if.else ]
- %0 = load i16, ptr %g.0, align 1
- unreachable
-
-cleanup7: ; preds = %cleanup
- ret void
-}
-
define void @f3(i1 %c1) {
; CHECK-LABEL: @f3(
; CHECK-NEXT: entry:
diff --git a/llvm/test/Transforms/SROA/select-load.ll b/llvm/test/Transforms/SROA/select-load.ll
index 0ebc8d71b83f6..7df72419b0ce5 100644
--- a/llvm/test/Transforms/SROA/select-load.ll
+++ b/llvm/test/Transforms/SROA/select-load.ll
@@ -36,7 +36,7 @@ entry:
%st.args = type { i32, ptr }
; A bitcasted load and a direct load of select.
-define void @test_multiple_loads_select(i1 %cmp) {
+define void @test_multiple_loads_select(i1 %cmp){
; CHECK-LABEL: @test_multiple_loads_select(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADDR_I8_SROA_SPECULATED:%.*]] = select i1 [[CMP:%.*]], ptr undef, ptr undef
@@ -57,28 +57,6 @@ entry:
ret void
}
-; Sanitizer will break optimization.
-define void @test_multiple_loads_select_asan(i1 %cmp) sanitize_address {
-; CHECK-LABEL: @test_multiple_loads_select_asan(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ADDR_I8_SROA_SPECULATED:%.*]] = select i1 [[CMP:%.*]], ptr undef, ptr undef
-; CHECK-NEXT: call void @foo_i8(ptr [[ADDR_I8_SROA_SPECULATED]])
-; CHECK-NEXT: [[ADDR_I32_SROA_SPECULATED:%.*]] = select i1 [[CMP]], ptr undef, ptr undef
-; CHECK-NEXT: call void @foo_i32(ptr [[ADDR_I32_SROA_SPECULATED]])
-; CHECK-NEXT: ret void
-;
-entry:
- %args = alloca [2 x %st.args], align 16
- %arr1 = getelementptr inbounds [2 x %st.args], ptr %args, i64 0, i64 1
- %sel = select i1 %cmp, ptr %arr1, ptr %args
- %addr = getelementptr inbounds %st.args, ptr %sel, i64 0, i32 1
- %addr.i8 = load ptr, ptr %addr, align 8
- call void @foo_i8(ptr %addr.i8)
- %addr.i32 = load ptr, ptr %addr, align 8
- call void @foo_i32 (ptr %addr.i32)
- ret void
-}
-
declare void @foo_i8(ptr)
declare void @foo_i32(ptr)
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