[llvm] [NFC][SPIRV] Fix SPIRV backend build (PR #101081)
Chris B via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 29 13:41:07 PDT 2024
https://github.com/llvm-beanz created https://github.com/llvm/llvm-project/pull/101081
Pass MachineModuleInfo through to the InstructionSelector in setupMF.
This resolves a build breakage in the SPIRV backend caused by removing the MachineModuleInfo from the MachineFunction.
>From 1c8e14743d7b7cbf9620322eb0b851e4a59f12da Mon Sep 17 00:00:00 2001
From: Chris Bieneman <chris.bieneman at me.com>
Date: Mon, 29 Jul 2024 15:40:28 -0500
Subject: [PATCH] [NFC][SPIRV] Fix SPIRV backend build
Pass MachineModuleInfo through to the InstructionSelector in setupMF.
This resolves a build breakage in the SPIRV backend caused by removing
the MachineModuleInfo from the MachineFunction.
---
.../llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h | 4 +++-
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 4 +++-
.../Target/AArch64/GISel/AArch64InstructionSelector.cpp | 4 ++--
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 5 +++--
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 +-
llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp | 9 +++++----
6 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h b/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
index cc2dd2f4e489c..58d910456c324 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
@@ -43,6 +43,7 @@ class MachineInstr;
class MachineIRBuilder;
class MachineInstrBuilder;
class MachineFunction;
+class MachineModuleInfo;
class MachineOperand;
class MachineRegisterInfo;
class RegisterBankInfo;
@@ -582,7 +583,8 @@ class GIMatchTableExecutor {
virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb,
CodeGenCoverage *covinfo = nullptr,
ProfileSummaryInfo *psi = nullptr,
- BlockFrequencyInfo *bfi = nullptr) {
+ BlockFrequencyInfo *bfi = nullptr,
+ MachineModuleInfo *MMI = nullptr) {
CoverageInfo = covinfo;
KB = kb;
MF = &mf;
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 9a27728dcb4dd..0e927397a98e5 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
@@ -102,9 +103,10 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
}
+ auto *MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
CodeGenCoverage CoverageInfo;
assert(ISel && "Cannot work without InstructionSelector");
- ISel->setupMF(MF, KB, &CoverageInfo, PSI, BFI);
+ ISel->setupMF(MF, KB, &CoverageInfo, PSI, BFI, MMI);
// An optimization remark emitter. Used to report failures.
MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index e9e6b6cb68d0d..a12f8d21fbe69 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -78,8 +78,8 @@ class AArch64InstructionSelector : public InstructionSelector {
void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) override {
- InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
+ BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override {
+ InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MMI);
MIB.setMF(MF);
// hasFnAttribute() is expensive to call on every BRCOND selection, so
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index aaa292291334c..e76b4ea0bc20d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -60,11 +60,12 @@ const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }
void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo,
ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) {
+ BlockFrequencyInfo *BFI,
+ MachineModuleInfo *MMI) {
MRI = &MF.getRegInfo();
Subtarget = &MF.getSubtarget<GCNSubtarget>();
Subtarget->checkSubtargetFeatures(MF.getFunction());
- InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
+ InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MMI);
}
// Return the wave level SGPR base address if this is a wave address.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
index 43ed210508d33..22415f1ec3325 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -60,7 +60,7 @@ class AMDGPUInstructionSelector final : public InstructionSelector {
void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) override;
+ BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override;
private:
struct GEPInfo {
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 8391e0dec9a39..76d9d5b5a3e50 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -88,7 +88,7 @@ class SPIRVInstructionSelector : public InstructionSelector {
const RegisterBankInfo &RBI);
void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) override;
+ BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override;
// Common selection code. Instruction-specific selection occurs in spvSelect.
bool select(MachineInstr &I) override;
static const char *getName() { return DEBUG_TYPE; }
@@ -279,11 +279,12 @@ SPIRVInstructionSelector::SPIRVInstructionSelector(const SPIRVTargetMachine &TM,
void SPIRVInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo,
ProfileSummaryInfo *PSI,
- BlockFrequencyInfo *BFI) {
- MMI = &MF.getMMI().getObjFileInfo<SPIRVMachineModuleInfo>();
+ BlockFrequencyInfo *BFI,
+ MachineModuleInfo *MI) {
+ MMI = &MI->getObjFileInfo<SPIRVMachineModuleInfo>();
MRI = &MF.getRegInfo();
GR.setCurrentFunc(MF);
- InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
+ InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MI);
}
static bool isImm(const MachineOperand &MO, MachineRegisterInfo *MRI);
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