[llvm] [WIP] Optimize S_MOV frame index elimination support (PR #101322)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 04:29:43 PDT 2024
================
@@ -2568,30 +2568,46 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
} else
Add.addImm(Offset).addReg(TmpResultReg, RegState::Kill);
} else {
- BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32),
- TmpResultReg)
- .addImm(Offset);
assert(Offset > 0 &&
isUInt<24>(2 * ST.getMaxWaveScratchSize()) &&
"offset is unsafe for v_mad_u32_u24");
- // We start with a frame pointer with a wave space value, and an
- // offset in lane-space. We are materializing a lane space
- // value. We can either do a right shift of the frame pointer to
- // get to lane space, or a left shift of the offset to get to
- // wavespace. We can right shift after the computation to get
- // back to the desired per-lane value.
- // We are using the mad_u32_u24 primarily as an add with no
- // carry out clobber.
- Add = BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MAD_U32_U24_e64),
+ if (AMDGPU::isInlinableLiteral32(Offset,
+ ST.hasInv2PiInlineImm())) {
----------------
arsenm wrote:
You don't need to duplicate the the paths. You can still use the reassociated path below. You can also conditionally add the operand to the MachineInstrBuilder and skip the materialize
https://github.com/llvm/llvm-project/pull/101322
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