[llvm] [RISCV] Adjust RVV stack alignment by ABI (PR #101002)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 29 05:12:13 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Pengcheng Wang (wangpc-pp)
<details>
<summary>Changes</summary>
The default RVV stack alignment is 16B, which may not match the
default stack alignment (which is decided by ABI).
This causes some issues, for example, a stack realignment without
reserved FP.
This fixes #<!-- -->100822.
---
Full diff: https://github.com/llvm/llvm-project/pull/101002.diff
3 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.cpp (+2-4)
- (modified) llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll (+13)
- (modified) llvm/test/CodeGen/RISCV/stack-realignment.ll (+13)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 7abd5a49a1b5f..a29e9060892f2 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1076,10 +1076,8 @@ RISCVFrameLowering::assignRVVStackObjectOffsets(MachineFunction &MF) const {
pushRVVObjects(0, MFI.getObjectIndexEnd() - RVVCSI.size());
// The minimum alignment is 16 bytes.
- Align RVVStackAlign(16);
- const auto &ST = MF.getSubtarget<RISCVSubtarget>();
-
- if (!ST.hasVInstructions()) {
+ Align RVVStackAlign = getABIStackAlignment(STI.getTargetABI());
+ if (!STI.hasVInstructions()) {
assert(ObjectsToAllocate.empty() &&
"Can't allocate scalable-vector objects without V instructions");
return std::make_pair(0, RVVStackAlign);
diff --git a/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll b/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
index 56723745d012d..36640878d308b 100644
--- a/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
+++ b/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
@@ -3,10 +3,18 @@
; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I-ILP32E
+; RUN: llc -mtriple=riscv32 -mattr=+zve32x -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV32I,RV32IV
+; RUN: llc -mtriple=riscv32 -mattr=+zve32x -target-abi ilp32e -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV32I-ILP32E,RV32IV-ILP32E
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -target-abi lp64e -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I-LP64E
+; RUN: llc -mtriple=riscv64 -mattr=+zve32x -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV64I,RV64IV
+; RUN: llc -mtriple=riscv64 -mattr=+zve32x -target-abi lp64e -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV64I-LP64E,RV64IV-LP64E
declare void @callee(ptr, ptr)
@@ -127,3 +135,8 @@ define void @caller(i32 %n) {
call void @callee(ptr %1, ptr %2)
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; RV32IV: {{.*}}
+; RV32IV-ILP32E: {{.*}}
+; RV64IV: {{.*}}
+; RV64IV-LP64E: {{.*}}
diff --git a/llvm/test/CodeGen/RISCV/stack-realignment.ll b/llvm/test/CodeGen/RISCV/stack-realignment.ll
index 034ebadc76af2..27cff454e26f8 100644
--- a/llvm/test/CodeGen/RISCV/stack-realignment.ll
+++ b/llvm/test/CodeGen/RISCV/stack-realignment.ll
@@ -3,10 +3,18 @@
; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I-ILP32E
+; RUN: llc -mtriple=riscv32 -mattr=+zve32x -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV32I,RV32IV
+; RUN: llc -mtriple=riscv32 -mattr=+zve32x -target-abi ilp32e -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV32I-ILP32E,RV32IV-ILP32E
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -target-abi lp64e -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I-LP64E
+; RUN: llc -mtriple=riscv64 -mattr=+zve32x -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV64I,RV64IV
+; RUN: llc -mtriple=riscv64 -mattr=+zve32x -target-abi lp64e -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefixes=RV64I-LP64E,RV64IV-LP64E
declare void @callee(ptr)
@@ -1265,3 +1273,8 @@ define void @caller_no_realign4096() "no-realign-stack" {
call void @callee(ptr %1)
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; RV32IV: {{.*}}
+; RV32IV-ILP32E: {{.*}}
+; RV64IV: {{.*}}
+; RV64IV-LP64E: {{.*}}
``````````
</details>
https://github.com/llvm/llvm-project/pull/101002
More information about the llvm-commits
mailing list