The Week Of Monday 20 May 2024 Archives by author
Starting: Mon May 20 00:00:05 PDT 2024
Ending: Sun May 26 23:58:38 PDT 2024
Messages: 4956
- [llvm] Fix merging of debug_str_offsets with multiple contributions (PR #90461)
Morten larsen via llvm-commits
- [llvm] Fix merging of debug_str_offsets with multiple contributions (PR #90461)
Morten larsen via llvm-commits
- [llvm] Fix merging of debug_str_offsets with multiple contributions (PR #90461)
Morten larsen via llvm-commits
- [clang] [llvm] Disable compiling Flang and running its tests on Clang changes (PR #92740)
Aaron Ballman via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Aaron Ballman via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Aaron Ballman via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Aaron Ballman via llvm-commits
- [llvm] [llvm] Revise IDE folder structure (PR #89741)
Aaron Ballman via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
Aaron Siddhartha Mondal via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
Aaron Siddhartha Mondal via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] [HEXAGON] Utilize new mask instruction (PR #92365)
Abinaya Saravanan via llvm-commits
- [llvm] [SimplifyCFG] Convert switch to cmp/select sequence (PR #82795)
Acim Maravic via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
Adrian Prantl via llvm-commits
- [llvm] Avoid std::string -> (char *) roundtrip in createStringError() (NFC) (PR #93242)
Adrian Prantl via llvm-commits
- [llvm] Avoid std::string -> (char *) roundtrip in createStringError() (NFC) (PR #93242)
Adrian Prantl via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Adrian Prantl via llvm-commits
- [clang] [llvm] [AArch64] set AppleA14 architecture version to v8.4-a (PR #92600)
Ahmed Bougacha via llvm-commits
- [llvm] [Nomination] Add an extra Red Hat representative to the security group (PR #92174)
Ahmed Bougacha via llvm-commits
- [llvm] [Nomination] Add ST representative to Security group (PR #93176)
Ahmed Bougacha via llvm-commits
- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
Ahmed Bougacha via llvm-commits
- [llvm] [MCA] use std::function instead of function_ref when storing (PR #91039)
Aiden Grossman via llvm-commits
- [llvm] [MCA] use std::function instead of function_ref when storing (PR #91039)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Aiden Grossman via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Aiden Grossman via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Aiden Grossman via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
Aiden Grossman via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Aiden Grossman via llvm-commits
- [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)
Aiden Grossman via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
Akshay Deodhar via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] [RuntimeDyld][ELF][AArch64] Fix resolveAArch64ShortBranch. (PR #92245)
Alastair Houghton via llvm-commits
- [lld] [llvm] Reapply "[RISCV] Support RISCV Atomics ABI attributes (#84597)" (PR #90266)
Alex Bradbury via llvm-commits
- [clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)
Alex Bradbury via llvm-commits
- [llvm] Avoid std::string -> (char *) roundtrip in createStringError() (NFC) (PR #93242)
Alex Langford via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Alexander Shaposhnikov via llvm-commits
- [llvm] [BOLT] Fix unused variable warning (PR #93253)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT] Do not emit debug_names entry for DIEs with DW_AT_declaration (PR #93347)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT] Do not emit debug_names entry for DIEs with DW_AT_declaration (PR #93347)
Alexander Yermolovich via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Fix ULEB128 test when building with MSVC (PR #93184)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
Alexandre Ganea via llvm-commits
- [llvm] Add thread-local overrides for `llvm::errs()` and `llvm::outs()`. (PR #90374)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
Alexandre Ganea via llvm-commits
- [llvm] [FMV][GlobalOpt] Bypass the IFunc Resolver of MultiVersioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] Split fmv and extensions (PR #92882)
Alexandros Lamprineas via llvm-commits
- [llvm] [SLP] NFC. Use TreeEntry::getOperand if setOperandsInOrder is called (PR #92727)
Alexey Bataev via llvm-commits
- [llvm] [VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity (PR #92696)
Alexey Bataev via llvm-commits
- [llvm] [VectorCombine] Add constant splat handling for shuffleToIdentity (PR #92797)
Alexey Bataev via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Reduce newTreeEntry usage. (PR #92994)
Alexey Bataev via llvm-commits
- [llvm] 30d484f - [SLP]Fix a crash when trying to convert masked gather nodes to strided.
Alexey Bataev via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Alexey Bataev via llvm-commits
- [llvm] 554c47c - [SLP]Fix undef poison vector values shuffles with poisonous vectors.
Alexey Bataev via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve/fix extracts calculations for non-power-of-2 elements. (PR #93213)
Alexey Bataev via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve/fix extracts calculations for non-power-of-2 elements. (PR #93213)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve vectorization of gathered loads. (PR #89129)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve vectorization of gathered loads. (PR #89129)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve vectorization of gathered loads. (PR #89129)
Alexey Bataev via llvm-commits
- [llvm] [llvm-objcopy] Check for missing argument values (PR #70710)
Alexey Karyakin via llvm-commits
- [llvm] [llvm-objcopy] Check for missing argument values (PR #70710)
Alexey Karyakin via llvm-commits
- [llvm] [llvm-objcopy] Check for missing argument values (PR #70710)
Alexey Karyakin via llvm-commits
- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select TBL/TBX Intrinsics (PR #92914)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select TBL/TBX Intrinsics (PR #92914)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select TBL/TBX Intrinsics (PR #92914)
Amara Emerson via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [flang] [libcxx] [libcxxabi] [lld] [lldb] [llvm] [mlir] [BOLT] Ignore special symbols as function aliases in updateELFSymbolTable (PR #92713)
Amir Ayupov via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [flang] [libcxx] [libcxxabi] [lld] [lldb] [llvm] [mlir] [BOLT] Ignore special symbols as function aliases in updateELFSymbolTable (PR #92713)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Tidy up code (PR #92927)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Tidy up code (PR #92927)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Tidy up code (PR #92927)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Use const reference in range-based for loop (PR #92932)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] [NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] [NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] [NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Use const reference in range-based for loop (PR #92932)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Remove dead initialization code (PR #92952)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Remove dead initialization code (PR #92952)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Report adjusted program stats from perf2bolt in BAT mode (PR #91683)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Process cross references between ignored functions in BAT mode (PR #92484)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Process cross references between ignored functions in BAT mode (PR #92484)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Use getLocationName in YAMLProfileWriter (PR #92493)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Report adjusted program stats from perf2bolt in BAT mode (PR #91683)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Move BAT::fetchParentAddress to header (PR #93061)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Move BAT::fetchParentAddress to header (PR #93061)
Amir Ayupov via llvm-commits
- [llvm] [bazel] add bolt address translation header to Passes (PR #93014)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Eliminate uses of throwing std::map::at (PR #92950)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Clean up MCF (PR #93065)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92975)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Clean up MCF (PR #93065)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make estimateEdgeCounts a BinaryFunctionPass (PR #93074)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make BAT methods const (PR #91823)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #93078)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix setHasSymbolsWithFileName (PR #92625)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #93078)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Add BinaryContext::HasBATSection (PR #92650)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make estimateEdgeCounts a BinaryFunctionPass (PR #93074)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Move out PrintProgramStats from Profile into Rewrite (PR #93075)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Move out PrintProgramStats from Profile into Rewrite (PR #93075)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Move out PrintProgramStats from Profile into Rewrite (PR #93075)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix setHasSymbolsWithFileName (PR #92625)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify FuncHashesTy (PR #91815)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify analyzeIndirectBranch (PR #91662)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify BBHashMapTy (PR #91812)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify BBHashMapTy (PR #91812)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set InitialDynoStats after EstimateEdgeCounts (PR #93218)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set InitialDynoStats after EstimateEdgeCounts (PR #93218)
Amir Ayupov via llvm-commits
- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
Amir Ayupov via llvm-commits
- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
Amir Ayupov via llvm-commits
- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
Amir Ayupov via llvm-commits
- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Allow processing of binaries with stripped FILE symbols mismatching the profile (PR #93238)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Allow processing of binaries with stripped FILE symbols mismatching the profile (PR #93238)
Amir Ayupov via llvm-commits
- [clang] [libcxx] [lldb] [llvm] [mlir] [BOLT][BAT] Add entries for deleted basic blocks (PR #91906)
Amir Ayupov via llvm-commits
- [clang] [libcxx] [lldb] [llvm] [mlir] [BOLT][BAT] Add entries for deleted basic blocks (PR #91906)
Amir Ayupov via llvm-commits
- [clang] [libcxx] [lldb] [llvm] [mlir] [BOLT][BAT] Add entries for deleted basic blocks (PR #91906)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix unused variable warning (PR #93323)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Fix unused variable warning (PR #93323)
Amir Ayupov via llvm-commits
- [clang] [libcxx] [lldb] [llvm] [mlir] [BOLT][BAT] Add entries for deleted basic blocks (PR #91906)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Avoid computing BF hash twice in YAML reader (PR #75096)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Add isRIPRel and isIndexed helpers (PR #91661)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Add isRIPRel and isIndexed helpers (PR #91661)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify analyzeIndirectBranch (PR #91662)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify analyzeIndirectBranch (PR #91662)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Simplify analyzeIndirectBranch (PR #91662)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Define getExprValue helper (PR #91663)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Define getExprValue helper (PR #91663)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Define getExprValue helper (PR #91663)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Fix return type of BC::getSignedValueAtAddress (PR #91664)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Fix return type of BC::getSignedValueAtAddress (PR #91664)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Fix return type of BC::getSignedValueAtAddress (PR #91664)
Amir Ayupov via llvm-commits
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Amir Ayupov via llvm-commits
- [llvm] [BOLT] Use file-disambiguated parent name in registerFragments (PR #93399)
Amir Ayupov via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
Amy Kwan via llvm-commits
- [llvm] [AArch64][PAC] Fix creating check instructions for BBs without an epilog (PR #92508)
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Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Fix creating check instructions for BBs without an epilog (PR #92508)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Fix creating check instructions for BBs without an epilog (PR #92508)
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- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Anchu Rajendran S via llvm-commits
- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Anchu Rajendran S via llvm-commits
- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Anchu Rajendran S via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Andreas Jonson via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Andreas Jonson via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Andreas Jonson via llvm-commits
- [clang] [llvm] [inline] Clone return range attribute on the callsite into inlined call (PR #92666)
Andreas Jonson via llvm-commits
- [compiler-rt] [scudo] Compute the default aligned pointer without tag (PR #92989)
Andrei Homescu via llvm-commits
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Andrei Homescu via llvm-commits
- [compiler-rt] [scudo] Compute the default aligned pointer without tag (PR #92989)
Andrei Homescu via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Andrei Safronov via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Andrei Safronov via llvm-commits
- [compiler-rt] [DFSan] Fix recvmsg wrapper to support MSG_TRUNC flag. (PR #92599)
Andrew Browne via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
Andrew Trick via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
Andrew Trick via llvm-commits
- [lldb] [llvm] [lldb][FreeBSD][AArch64] Enable register field detection (PR #85058)
Andrew Turner via llvm-commits
- [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in exp2 combine (PR #92707)
Andy Kaylor via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Andy Kaylor via llvm-commits
- [llvm] [Nomination] Add an extra Red Hat representative to the security group (PR #92174)
Andy Kaylor via llvm-commits
- [llvm] [Nomination] Add ST representative to Security group (PR #93176)
Andy Kaylor via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Angelo Bulfone via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Angelo Bulfone via llvm-commits
- [llvm] InstCombine: Stop handling bitcast in PointerReplacer (PR #92937)
Anshil Gandhi via llvm-commits
- [llvm] [AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (PR #92507)
Anton Korobeynikov via llvm-commits
- [llvm] [AArch64][PAC] Fix creating check instructions for BBs without an epilog (PR #92508)
Anton Korobeynikov via llvm-commits
- [llvm] [AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (PR #92507)
Anton Korobeynikov via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Anton Korobeynikov via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Anton Korobeynikov via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Anton Korobeynikov via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)
Antonio Frighetto via llvm-commits
- [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] e897b0b - [ConstantRange][LVI] Add support for `multiplyWithNoWrap`
Antonio Frighetto via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Antonio Frighetto via llvm-commits
- [llvm] [LowerSwitch] Use unsigned integer for range comparasion (PR #93237)
Antonio Frighetto via llvm-commits
- [llvm] [LowerSwitch] Use unsigned integer for range comparison (PR #93237)
Antonio Frighetto via llvm-commits
- [llvm] [LowerSwitch] Use unsigned integer for range comparison (PR #93237)
Antonio Frighetto via llvm-commits
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Antonio Frighetto via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Antonio Frighetto via llvm-commits
- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
Artem Belevich via llvm-commits
- [llvm] Explain partial byte extraction logic. (PR #92868)
Artem Belevich via llvm-commits
- [llvm] Explain partial byte extraction logic. (PR #92868)
Artem Belevich via llvm-commits
- [llvm] Explain partial byte extraction logic. (PR #92868)
Artem Belevich via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (PR #92823)
Arthur Eubanks via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (PR #92823)
Arthur Eubanks via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (PR #92823)
Arthur Eubanks via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (PR #92823)
Arthur Eubanks via llvm-commits
- [llvm] Allow PTO to be modified in PassBuilder (PR #92821)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [llvm] InterleavedLoadCombine: Correctly query PM for TargetTransformInfo (PR #93103)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] wip: Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [llvm] 3ec57a7 - [test][EntryExitInstrumenter] Update/add tests
Arthur Eubanks via llvm-commits
- [clang] [llvm] Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [clang] [llvm] Move instrumentation passes (PR #92171)
Arthur Eubanks via llvm-commits
- [llvm] [ADT] Add back ability to compare StringSet (PR #91374)
Balazs Benics via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
Ben Shi via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
Benjamin Kramer via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)
Benson Chu via llvm-commits
- [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)
Bill Wendling via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level (PR #92978)
Billy Zhu via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level (PR #92978)
Billy Zhu via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (PR #92978)
Billy Zhu via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (PR #92978)
Billy Zhu via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (PR #92978)
Billy Zhu via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Björn Pettersson via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Björn Pettersson via llvm-commits
- [llvm] [SLP] Avoid crash in computeExtractCost (PR #93188)
Björn Pettersson via llvm-commits
- [llvm] [LegalizeTypes] Handle non byte-sized elt types when splitting INSERT/EXTRACT_VECTOR_ELT (PR #93357)
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- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Brandon Wu via llvm-commits
- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Brandon Wu via llvm-commits
- [llvm] [llvm] Include the GenVT.inc to getEnumName (PR #93198)
Brandon Wu via llvm-commits
- [llvm] [llvm] Include the GenVT.inc to getEnumName (PR #93198)
Brandon Wu via llvm-commits
- [llvm] [llvm] Include the GenVT.inc to getEnumName (PR #93198)
Brandon Wu via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f16x8.extract_lane instruction. (PR #93272)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement all f16x8 binary instructions. (PR #93360)
Brendan Dahl via llvm-commits
- [clang] [llvm] [WebAssembly] Implement all f16x8 binary instructions. (PR #93360)
Brendan Dahl via llvm-commits
- [llvm] [Hexagon] Implement @llvm.readsteadycounter() (PR #93247)
Brian Cain via llvm-commits
- [llvm] [Hexagon] Implement @llvm.readsteadycounter() (PR #93247)
Brian Cain via llvm-commits
- [llvm] [Hexagon] Implement @llvm.readsteadycounter() (PR #93247)
Brian Cain via llvm-commits
- [llvm] [Hexagon] Implement @llvm.readsteadycounter() (PR #93247)
Brian Cain via llvm-commits
- [llvm] Fix vgpr live range (PR #92940)
Carl Ritson via llvm-commits
- [llvm] [indvars] Missing variables at Og (PR #88270)
Carlos Alberto Enciso via llvm-commits
- [llvm] [indvars] Missing variables at Og (PR #88270)
Carlos Alberto Enciso via llvm-commits
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Carlos Alberto Enciso via llvm-commits
- [llvm] [indvars] Missing variables at Og (PR #88270)
Carlos Alberto Enciso via llvm-commits
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Carlos Alberto Enciso via llvm-commits
- [llvm] [indvars] Missing variables at Og (PR #88270)
Carlos Alberto Enciso via llvm-commits
- [llvm] Revert "[indvars] Missing variables at Og (#88270)" (PR #93016)
Carlos Alberto Enciso via llvm-commits
- [llvm] Revert "[indvars] Missing variables at Og (#88270)" (PR #93016)
Carlos Alberto Enciso via llvm-commits
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Carlos Alberto Enciso via llvm-commits
- [compiler-rt] [asan][windows] Further relax how deep in the callstack main can be in some asan tests (PR #92329)
Charlie Barto via llvm-commits
- [llvm] 2143b7c - [PowerPC]perform bitcast lowering only at 64 bit
Chen Zheng via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
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Chen Zheng via llvm-commits
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Chen Zheng via llvm-commits
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Chen Zheng via llvm-commits
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Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
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Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
Chen Zheng via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
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Chinmay Deshpande via llvm-commits
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Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
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- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
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- [clang] [compiler-rt] [compiler-rt] Realtime Sanitizer: Introduce RADSan backend (PR #92460)
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- [llvm] [mlir] [MLIR][Analysis] Consolidate topological sort utilities (PR #92563)
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Christian Ulmann via llvm-commits
- [llvm] [mlir] [MLIR][Analysis] Consolidate topological sort utilities (PR #92563)
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- [llvm] [Coroutines][NFC] Remove @llvm.coro.id.async intrinsics from CoroElide (PR #92956)
Chuanqi Xu via llvm-commits
- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (PR #92978)
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- [clang] [llvm] [coro] Lower `llvm.coro.await.suspend.handle` to resume with tail call (PR #89751)
Chuanqi Xu via llvm-commits
- [clang] [llvm] [coro] Lower `llvm.coro.await.suspend.handle` to resume with tail call (PR #89751)
Chuanqi Xu via llvm-commits
- [llvm] 31f1590 - [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast
Chuanqi Xu via llvm-commits
- [clang] [llvm] [coro] Lower `llvm.coro.await.suspend.handle` to resume with tail call (PR #89751)
Chuanqi Xu via llvm-commits
- [llvm] 8d4d85d - Revert "[Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast"
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
Chuanqi Xu via llvm-commits
- [clang] [llvm] [coro] Lower `llvm.coro.await.suspend.handle` to resume with tail call (PR #89751)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
Chuanqi Xu via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
Chuanqi Xu via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
Chuanqi Xu via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
Chuanqi Xu via llvm-commits
- [llvm] [Exegesis] Changing non-standard CHECK in tests to more compliant way (PR #93222)
Clement Courbet via llvm-commits
- [llvm] [llvm][Support] ListeningSocket::accept returns operation_canceled if FD is set to -1 (PR #89479)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Improvements to ListeningSocket functionality and documentation (PR #84710)
Connor Sughrue via llvm-commits
- [llvm] 097e96d - [LegalizeTypes] Use VP_AND for zext_inreg in PromoteIntRes_VPFunnelShift.
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Add getVPZeroExtendInReg. NFC (PR #92792)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (PR #92799)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes] Use SeleectionDAG::SplitVector to simplify some code. NFC (PR #92816)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (PR #92816)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (PR #92605)
Craig Topper via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Craig Topper via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Craig Topper via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Craig Topper via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Add getVPZeroExtendInReg. NFC (PR #92792)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (PR #92816)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Craig Topper via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Craig Topper via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Craig Topper via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Craig Topper via llvm-commits
- [llvm] 888e087 - [RISCV] Remove unused function declaration. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (PR #92839)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
Craig Topper via llvm-commits
- [llvm] [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (PR #92839)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISel] Allow opaque constants in `hasAndNotCompare` (PR #92926)
Craig Topper via llvm-commits
- [llvm] [X86] Return true for opaque constants in hasAndNotCompare. (PR #92944)
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Craig Topper via llvm-commits
- [llvm] [X86] Return true for opaque constants in hasAndNotCompare. (PR #92944)
Craig Topper via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Craig Topper via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Craig Topper via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Legalize G_{U|S}{ADD|SUB}SAT (PR #92935)
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
Craig Topper via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Craig Topper via llvm-commits
- [llvm] [X86] Remove unused MachineLoopInfo from X86FixupBWInsts. NFC (PR #92984)
Craig Topper via llvm-commits
- [llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)
Craig Topper via llvm-commits
- [llvm] [X86] Remove unused MachineLoopInfo from X86FixupBWInsts. NFC (PR #92984)
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Craig Topper via llvm-commits
- [llvm] [RISCV] Introduce the RISCVLoopIdiomRecognizePass (PR #92441)
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Craig Topper via llvm-commits
- [llvm] [RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default (PR #89927)
Craig Topper via llvm-commits
- [llvm] [RISCV][LSR] Account for temporary register for base addition (PR #92296)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)
Craig Topper via llvm-commits
- [llvm] [X86] Remove unused MachineLoopInfo from X86FixupBWInsts. NFC (PR #92984)
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Craig Topper via llvm-commits
- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
Craig Topper via llvm-commits
- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Zicfilp implies Zicsr. (PR #93143)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (PR #93221)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [llvm] Include the GenVT.inc to getEnumName (PR #93198)
Craig Topper via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Craig Topper via llvm-commits
- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (PR #93221)
Craig Topper via llvm-commits
- [llvm] 7c265e9 - [RISCV] Replace std::optional::value() with operator*. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93320)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't use x7 as input argument for fastcc when Zicfilp enabled. (PR #93321)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't use x7 as input argument for fastcc when Zicfilp enabled. (PR #93321)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] 9a038fc - [RISCV] PseudoMovImm is not a IsSignExtendingOpW instruction.
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Craig Topper via llvm-commits
- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93352)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)
Craig Topper via llvm-commits
- [llvm] b13f799 - [RISCV] Fix spelling error in test names. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (PR #93356)
Craig Topper via llvm-commits
- [llvm] f9278d6 - [RISCV] Fix tablegen indentation. NFC
Craig Topper via llvm-commits
- [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)
Craig Topper via llvm-commits
- [llvm] [X86] Support ATOMIC_LOAD_FP_BINOP_MI for other binops (PR #87524)
Craig Topper via llvm-commits
- [llvm] [X86] Support ATOMIC_LOAD_FP_BINOP_MI for other binops (PR #87524)
Craig Topper via llvm-commits
- [llvm] [MachineLICM] Hoist copies of constant physical register (PR #93285)
Craig Topper via llvm-commits
- [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)
Craig Topper via llvm-commits
- [llvm] [TableGen][CMake] Add missing dependency to intrinsics_gen (PR #93134)
Cyndy Ishida via llvm-commits
- [llvm] [TableGen][CMake] Add missing dependency to intrinsics_gen (PR #93134)
Cyndy Ishida via llvm-commits
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- [clang] [llvm] Move instrumentation passes (PR #92171)
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- [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in exp2 combine (PR #92707)
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- [llvm] [LangRef] Try to formalize the definition of "odr" in LLVM IR. (PR #92619)
Eli Friedman via llvm-commits
- [llvm] [LangRef] Try to formalize the definition of "odr" in LLVM IR. (PR #92619)
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Eli Friedman via llvm-commits
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
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- [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)
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- [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)
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- [llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)
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- [llvm] [RISCV][TTI] Add cost of type based binOp VP intrinsics with functionalOPC. (PR #93435)
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- [llvm] [RISCV][TTI] Add cost of type based binOp VP intrinsics with functionalOPC. (PR #93435)
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- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
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- [llvm] [Offload][WIP] Move `/openmp/libomptarget` to `/offload` (PR #82459)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
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- [clang] [llvm] [clang] Introduce target-specific `Sema` components (PR #93179)
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- [clang] [llvm] [clang] Introduce target-specific `Sema` components (PR #93179)
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- [clang] [llvm] [openmp] [PGO][OpenMP] Instrumentation for GPU devices (PR #76587)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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Evgenii Stepanov via llvm-commits
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- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
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- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Evgenii Stepanov via llvm-commits
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Evgenii Stepanov via llvm-commits
- [llvm] [RuntimeDyldChecker][AArch32] Add a PC offset to next_PC for ARM targets (PR #91746)
Eymen Ünay via llvm-commits
- [llvm] [RuntimeDyldChecker][AArch32] Add a PC offset to next_PC for ARM targets (PR #91746)
Eymen Ünay via llvm-commits
- [llvm] [RuntimeDyldChecker][AArch32] Add a PC offset to next_PC for ARM targets (PR #91746)
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- [llvm] [RuntimeDyldChecker][AArch32] Add a PC offset to next_PC for ARM targets (PR #91746)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [lld] [ELF] Support high address DW_EH_sdata4 for ELFCLASS32 (PR #92438)
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- [lld] [ELF] Support high address DW_EH_sdata4 for ELFCLASS32 (PR #92438)
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- [lld] [ELF] Support high address DW_EH_sdata4 for ELFCLASS32 (PR #92438)
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- [clang] [compiler-rt] [compiler-rt] Realtime Sanitizer: Introduce RADSan backend (PR #92460)
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- [llvm] 245491a - [MC] Disable MCAssembler based constant folding for DwarfDebug
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- [clang] [llvm] [MC] Make UseAssemblerInfoForParsing mostly true (PR #91082)
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- [llvm] [llvm-driver] Add driver aliases for c++filt and gcov-tool (PR #92803)
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- [llvm] 3fa6b3b - [llvm-profdata] Fix some style and clang-tidy issues
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- [clang] [compiler-rt] [compiler-rt] Realtime Sanitizer: Introduce RADSan backend (PR #92460)
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- [clang] [llvm] [mlir] Use StringRef::find_first_of(char), etc (NFC) (PR #92841)
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- [lld] [lld][NFC] Precommit test for ld -r links FatLTO PIC objects (PR #92817)
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- [clang] [llvm] [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (PR #92856)
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- [clang] [llvm] [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (PR #92856)
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- [clang] [llvm] [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (PR #92856)
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- [clang] [llvm] [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (PR #92856)
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Fangrui Song via llvm-commits
- [llvm] [llvm-driver] Add driver alias for c++filt (PR #92803)
Fangrui Song via llvm-commits
- [llvm] [llvm-driver] Add driver alias for c++filt (PR #92803)
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- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
Fangrui Song via llvm-commits
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Fangrui Song via llvm-commits
- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
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- [lld] e53c535 - [ELF,test] Improve --compress-debug-sections/--compress-sections tests
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Fangrui Song via llvm-commits
- [clang] [compiler-rt] [libc] [libclc] [libcxxabi] [lld] [lldb] [llvm] [mlir] Add clarifying parenthesis around non-trivial conditions in ternary expressions. (PR #90391)
Fangrui Song via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
Fangrui Song via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
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- [llvm] [symbolizer] Empty string is not an error (PR #92660)
Fangrui Song via llvm-commits
- [llvm] d03e56b - [Driver] Simplify -f[no-]sized-deallocation forwarding. NFC
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- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
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- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Fangrui Song via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Fangrui Song via llvm-commits
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Fangrui Song via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Fangrui Song via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Fangrui Song via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Fangrui Song via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
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- [lld] [lld][ELF][test] Fix compressed-debug-level.test (PR #93264)
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- [lld] [lld][ELF][test] Fix compressed-debug-level.test (PR #93264)
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- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
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- [llvm] [ADT] Add SmallVectorImpl::append_range (PR #93384)
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- [compiler-rt] [llvm] [compiler-rt] Revise IDE folder structure (PR #89753)
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- [lld] [lld] Support thumb PLTs (PR #86223)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
Farzon Lotfi via llvm-commits
- [llvm] [x86] Add tan intrinsic part 4 (PR #90503)
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- [llvm] [InstCombine] Retain debug information on store to null instruction (PR #86105)
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- [llvm] [InstCombine] Retain debug information on store to null instruction (PR #86105)
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
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- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
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- [llvm] [VPlan] Add commutative binary OR matcher, use in transform. (PR #92539)
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- [llvm] [VPlan] Add commutative binary OR matcher, use in transform. (PR #92539)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Add commutative binary OR matcher, use in transform. (PR #92539)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Add commutative binary OR matcher, use in transform. (PR #92539)
Florian Hahn via llvm-commits
- [llvm] [LV] fix logical error in trunc cost (PR #91136)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Add commutative binary OR matcher, use in transform. (PR #92539)
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- [llvm] [LoopVectorize] Add cost of generating tail-folding mask to the loop (PR #90191)
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- [llvm] [LoopVectorize] Add cost of generating tail-folding mask to the loop (PR #90191)
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- [llvm] InstCombine: Try to use exp10 intrinsic instead of libcall (PR #92287)
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- [llvm] d108fa0 - [LAA] Add tests with invariant accesses using vector types.
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- [llvm] [LAA] Check if invariant accesses is strictly before other access. (PR #92307)
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- [llvm] [LAA] Check if invariant accesses is strictly before other access. (PR #92307)
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- [llvm] bce3680 - [LAA] Move logic to compute start and end of a pointer to helper (NFC).
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- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
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- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
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- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
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- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
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- [llvm] [LAA] Check if invariant accesses is strictly before other access. (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] 352dc7d - [LV] Propagate PredicatedBBsAfterVectorization to predecessors.
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] a56e6df - [LV] Add test for header mask and invariant compare cost-modeling.
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
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- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
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- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
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- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
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- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [llvm] ba0e871 - [ConstraintElim] Look through SExt with precond Op sge 0.
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- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
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- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
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- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
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- [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)
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- [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)
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- [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)
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- [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)
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- [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)
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- [llvm] [SCEV] Support ule/sle exit counts via widening (PR #92206)
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- [llvm] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)
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- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
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- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
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- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
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- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [llvm] [TableGen][CMake] Add missing dependency to intrinsics_gen (PR #93134)
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- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Support reduction idioms using tail folding with EVL. (PR #90184)
Florian Hahn via llvm-commits
- [llvm] [LV][NFC] precommit test for EVL transform (PR #92203)
Florian Hahn via llvm-commits
- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
Florian Hahn via llvm-commits
- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
Florian Hahn via llvm-commits
- [llvm] [LV, VPlan] Check if plan is compatible to EVL transform (PR #92092)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
Florian Hahn via llvm-commits
- [llvm] [LV] add test for #47665, #88802 (PR #91135)
Florian Hahn via llvm-commits
- [llvm] [LAA] increase test coverage in symbolic-stride (PR #92253)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Preserve flags in SCEVLoopGuardRewriter for add and mul. (PR #91472)
Florian Hahn via llvm-commits
- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve DT (and SCEV) in VPlan-native path (PR #93287)
Florian Hahn via llvm-commits
- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
Florian Hahn via llvm-commits
- [llvm] [LAA] rewrite a test to be less nonsensical (PR #93197)
Florian Hahn via llvm-commits
- [llvm] [LV] fix logical error in trunc cost (PR #91136)
Florian Hahn via llvm-commits
- [llvm] [LV] fix logical error in trunc cost (PR #91136)
Florian Hahn via llvm-commits
- [llvm] [LV] fix logical error in trunc cost (PR #91136)
Florian Hahn via llvm-commits
- [llvm] [LV] fix logical error in trunc cost (PR #91136)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)
Florian Hahn via llvm-commits
- [llvm] 8364659 - [VPlan] Remove unused Range arg from createWidenInductionRecipe (NFC).
Florian Hahn via llvm-commits
- [llvm] ac17fbc - [VPlan] Add test for printing FOR with live-out.
Florian Hahn via llvm-commits
- [llvm] [VPlan] Model FOR extract of exit value in VPlan. (PR #93395)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Model FOR resume value extraction in VPlan. (PR #93396)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Add VPIRWrapperBlock, use to model pre-preheader. (PR #93398)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Model branch cond to enter scalar epilogue in VPlan. (PR #92651)
Florian Hahn via llvm-commits
- [llvm] 686600b - [LV] Add test showing missed removal of implied predicate.
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
Florian Hahn via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Florian Mayer via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Florian Mayer via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Florian Mayer via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
Florian Mayer via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
Fred Grim via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] remove xeon phi intr (PR #92883)
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Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Freddy Ye via llvm-commits
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- [clang] [llvm] Revert "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93123)
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- [clang] [llvm] Revert "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93123)
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- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
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- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Freddy Ye via llvm-commits
- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Freddy Ye via llvm-commits
- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Freddy Ye via llvm-commits
- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Freddy Ye via llvm-commits
- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Freddy Ye via llvm-commits
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George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
- [llvm] [LoopUnroll] Ignore inlinable calls if unrolling is forced (PR #88149)
George Burgess IV via llvm-commits
- [llvm] [LoopUnroll] Ignore inlinable calls if unrolling is forced (PR #88149)
George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
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Han-Kuan Chen via llvm-commits
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Haohai Wen via llvm-commits
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Haohai Wen via llvm-commits
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Haohai Wen via llvm-commits
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- [llvm] [AArch64] Extend efficient lowering of experimental.cttz.elts (PR #92114)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Extend efficient lowering of experimental.cttz.elts (PR #92114)
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- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
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Heewon Cho via llvm-commits
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- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
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Ilia Diachkov via llvm-commits
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Ilia Diachkov via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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J. Ryan Stinnett via llvm-commits
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Jacek Caban via llvm-commits
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Jacek Caban via llvm-commits
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Jacques Pienaar via llvm-commits
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Jakub Chlanda via llvm-commits
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Jakub Chlanda via llvm-commits
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- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
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- [llvm] [symbolizer] Empty string is not an error (PR #92660)
James Henderson via llvm-commits
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- [llvm] [FileCheck] improve prefix validation (PR #92248)
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- [llvm] [FileCheck] improve prefix validation (PR #92248)
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- [llvm] [FileCheck] improve prefix validation (PR #92248)
James Henderson via llvm-commits
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James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
James Henderson via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
James Henderson via llvm-commits
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James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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- [llvm] 560c2fd - NVPTX: fix test failures under ptxas-12.0.
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Jan Patrick Lehr via llvm-commits
- [llvm] [Offload] Only initialize a plugin if it is needed (PR #92765)
Jan Patrick Lehr via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Janek van Oirschot via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Jay Foad via llvm-commits
- [llvm] [GlobalIsel][NFC] Refactor ext of trunc (PR #92533)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts (PR #92903)
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (PR #93004)
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- [llvm] 154d93b - [AMDGPU] Add a negative test for DPP combine into v_mul_lo_u32
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- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
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- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
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- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
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- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
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- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
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- [llvm] 4e0f8a4 - [AMDGPU] Fix EXPENSIVE_CHECKS failure in #89612
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- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
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- [llvm] [AMDGPU] Refactor int_amdgcn_mov_dpp8 patterns. NFC. (PR #92764)
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Johannes Doerfert via llvm-commits
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- [llvm] [Attributor][FIX] Ensure nonnull IR deduction is not optimistic (PR #93322)
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- [llvm] [Attributor][FIX] Fix NonNull deduction bug. (PR #85810)
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- [llvm] Fix i1 array global crash in NVPTXAsmPrinter. (PR #92506)
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Lawrence Benson via llvm-commits
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Lawrence Benson via llvm-commits
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Lawrence Benson via llvm-commits
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Lawrence Benson via llvm-commits
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Lawrence Benson via llvm-commits
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Lei Wang via llvm-commits
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Leon Clark via llvm-commits
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Lu Weining via llvm-commits
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Lucas Duarte Prates via llvm-commits
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Lucile Rose Nihlen via llvm-commits
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Lucile Rose Nihlen via llvm-commits
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Lucile Rose Nihlen via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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- [llvm] Add numerical sanitizer (PR #85916)
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- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
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- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Matt Arsenault via llvm-commits
- [llvm] [ValueTracking] Fix incorrect inferrence about the signbit of sqrt (PR #92510)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] InstSimplify: lookthru casts, binops in folding shuffles (PR #92668)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] HasOneUse uses (PR #92534)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors in graphics (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors in graphics (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [DivRemPairs] Pre-commit tests for PR #92627 (PR #92628)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix error in #88512. (PR #92770)
Matt Arsenault via llvm-commits
- [llvm] [DivRemPairs] Do not freeze poisons that can't be undef (PR #92627)
Matt Arsenault via llvm-commits
- [llvm] VectorCombine: add tests written for InstSimplify (PR #92776)
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- [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)
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- [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)
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- [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)
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- [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix error in #88512. (PR #92770)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Relax vector restriction for rootn libcall folds (PR #92594)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't fold rootn(x, 1) to input for strictfp functions (PR #92595)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Combine op(trunc(x), trunc(y)) -> trunc(op(x, y)) (PR #89023)
Matt Arsenault via llvm-commits
- [llvm] SimplifyLibCalls: Don't require ldexp to emit intrinsic in exp2 combine (PR #92707)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAG] Add getVPZeroExtendInReg. NFC (PR #92792)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Support tfe operand in image_atomic instructions (PR #92469)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add nowrap flags for trunc instruction (PR #85592)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Support tfe operand in image_atomic instructions (PR #92469)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Fix libcall names for exp10 on the various darwins (PR #92520)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors in graphics (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors in graphics (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (PR #92816)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't fold rootn(x, 1) to input for strictfp functions (PR #92595)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Directly emit sqrt intrinsic when folding rootn(x, 2) (PR #92598)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
Matt Arsenault via llvm-commits
- [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Matt Arsenault via llvm-commits
- [llvm] Add numerical sanitizer (PR #85916)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Directly emit sqrt intrinsic when folding rootn(x, 2) (PR #92598)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (PR #92863)
Matt Arsenault via llvm-commits
- [llvm] e96948a - AMDGPU: Fix typos in test names
Matt Arsenault via llvm-commits
- [llvm] 2bad2ee - AMDGPU: Fix testing unaligned double atomics in atomic scan tests
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Implement getRoundingControlRegisters (PR #92884)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts (PR #92903)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove #if 0 code for fences in SIInsertWaitcnts (PR #92902)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove #if 0 code for indexed resources in SIInsertWaitcnts (PR #92905)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Implement getRoundingControlRegisters (PR #92884)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (PR #92863)
Matt Arsenault via llvm-commits
- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add amdgpu.no.remote.memory when upgrading old atomic intrinsics (PR #89655)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add amdgpu.no.remote.memory when upgrading old atomic intrinsics (PR #89655)
Matt Arsenault via llvm-commits
- [llvm] InstCombine: Stop handling bitcast in PointerReplacer (PR #92937)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Support G_{U|S}{ADD|SUB}SAT (PR #92935)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Support G_{U|S}{ADD|SUB}SAT (PR #92935)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] 70fc239 - RegisterPressure: Check empty instead of size == 0
Matt Arsenault via llvm-commits
- [llvm] 3c3e71d - X86: Add regression test from issue #76416
Matt Arsenault via llvm-commits
- [llvm] 1727594 - RegisterPressure: Add parameter name comment
Matt Arsenault via llvm-commits
- [llvm] Fix vgpr live range (PR #92940)
Matt Arsenault via llvm-commits
- [llvm] InstCombine: Stop handling bitcast in PointerReplacer (PR #92937)
Matt Arsenault via llvm-commits
- [llvm] cec1eab - MachineScheduler: Add parameter name comments
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [llvm] LiveRangeEdit: Replace setIsDead with an assert (PR #92964)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Update test results to fix build (PR #92982)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Update test results to fix build (PR #92982)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][Clang] Builtin for GLOBAL_LOAD_LDS on GFX940 (PR #92962)
Matt Arsenault via llvm-commits
- [llvm] [AttributorLight] Without liveness checks, look at all functions (PR #91004)
Matt Arsenault via llvm-commits
- [llvm] [AttributorLight] Without liveness checks, look at all functions (PR #91004)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (PR #92671)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (PR #92671)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (PR #92671)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (PR #93004)
Matt Arsenault via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
Matt Arsenault via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
Matt Arsenault via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
Matt Arsenault via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
Matt Arsenault via llvm-commits
- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
Matt Arsenault via llvm-commits
- [llvm] 4351787 - AMDGPU: Fix redundant condition
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
Matt Arsenault via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
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- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [GISel][RISCV] Legalize shifts with non-trivial shamt types (PR #93019)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
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- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
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- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [GISel][RISCV] Legalize shifts with non-trivial shamt types (PR #93019)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
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- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
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- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
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- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [llvm] [GISel] Add narrowScalar/widenScalar support for `G_CONSTANT_FOLD_BARRIER` (PR #93031)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
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- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
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- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
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- [llvm] [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (PR #92671)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)
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- [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)
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- [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)
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- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
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- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
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- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
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- [llvm] InterleavedLoadCombine: Correctly query PM for TargetTransformInfo (PR #93103)
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- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
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- [llvm] InterleavedLoadCombine: Correctly query PM for TargetTransformInfo (PR #93103)
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- [llvm] InterleavedLoadCombine: Correctly query PM for TargetTransformInfo (PR #93103)
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- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
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- [llvm] [AttributorLight] Without liveness checks, look at all functions (PR #91004)
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- [llvm] [AttributorLight] Without liveness checks, look at all functions (PR #91004)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
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- [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)
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- [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)
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- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
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- [llvm] AtomicExpand: Preserve metadata when expanding partword RMW (PR #89769)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [clang] [llvm] IR: Add module level attribution language-standard (PR #93159)
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- [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
Matt Arsenault via llvm-commits
- [llvm] Attributor: Do not assume function context in AANoCapture (PR #91462)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable "amdgpu-sw-lower-lds" pass in pipeline. (PR #89206)
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- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LSV] Restrict large vectors (PR #92540)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] [ConstraintFP] Model rounding control registers for inline asm (PR #92846)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
Matt Arsenault via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
Matt Arsenault via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
Matt Arsenault via llvm-commits
- [llvm] Attributor: Do not assume function context in AANoCapture (PR #91462)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] LangRef: Rephrase fma description to avoid referring to libm (PR #92729)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU]: Fall back to default mutations when iglp is not applied (PR #93418)
Matt Arsenault via llvm-commits
- [llvm] [Nomination] Add an extra Red Hat representative to the security group (PR #92174)
Matthew Riley via llvm-commits
- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
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- [llvm] [mlir] [mlir][tblgen] Expose more of MLIRTableGen as library (PR #92709)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling Flang and running its tests on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [clang] [llvm] Disable compiling and testing Flang on Clang changes (PR #92740)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir][tblgen] Expose more of MLIRTableGen as library (PR #92709)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [MLIR][Analysis] Consolidate topological sort utilities (PR #92563)
Mehdi Amini via llvm-commits
- [llvm] Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find t… (PR #92992)
Mehdi Amini via llvm-commits
- [llvm] Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)" (PR #92992)
Mehdi Amini via llvm-commits
- [llvm] Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)" (PR #92992)
Mehdi Amini via llvm-commits
- [llvm] Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)" (PR #92992)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support reduction idioms using tail folding with EVL. (PR #90184)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support reduction idioms using tail folding with EVL. (PR #90184)
Mel Chen via llvm-commits
- [llvm] [LV][VPlan] Introduce VPIntermediateStore recipe to handle scalar stores in exit block. (PR #93148)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support reduction idioms using tail folding with EVL. (PR #90184)
Mel Chen via llvm-commits
- [llvm] [LoopCacheAnalysis] Fix loop cache cost to always round the cost up to the nearest integer number (PR #88915)
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Michael Kruse via llvm-commits
- [llvm] [LAA] Check if invariant accesses is strictly before other access. (PR #92307)
Michael Kruse via llvm-commits
- [llvm] [LAA] Check if invariant accesses is strictly before other access. (PR #92307)
Michael Kruse via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Emit __atomic_load and __atomic_compare_exchange libcalls for complex types in atomic update (PR #92364)
Michael Kruse via llvm-commits
- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
Michael Kruse via llvm-commits
- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
Michael Kruse via llvm-commits
- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
Michael Kruse via llvm-commits
- [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)
Michael Kruse via llvm-commits
- [llvm] [llvm] Revise IDE folder structure (PR #89741)
Michael Kruse via llvm-commits
- [clang] [llvm] [openmp] [Clang][OpenMP] Add reverse directive (PR #92916)
Michael Kruse via llvm-commits
- [flang] [llvm] [mlir] [Flang]Fix for changed code at the end of AllocaIP. (PR #92430)
Michael Kruse via llvm-commits
- [clang] [llvm] [openmp] [Clang][OpenMP] Add reverse directive (PR #92916)
Michael Kruse via llvm-commits
- [llvm] [llvm] Revise IDE folder structure (PR #89741)
Michael Kruse via llvm-commits
- [llvm] [BOLT] Revise IDE folder structure (PR #89742)
Michael Kruse via llvm-commits
- [llvm] [BOLT] Revise IDE folder structure (PR #89742)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [clang-tools-extra] [llvm] [clang-tools-extra] Revise IDE folder structure (PR #89744)
Michael Kruse via llvm-commits
- [llvm] [BOLT] Revise IDE folder structure (PR #89742)
Michael Kruse via llvm-commits
- [clang] [llvm] [clang] Revise IDE folder structure (PR #89743)
Michael Kruse via llvm-commits
- [clang] [llvm] [clang] Revise IDE folder structure (PR #89743)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [flang] [llvm] [flang] Revise IDE folder structure (PR #89745)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [llvm] [mlir] [mlir] Revise IDE folder structure (PR #89749)
Michael Kruse via llvm-commits
- [llvm] [mlir] [mlir] Revise IDE folder structure (PR #89749)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [llvm] [polly] [polly] Revise IDE folder structure (PR #89752)
Michael Kruse via llvm-commits
- [llvm] [polly] [polly] Revise IDE folder structure (PR #89752)
Michael Kruse via llvm-commits
- [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [pstl] Revise IDE folder structure (PR #89755)
Michael Kruse via llvm-commits
- [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [pstl] Revise IDE folder structure (PR #89755)
Michael Kruse via llvm-commits
- [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [pstl] Revise IDE folder structure (PR #89755)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [flang] [libc] [libclc] [libcxx] [libcxxabi] [libunwind] [lld] [lldb] [llvm] [mlir] [openmp] [polly] [pstl] Update IDE Folders (PR #89153)
Michael Kruse via llvm-commits
- [clang-tools-extra] [llvm] [clang-tools-extra] Revise IDE folder structure (PR #89744)
Michael Kruse via llvm-commits
- [clang-tools-extra] [llvm] [clang-tools-extra] Revise IDE folder structure (PR #89744)
Michael Kruse via llvm-commits
- [clang-tools-extra] [llvm] [clang-tools-extra] Revise IDE folder structure (PR #89744)
Michael Kruse via llvm-commits
- [clang-tools-extra] [llvm] [clang-tools-extra] Revise IDE folder structure (PR #89744)
Michael Kruse via llvm-commits
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Michael Kruse via llvm-commits
- [llvm] dae55c8 - [M68k] Fix compilation pipeline check
Michael Liao via llvm-commits
- [llvm] [GISel][RISCV] Add legalizer & selector support for G_FREEZE. (PR #92744)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)
Michael Maitland via llvm-commits
- [llvm] [MachineScheduler] Experimental option to partially disable pre-ra scheduling. (PR #90181)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
- [llvm] [MachineScheduler] Experimental option to partially disable pre-ra scheduling. (PR #90181)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [GISel][RISCV] Add irtranslator/legalizer/selector support for G_FREEZE. (PR #92744)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Michael Maitland via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Michael Maitland via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Michael Maitland via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Michael Maitland via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Michael Maitland via llvm-commits
- [llvm] [MISched][NFC] Add documentation comment in pickNode for ReadyQueue maintenence (PR #92976)
Michael Maitland via llvm-commits
- [llvm] [MISched][NFC] Add documentation comment in pickNode for ReadyQueue maintenence (PR #92976)
Michael Maitland via llvm-commits
- [llvm] [MISched][NFC] Add documentation comment in pickNode for ReadyQueue maintenence (PR #92976)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Michael Maitland via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Michael Maitland via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Michael Maitland via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
- [llvm] [MachineScheduler][ScheduleDAG] Add ability to bias scheduling by longest paths (PR #93223)
Michael Maitland via llvm-commits
- [llvm] 998fc2c - [RISCV] Rename from VPseudoVGTR_VV_EEW to VPseudoVGTR_EI16_VV. NFC.
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Michael Maitland via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Michael Maitland via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Michael Maitland via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (PR #92781)
Michael Maitland via llvm-commits
- [llvm] [SPIR-V] Fix type assig. for builtin nulls, remove TrackConstants (PR #92787)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] reqd_work_group_size and work_group_size_hint metadata are correctly converted to the LocalSize and LocalSizeHint execution mode (PR #92552)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Ensure that internal intrinsic functions "ptrcast" for PHI's operand are inserted at the correct positions (PR #92536)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Inline assembly support (PR #93164)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Update docs to describe support of SPV_KHR_shader_clock (PR #93168)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (PR #93292)
Michal Paszkowski via llvm-commits
- [llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)
Michal Terepeta via llvm-commits
- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
Miguel Saldivar via llvm-commits
- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
Miguel Saldivar via llvm-commits
- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
Miguel Saldivar via llvm-commits
- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
Miguel Saldivar via llvm-commits
- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
Miguel Saldivar via llvm-commits
- [llvm] [bazel] add bolt address translation header to Passes (PR #93014)
Mikhail Goncharov via llvm-commits
- [llvm] [bazel] add bolt address translation header to Passes (PR #93014)
Mikhail Goncharov via llvm-commits
- [llvm] [BOLT] Report adjusted program stats from perf2bolt in BAT mode (PR #91683)
Mikhail Goncharov via llvm-commits
- [llvm] [bazel] add bolt address translation header to Passes (PR #93014)
Mikhail Goncharov via llvm-commits
- [llvm] [bazel] add bolt address translation header to Passes (PR #93014)
Mikhail Goncharov via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (PR #92605)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (PR #92605)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (PR #92605)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (PR #92605)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Changing non-standard CHECK in tests to more compliant way (PR #93222)
Min-Yih Hsu via llvm-commits
- [llvm] Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (PR #92718)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][Bitcode] Generate import type in bitcode (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfWriter]Wrap vtable writes in a method. (PR #93081)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfWriter]Wrap vtable writes in a method. (PR #93081)
Mingming Liu via llvm-commits
- [llvm] [ProfileData] Use default member initializations (NFC) (PR #93120)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfWriter]Wrap vtable writes in a method. (PR #93081)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProfWriter]Wrap vtable writes in a method. (PR #93081)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProf]Simplify instrumentation profile reader and writer code (PR #93346)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProf]Simplify instrumentation profile reader and writer code (PR #93346)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProf]Simplify instrumentation profile reader and writer code (PR #93346)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstrProf]Simplify instrumentation profile reader and writer code (PR #93346)
Mingming Liu via llvm-commits
- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
Mingming Liu via llvm-commits
- [clang] [compiler-rt] [llvm] [IRPGO] [Draft] Import vtable definitions in ThinTLO and use more efficient vtable comparison sequence with cost-benefit analysis (PR #69141)
Mingming Liu via llvm-commits
- [clang] [compiler-rt] [llvm] [IRPGO] [Draft] Import vtable definitions in ThinTLO and use more efficient vtable comparison sequence with cost-benefit analysis (PR #69141)
Mingming Liu via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Mircea Trofin via llvm-commits
- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
Mirko Brkušanin via llvm-commits
- [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)
Mital Ashok via llvm-commits
- [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)
Mital Ashok via llvm-commits
- [clang] [llvm] [Clang] Fix definition of layout-compatible to ignore empty classes (PR #92103)
Mital Ashok via llvm-commits
- [clang] [llvm] [AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (PR #91606)
Momchil Velikov via llvm-commits
- [clang] [llvm] [CLANG][LLVM][AArch64]SME2.1 intrinsics for MOVAZ tile to 2/4 vectors (PR #88710)
Momchil Velikov via llvm-commits
- [clang] [llvm] [CLANG][LLVM][AArch64]SME2.1 intrinsics for MOVAZ tile to 2/4 vectors (PR #88710)
Momchil Velikov via llvm-commits
- [clang] [llvm] [CLANG][LLVM][AArch64]SME2.1 intrinsics for MOVAZ tile to 2/4 vectors (PR #88710)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)
Momchil Velikov via llvm-commits
- [llvm] [LLVM][AARCH64]Replace +sme2p1+smef16f16 by +smef16f16 (PR #88860)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add patterns for conversions using fixed-point scvtf (PR #92922)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Lower extending sitofp using tbl (PR #92528)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Refactor creation of a shuffle mask for TBL (NFC) (PR #92529)
Momchil Velikov via llvm-commits
- [llvm] [LLVM][AARCH64]Replace +sme2p1+smef16f16 by +smef16f16 (PR #88860)
Momchil Velikov via llvm-commits
- [llvm] 1ef081b - movimm-expand-ldst.mir (d3d6565c2453) requires asserts
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
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- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Natalie Chouinard via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Natalie Chouinard via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Natalie Chouinard via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Natalie Chouinard via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
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- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Add pass to merge convergence region exit targets (PR #92531)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (PR #93292)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Update docs to describe support of SPV_KHR_shader_clock (PR #93168)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
Nick Desaulniers via llvm-commits
- [clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
Nicolai Hähnle via llvm-commits
- [llvm] Fix update-test-checks.py on Python 3.6 (PR #93116)
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- [llvm] update_llc_test_checks: better support for non-llc tools (PR #93135)
Nicolai Hähnle via llvm-commits
- [llvm] [DebugCounter] Add support for non-continous ranges. (PR #89470)
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- [llvm] [ValueTracking] Fix "getOperand() out of range!" assertion crash (PR #87482)
Nikita Popov via llvm-commits
- [clang] [compiler-rt] [llvm] [ConstantFolding] Canonicalize constexpr GEPs to i8 (PR #89872)
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- [clang] [llvm] [MC] Make UseAssemblerInfoForParsing mostly true (PR #91082)
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- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
Nikita Popov via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
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- [clang] [compiler-rt] [llvm] [ConstantFolding] Canonicalize constexpr GEPs to i8 (PR #89872)
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
- [llvm] InstSimplify: lookthru casts, binops in folding shuffles (PR #92668)
Nikita Popov via llvm-commits
- [llvm] InstSimplify: lookthru casts, binops in folding shuffles (PR #92668)
Nikita Popov via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
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- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
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- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
Nikita Popov via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
Nikita Popov via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
Nikita Popov via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Fix incorrect inferrence about the signbit of sqrt (PR #92510)
Nikita Popov via llvm-commits
- [llvm] InstSimplify: lookthru casts, binops in folding shuffles (PR #92668)
Nikita Popov via llvm-commits
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- [clang] [llvm] [MC] Make UseAssemblerInfoForParsing mostly true (PR #91082)
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- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Recognize `X op (X != 0)` as non-zero (PR #88579)
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- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
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- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
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- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
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- [llvm] ac7c482 - [MemCpyOpt] Add extra debug output (NFC)
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- [llvm] [SeparateConstOffsetFromGEP] Support multiple indices in reorderGEP (PR #92339)
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- [llvm] [SeparateConstOffsetFromGEP] Support multiple indices in reorderGEP (PR #92339)
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- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
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- [llvm] [SROA] Use stable sort for slices to avoid non-determinism (PR #91609)
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- [llvm] InstSimplify: strip bad TODO (NFC) (PR #92754)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
Nikita Popov via llvm-commits
- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
Nikita Popov via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support multiple indices in reorderGEP (PR #92339)
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- [clang] [llvm] [IR] Add getelementptr nusw and nuw flags (PR #90824)
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- [llvm] d094bb6 - [InstSimplify] Avoid use of ConstantExpr::getICmp() (NFC)
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- [llvm] 7efafb0 - [IRBuilder] Migrate fcmp to folding API
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- [llvm] 74f1e29 - [Tests] Regenerate test checks (NFC)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
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- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
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- [llvm] f78b1a4 - [InstCombine] Add test for #92887 (NFC)
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- [llvm] 263224e - [InstCombine] Require poison operand in canEvaluateShuffled transform
Nikita Popov via llvm-commits
- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
Nikita Popov via llvm-commits
- [llvm] 557a0be - [InstCombine] Add test for splat shuffle miscompile (NFC)
Nikita Popov via llvm-commits
- [llvm] ecd269e - [InstCombine] Check for poison instead of undef in splat shuffle fold
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- [llvm] b8e3d80 - [InstCombine] Add test for incorrect shuffle of unop transform (NFC)
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- [llvm] 8f1c984 - [InstCombine] Check for poison instead of undef in shuffle of unop transform
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- [llvm] fbc798e - [InstCombine] Use m_Poison instead of m_Undef (NFCI)
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- [llvm] d0e0205 - [InstCombine] Check for poison instead of undef in single shuffle fold
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- [llvm] 8d5b7d4 - [InstCombine] Use m_Poison() instead of m_Undef() (NFCI)
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- [llvm] 530d4c9 - [InstCombine] Use m_Poison() instead of m_Undef() (NFCI)
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- [llvm] InstCombine: Stop handling bitcast in PointerReplacer (PR #92937)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [llvm] [SCEV] Support ule/sle exit counts via widening (PR #92206)
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [llvm] 1cf75cc - Revert "[AMDGPU] Update test results to fix build (#92982)"
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
Nikita Popov via llvm-commits
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- [llvm] [LAA] Check accesses don't overlap early to determine NoDep (PR #92307)
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- [clang] [llvm] [IR] Add getelementptr nusw and nuw flags (PR #90824)
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- [llvm] [IR] Remove support for icmp and fcmp constant expressions (PR #93038)
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- [llvm] Add `AddNull` argument to `CreateGlobalString`. (PR #93036)
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- [llvm] Add `AddNull` argument to `CreateGlobalString`. (PR #93036)
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- [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)
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Nikita Popov via llvm-commits
- [llvm] [WindowsManifestMerger] Remove deprecated call to xmlKeepBlanksDefault (PR #93139)
Nikita Popov via llvm-commits
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
Nikita Popov via llvm-commits
- [llvm] [WindowsManifestMerger] Remove deprecated call to xmlKeepBlanksDefault (PR #93139)
Nikita Popov via llvm-commits
- [llvm] [LICM][MustExec] Make must-exec logic for IV condition commutative (PR #93150)
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- [llvm] 5e06050 - [SCCP] Add tests for #93096 (NFC)
Nikita Popov via llvm-commits
- [llvm] [LoopPeel] Support min/max intrinsics in loop peeling (PR #93162)
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- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [llvm] [LICM] Invalidate cached SCEV results after reassociation (PR #92655)
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- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
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- [llvm] [Offload] Fix enabling plugins on unsupported platforms (PR #93186)
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- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [SCCP] Don't allow undef ranges when performing operations (PR #93163)
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- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [llvm] 1579e9c - Revert "Run ObjCContractPass in Default Codegen Pipeline (#92331)"
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- [clang] [lld] [llvm] Run ObjCContractPass in Default Codegen Pipeline (PR #92331)
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- [llvm] [LAA] refactor program logic (NFC) (PR #92101)
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- [llvm] [Attributor] Fix Load/Store offsets in case of multiple access bins when an allocation size is changed. (PR #72029)
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- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
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- [llvm] [LAA] rewrite a test to be less nonsensical (PR #93197)
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- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
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- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Nikita Popov via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
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- [llvm] [llvm] Improve the RelLookupTableConverter pass (PR #93355)
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- [llvm] [InstCombine] Make the `(icmp eq/ne (and X, Y), X)` canonicalization work for non-const operands (PR #84688)
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- [llvm] [InstCombine] Make the `(icmp eq/ne (and X, Y), X)` canonicalization work for non-const operands (PR #84688)
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- [llvm] Intrinsic: Fix minnum and introduce minimumnum (PR #93373)
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- [llvm] [LICM][MustExec] Make must-exec logic for IV condition commutative (PR #93150)
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- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
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- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
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- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
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- [llvm] [LICM][MustExec] Make must-exec logic for IV condition commutative (PR #93150)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] [LICM][MustExec] Make must-exec logic for IV condition commutative (PR #93150)
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- [llvm] [ADT] Add SmallVectorImpl::append_range (PR #93384)
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- [llvm] [ADT] Add SmallVectorImpl::append_range (PR #93384)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [LICM][MustExec] Make must-exec logic for IV condition commutative (PR #93150)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
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- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] 2be8bea - Revert "[InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (#91386)"
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- [llvm] af16d49 - Revert "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)"
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- [llvm] 9378d74 - Revert "[ARM][NFC] Use addLiveIns method instead of manually adding live-ins (#87560)"
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- [llvm] 83370e4 - Revert "[InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (#92907)"
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- [llvm] 15c8ba4 - Revert "[Support] Refactor getN1Bits so it does not work around any g++ bug (#78933)"
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- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
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- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
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Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an append() (PR #71719)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
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- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (PR #92816)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (PR #92839)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Return true for opaque constants in hasAndNotCompare. (PR #92944)
Simon Pilgrim via llvm-commits
- [llvm] 1b06643 - [X86] stack-folding-fp-avx512fp16.ll - remove broken CHECK-LABEl prefix lines
Simon Pilgrim via llvm-commits
- [llvm] 6381cfe - [X86] stack-frame-layout-remarks.ll - fix BOTH-Next -> BOTH-NEXT typo
Simon Pilgrim via llvm-commits
- [llvm] 0873b4c - [LoopVectorize] optimal-epilog-vectorization-profitability.ll - fix LABLE -> LABEL typo
Simon Pilgrim via llvm-commits
- [llvm] [X86] Remove unused MachineLoopInfo from X86FixupBWInsts. NFC (PR #92984)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity (PR #92696)
Simon Pilgrim via llvm-commits
- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
Simon Pilgrim via llvm-commits
- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
Simon Pilgrim via llvm-commits
- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
Simon Pilgrim via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
Simon Pilgrim via llvm-commits
- [llvm] bbc4c2e - [DAG] SimplifyDemandedBits - ensure we have simplified the shift operands before folding to AVG
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] ComputeNumSignBits - add AVGCEILS/AVGFLOORS handling (PR #93021)
Simon Pilgrim via llvm-commits
- [llvm] cdcd653 - [X86] combineBitcast - merge isa<>/cast<> into single dyn_cast<> call. NFC.
Simon Pilgrim via llvm-commits
- [llvm] [DAG] ComputeNumSignBits - add AVGCEILS/AVGFLOORS handling (PR #93021)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [SDAG] Improve `SimplifyDemandedBits` for mul (PR #90034)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
Simon Pilgrim via llvm-commits
- [llvm] 85b9826 - [AMDGPU] Regenerate sad.ll test checks
Simon Pilgrim via llvm-commits
- [llvm] [WIP][DAG] Add legalization handling for ABDS/ABDU (PR #92576)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [clang] [llvm] Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93136)
Simon Pilgrim via llvm-commits
- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] 5064ff9 - [X86] Lower*EXTEND - pull out repeated SDLoc calls. NFC.
Simon Pilgrim via llvm-commits
- [llvm] [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (PR #93221)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Improve/fix extracts calculations for non-power-of-2 elements. (PR #93213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add constant splat handling for shuffleToIdentity (PR #92797)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity (PR #92696)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity (PR #92696)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
Simon Pilgrim via llvm-commits
- [llvm] fcd086c - [X86] canCreateUndefOrPoisonForTargetNode - SSE vector shifts handle out of bounds shift amounts
Simon Pilgrim via llvm-commits
- [llvm] 1430405 - [X86] funnel-shifts.ll - add VBMI2 and non-uniform shift amounts test coverage
Simon Pilgrim via llvm-commits
- [llvm] 729fdb6 - [DAG] visitFunnelShift - pull out repeated SDLoc.
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
- [llvm] abc4c21 - [X86] Add test case for #93000
Simon Pilgrim via llvm-commits
- [llvm] 89172e9 - [X86] combineBitcastToBoolVector - add XOR + Constant handling, match existing BITCASTs and limit recursion depth
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
Simon Pilgrim via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sjoerd Meijer via llvm-commits
- [llvm] [LV] optimize VF for low TC, when tail-folding (PR #91253)
Sjoerd Meijer via llvm-commits
- [llvm] [MemProf] Fix tailcall discovery checking for multiple callee chains (PR #92632)
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Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Fix tailcall discovery checking for multiple callee chains (PR #92632)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Use std::move in toMemProfRecord (PR #93133)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Refactor getMemProfRecord (NFC) (PR #93138)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Refactor getMemProfRecord (NFC) (PR #93138)
Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sotiris Apostolakis via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sotiris Apostolakis via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sotiris Apostolakis via llvm-commits
- [llvm] [SelectOpt] Add handling for not conditions. (PR #92517)
Sotiris Apostolakis via llvm-commits
- [llvm] AMDGPU: Relax vector restriction for rootn libcall folds (PR #92594)
Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Refactor int_amdgcn_mov_dpp8 patterns. NFC. (PR #92764)
Stanislav Mekhanoshin via llvm-commits
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- [llvm] AMDGPU: Implement getRoundingControlRegisters (PR #92884)
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- [clang] [llvm] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on GFX940 (PR #92962)
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Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [RuntimeDyldChecker][AArch32] Add a PC offset to next_PC for ARM targets (PR #91746)
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [flang] [lldb] [llvm] [flang] [lldb] [llvm] Fix 'destory' comment typos [NFC] (PR #93260)
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- [flang] [lldb] [llvm] [flang] [lldb] [llvm] Fix 'destory' comment typos [NFC] (PR #93260)
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- [llvm] [RemoveDIs] Load into new debug info format by default in LLVM (PR #89799)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Load into new debug info format by default in LLVM (PR #89799)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Load into new debug info format by default in LLVM (PR #89799)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
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- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
Stephen Tozer via llvm-commits
- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
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- [clang] [lld] [llvm] Run ObjCContractPass in Distributed Thin-LTO Pipeline (PR #92331)
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- [clang] [llvm] [Darwin][IR] Don't error on target_variant mismatch when linking IR (PR #92297)
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- [clang] [llvm] [Darwin][IR] Don't error on target_variant mismatch when linking IR (PR #92297)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
Sven van Haastregt via llvm-commits
- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
Sven van Haastregt via llvm-commits
- [llvm] [SPIR-V] Update docs to describe support of SPV_KHR_shader_clock (PR #93168)
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- [llvm] [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (PR #93292)
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- [llvm] [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (PR #93292)
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- [llvm] [MemProf] Fix tailcall discovery checking for multiple callee chains (PR #92632)
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Teresa Johnson via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
Teresa Johnson via llvm-commits
- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
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- [llvm] Unittests and usability for BitstreamWriter incremental flushing (PR #92983)
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- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
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- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
Thomas Fransham via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
Thomas Fransham via llvm-commits
- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
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- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
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- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
Thomas Fransham via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #93072)
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- [llvm] Add `AddNull` argument to `CreateGlobalString`. (PR #93036)
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- [llvm] Add `AddNull` argument to `CreateGlobalString`. (PR #93036)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
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- [llvm] [GlobalIsel] Combine integers (PR #92879)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine G_ADD and G_SUB (PR #92879)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
Thorsten Schütt via llvm-commits
- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
Thorsten Schütt via llvm-commits
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- [llvm] [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (PR #92753)
Yingwei Zheng via llvm-commits
- [llvm] [SDAG] Fix type checks in `ShrinkDemandedOp` to avoid creating invalid truncates (PR #92730)
Yingwei Zheng via llvm-commits
- [llvm] [SDAG] Fix type checks in `ShrinkDemandedOp` to avoid creating invalid truncates (PR #92730)
Yingwei Zheng via llvm-commits
- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
Yingwei Zheng via llvm-commits
- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
Yingwei Zheng via llvm-commits
- [llvm] [GISel] Add narrowScalar/widenScalar support for `G_CONSTANT_FOLD_BARRIER` (PR #93031)
Yingwei Zheng via llvm-commits
- [llvm] [SDAG] Improve `SimplifyDemandedBits` for mul (PR #90034)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix null pointer dereference in `foldCmpLoadFromIndexedGlobal` (PR #93050)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix null pointer dereference in `foldCmpLoadFromIndexedGlobal` (PR #93050)
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- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
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- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
Yingwei Zheng via llvm-commits
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- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
Yingwei Zheng via llvm-commits
- [llvm] efficient implementation of MachineOutliner::findCandidates() (PR #90258)
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- [llvm] [MIPS] match llvm.{min, max}num with {min, max}.fmt for R6 (PR #89021)
YunQiang Su via llvm-commits
- [llvm] Revert "[MIPS] match llvm.{min, max}num with {min, max}.fmt for R6" (PR #93035)
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- [llvm] Revert "[MIPS] match llvm.{min, max}num with {min, max}.fmt for R6" (PR #93035)
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- [llvm] Revert "[MIPS] match llvm.{min, max}num with {min, max}.fmt for R6" (PR #93035)
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YunQiang Su via llvm-commits
- [llvm] Intrinsic: Fix minnum and introduce minimumnum (PR #93373)
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Yuxuan Chen via llvm-commits
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Yuxuan Chen via llvm-commits
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- [llvm] [Coroutines][NFC] Remove @llvm.coro.id.async intrinsics from CoroElide (PR #92956)
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Yuxuan Chen via llvm-commits
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- [llvm] [Coroutines] Make CoroElide actually work for (trivial) C++ coroutines (PR #92969)
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Zaara Syeda via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
Zaara Syeda via llvm-commits
- [llvm] [PowerPC] Fix assembler error with toc-data and data-sections (PR #91976)
Zaara Syeda via llvm-commits
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Zhaoshi Zheng via llvm-commits
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Zhaoshi Zheng via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
- [llvm] shawbyoung/improving bolt stale matching (PR #93078)
shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
- [llvm] [BOLT][NFC] Remove mutable from BB:LayoutIndex (PR #93224)
shaw young via llvm-commits
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shaw young via llvm-commits
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shaw young via llvm-commits
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- [llvm] c2f92a3 - [DebugInfo][NaryReassociate] Fix missing debug location updates (#92545)
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- [llvm] [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (PR #92768)
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- [llvm] [AMDGPU] Fix error in #88512. (PR #92770)
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- [llvm] [SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (PR #92771)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
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- [llvm] 8b22bb8 - [DivRemPairs] Do not freeze poisons that can't be undef (#92627)
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- [llvm] VectorCombine: add tests written for InstSimplify (PR #92776)
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- [llvm] e33db24 - Reland "[ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option" (#92718)
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- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
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- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
via llvm-commits
- [llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] 9def85f - [revert_checker] replace Phabricator URIs with GitHub URIs (#92102)
via llvm-commits
- [llvm] 586ecd7 - AMDGPU: Relax vector restriction for rootn libcall folds (#92594)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
via llvm-commits
- [llvm] [Offload] libomptarget force dlopen vendor libraries by default. (PR #92788)
via llvm-commits
- [llvm] [SPIR-V] Fix type assig. for builtin nulls, remove TrackConstants (PR #92787)
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- [llvm] [SPIR-V] Fix type assig. for builtin nulls, remove TrackConstants (PR #92787)
via llvm-commits
- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] 0047df9 - [SPIR-V] reqd_work_group_size and work_group_size_hint metadata are correctly converted to the LocalSize and LocalSizeHint execution mode (#92552)
via llvm-commits
- [clang] [llvm] Conditionalize use of POSIX features missing on WASI/WebAssembly (PR #92677)
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- [llvm] [mlir] [openmp] fix bazel build (PR #92790)
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- [llvm] 50be0b1 - [SPIR-V] Ensure that internal intrinsic functions "ptrcast" for PHI's operand are inserted at the correct positions (#92536)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [SelectionDAG] Add getVPZeroExtendInReg. NFC (PR #92792)
via llvm-commits
- [llvm] [BPF] report `Invalid usage of the XADD return value"` elegantly (PR #92742)
via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
via llvm-commits
- [llvm] [BPF] report `Invalid usage of the XADD return value"` elegantly (PR #92742)
via llvm-commits
- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
via llvm-commits
- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
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- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [VectorCombine] Add constant splat handling for shuffleToIdentity (PR #92797)
via llvm-commits
- [llvm] c648663 - [BPF] report `Invalid usage of the XADD return value"` elegantly (#92742)
via llvm-commits
- [llvm] 549fdda - [AMDGPU] Refactor int_amdgcn_mov_dpp8 patterns. NFC. (#92764)
via llvm-commits
- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
via llvm-commits
- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [llvm] [LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (PR #92799)
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- [llvm] [AMDGPU] Strengthen preload intrinsics to noundef and nonnull (PR #92801)
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- [llvm] [llvm-driver] Add driver aliases for c++filt and gcov-tool (PR #92803)
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- [clang] [llvm] [AArch64] set AppleA14 architecture version to v8.4-a (PR #92600)
via llvm-commits
- [llvm] 1eb7f05 - CodeGen: Fix libcall names for exp10 on the various darwins (#92520)
via llvm-commits
- [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)
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- [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)
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- [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)
via llvm-commits
- [llvm] [AMDGPU] Change control flow intrinsic lowering making the wave to re… (PR #86805)
via llvm-commits
- [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)
via llvm-commits
- [llvm] [AMDGPU] Change control flow intrinsic lowering making the wave to re… (PR #86805)
via llvm-commits
- [llvm] [DebugCounter] Add support for non-continous ranges. (PR #89470)
via llvm-commits
- [llvm] e1c06c3 - [AMDGPU] Fix error in #88512. (#92770)
via llvm-commits
- [llvm] [BOLT] Heatmap fix on large binaries and printing mappings (PR #92815)
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- [llvm] [BOLT] Heatmap fix on large binaries and printing mappings (PR #92815)
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- [llvm] [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (PR #92816)
via llvm-commits
- [llvm] c1d5cc9 - [LangRef] Try to formalize the definition of "odr" in LLVM IR. (#92619)
via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
via llvm-commits
- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
via llvm-commits
- [llvm] 3cb1fe6 - AMDGPU: Don't fold rootn(x, 1) to input for strictfp functions (#92595)
via llvm-commits
- [llvm] [ValueTracking] Recognize `X op (X != 0)` as non-zero (PR #88579)
via llvm-commits
- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [BPF] report `Invalid usage of the XADD return value"` elegantly (PR #92742)
via llvm-commits
- [lld] [lld][NFC] Precommit test for ld -r links FatLTO PIC objects (PR #92817)
via llvm-commits
- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [llvm][ELF] Correctly set the .llvm.lto section type (PR #92820)
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- [llvm] [symbolizer] Empty string is not an error (PR #92660)
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [llvm][ELF] Correctly set the .llvm.lto section type (PR #92820)
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] Allow PTO to be modified in PassBuilder (PR #92821)
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- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (58939) (PR #92823)
via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (https://github.com/llvm/llvm-project/issues/58939) (PR #92823)
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- [llvm] Fix issue with running the same PassManager twice (https://github.com/llvm/llvm-project/issues/58939) (PR #92823)
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- [llvm] Fix issue with running the same PassManager twice (PR #92823)
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- [llvm] Fix issue with running the same PassManager twice (PR #92823)
via llvm-commits
- [compiler-rt] [msan] Dynamically grow kNumStackOriginDescrs (PR #92826)
via llvm-commits
- [llvm] 7ecdf62 - [MCA] use std::function instead of function_ref when storing (#91039)
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- [clang] [llvm] [CodeGen][AArch64] Added -mno-va-float to skip FP save in variadic functions (PR #92827)
via llvm-commits
- [clang] [llvm] [CodeGen][AArch64] Added -mno-va-float to skip FP save in variadic functions (PR #92827)
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- [clang] [llvm] [CodeGen][AArch64] Added -mno-va-float to skip FP save in variadic functions (PR #92827)
via llvm-commits
- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
via llvm-commits
- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
via llvm-commits
- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
via llvm-commits
- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
via llvm-commits
- [llvm] Handle backedge-count logic for std::reverse like loops (PR #92560)
via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
via llvm-commits
- [llvm] workflows: Add a job for auditing release assets (PR #92829)
via llvm-commits
- [llvm] 110f6a7 - [SelectionDAG] Add getVPZeroExtendInReg. NFC (#92792)
via llvm-commits
- [llvm] 8018e4c - [LegalizeTypes] Use SelectionDAG::SplitVector to simplify some code. NFC (#92816)
via llvm-commits
- [llvm] [llvm-profgen] Add support for Linux kenrel profile (PR #92831)
via llvm-commits
- [llvm] [llvm-profgen] Add support for Linux kenrel profile (PR #92831)
via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
via llvm-commits
- [llvm] [llvm-readobj] Fixes malformed json on JSON printed corefiles (PR #92835)
via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
via llvm-commits
- [llvm] [InstCombine] Try the flipped strictness of predicate in `foldICmpShlConstant` (PR #92773)
via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
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- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
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- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
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- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
via llvm-commits
- [llvm] [ValueTracking][X86] Compute KnownBits for phadd/phsub (PR #92429)
via llvm-commits
- [llvm] Fix issue with running the same PassManager twice (PR #92823)
via llvm-commits
- [compiler-rt] [msan] Increase kNumStackOriginDescrs constant (PR #92838)
via llvm-commits
- [llvm] 7064e4b - [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (#92605)
via llvm-commits
- [llvm] [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (PR #92839)
via llvm-commits
- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
via llvm-commits
- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
via llvm-commits
- [llvm] 45968da - [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (#91697)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [clang] [llvm] [mlir] Use StringRef::find_first_of(char), etc (NFC) (PR #92841)
via llvm-commits
- [clang] [llvm] [mlir] Use StringRef::find_first_of(char), etc (NFC) (PR #92841)
via llvm-commits
- [llvm] [BOLT] Use StringRef::contains (NFC) (PR #92842)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_BUILD_VECTOR and G_CONSTANT_POOL (PR #92844)
via llvm-commits
- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
via llvm-commits
- [llvm] [X86][ConstraintFP] Model rounding control registers for inline asm (PR #92846)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
via llvm-commits
- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
via llvm-commits
- [clang] [llvm] [IPO] Optimise variadic functions (PR #92850)
via llvm-commits
- [llvm] [MCA] Parameterize variant scheduling classes by explicit variable (PR #92849)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [clang] [llvm] [IPO] Optimise variadic functions (PR #92850)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [SampleFDO] Stale profile renaming matching (PR #92151)
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- [llvm] [SampleFDO] Stale profile renaming matching (PR #92151)
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- [llvm] [SampleFDO] Stale profile renaming matching (PR #92151)
via llvm-commits
- [llvm] [SampleFDO] Stale profile renaming matching (PR #92151)
via llvm-commits
- [llvm] [ValueTracking] Recognize `X op (X != 0)` as non-zero (PR #88579)
via llvm-commits
- [flang] [llvm] [mlir] [OpenMPIRBuilder] Emit __atomic_load and __atomic_compare_exchange libcalls for complex types in atomic update (PR #92364)
via llvm-commits
- [llvm] 8be079c - [RISCV] Bump Zaamo and Zalrsc to version 1.0 (#91556)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
via llvm-commits
- [llvm] b4492c9 - [RISCV] Use an enum for demanded LMUL in RISCVInsertVSETVLI. NFC (#92513)
via llvm-commits
- [llvm] [AMDGPU] HasOneUse uses (PR #92534)
via llvm-commits
- [llvm] [AMDGPU] HasOneUse uses (PR #92534)
via llvm-commits
- [clang] [llvm] [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (PR #92856)
via llvm-commits
- [llvm] [DebugInfo][GVNSink] Merging debug locations of sinked instructions (PR #92859)
via llvm-commits
- [llvm] [RISCV] Unify getDemanded between forward and backwards passes in RISCVInsertVSETVLI (PR #92860)
via llvm-commits
- [llvm] e411c88 - Use StringRef::find_first_of(char), etc (NFC) (#92841)
via llvm-commits
- [llvm] 66b76fa - AMDGPU: Directly emit sqrt intrinsic when folding rootn(x, 2) (#92598)
via llvm-commits
- [llvm] e3ffc4b - [RISCV] Unify getDemanded between forward and backwards passes in RISCVInsertVSETVLI (#92860)
via llvm-commits
- [llvm] AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (PR #92863)
via llvm-commits
- [llvm] Documentation: Fix C++ examples in MemorySSA documentation (PR #92802)
via llvm-commits
- [llvm] 50dbbe5 - [SROA] Use stable sort for slices to avoid non-determinism (#91609)
via llvm-commits
- [llvm] [SROA] Use stable sort for slices to avoid non-determinism (PR #91609)
via llvm-commits
- [llvm] 6246b49 - [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (#92839)
via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
via llvm-commits
- [llvm] 2631531 - [InstCombine] Removing the combine of fmuladd with fast flag
via llvm-commits
- [llvm] f2e787e - [InstCombine] Add some tests with reduced flag sets, NFC
via llvm-commits
- [llvm] [InstCombine] Removing the combine of fmuladd with fast flag (PR #90434)
via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
via llvm-commits
- [llvm] 9c78481 - [SeparateConstOffsetFromGEP] Support multiple indices in reorderGEP (#92339)
via llvm-commits
- [llvm] 675e7bd - [RISCV] Support postRA vsetvl insertion pass (#70549)
via llvm-commits
- [llvm] 56a1f0a - Documentation: Fix C++ examples in MemorySSA documentation (#92802)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `CNFFormula` externally accessible. (PR #92401)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `CNFFormula` externally accessible. (PR #92401)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `CNFFormula` externally accessible. (PR #92401)
via llvm-commits
- [llvm] c4d6867 - InstSimplify: strip bad TODO (NFC) (#92754)
via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
via llvm-commits
- [llvm] 63d8131 - VectorCombine: add tests written for InstSimplify (#92776)
via llvm-commits
- [llvm] e3fa7ee - VectorCombine: refactor foldShuffleToIdentity (NFC) (#92766)
via llvm-commits
- [llvm] [RISCV] Merge RISCVCoalesceVSETVLI back into RISCVInsertVSETVLI (PR #92869)
via llvm-commits
- [llvm] 1e86e92 - [LoongArch] Enable interleaved vectorization (#92629)
via llvm-commits
- [llvm] [LoongArch] Enable interleaved vectorization (PR #92629)
via llvm-commits
- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
via llvm-commits
- [llvm] [llvm-objdump] Error with relevant message when adding invalid notes (PR #90458)
via llvm-commits
- [llvm] [GlobalIsel] Combine integers (PR #92879)
via llvm-commits
- [llvm] ee76f1e - [DevPolicy] Drop requirement to contribute also under the legacy license (#92394)
via llvm-commits
- [clang] [llvm] Split fmv and extensions (PR #92882)
via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
via llvm-commits
- [clang] [llvm] [polly] [X86] Remove knl/knm specific ISAs supports (PR #92883)
via llvm-commits
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- [clang] [llvm] [IR] Avoid creating icmp/fcmp constant expressions (PR #92885)
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- [llvm] 37813e0 - [clang][dataflow] Make `CNFFormula` externally accessible. (#92401)
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- [clang] [llvm] [clang][dataflow] Make `CNFFormula` externally accessible. (PR #92401)
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- [llvm] 1b377db - [LAA] Check accesses don't overlap early to determine NoDep (#92307)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #92895)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [lld] 5693678 - [LLD][COFF] Demangle ARM64EC export names. (#87068)
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- [clang] [clang-tools-extra] [llvm] [polly] [test]: fix filecheck annotation typos (PR #91854)
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- [clang] [clang-tools-extra] [llvm] [polly] [test]: fix filecheck annotation typos (PR #91854)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
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- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
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- [llvm] [AMDGPU] Remove #if 0 code for fences in SIInsertWaitcnts (PR #92902)
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- [llvm] [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts (PR #92903)
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- [llvm] [InstCombine] Fold X * (2^N + 1) >> N -> X + X >> N, or directly to X if X >> N is 0 (PR #90295)
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- [llvm] [AMDGPU] Remove #if 0 code for indexed resources in SIInsertWaitcnts (PR #92905)
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- [llvm] f3aaaaf - [AMDGPU] Remove #if 0 code for fences in SIInsertWaitcnts (#92902)
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- [llvm] 4e86b00 - [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts (#92903)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [Do not merge until #92907 is merged first] (PR #92909)
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- [llvm] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] 558f3ea - [AMDGPU] Remove #if 0 code for indexed resources in SIInsertWaitcnts (#92905)
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- [llvm] [X86] Skip AMX type lowering when AMX is not used (PR #92910)
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- [llvm] [X86] Skip AMX type lowering when AMX is not used (PR #92910)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GlobalISel] Select TBL/TBX Intrinsics (PR #92914)
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- [llvm] [AArch64][GlobalISel] Select TBL/TBX Intrinsics (PR #92914)
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- [llvm] [AArch64][GlobalISel] Combine MUL(AND(LSHR(X, 15), 0x10001), 0xffff) to CMLTz (PR #92915)
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- [llvm] [AArch64][GlobalISel] Combine MUL(AND(LSHR(X, 15), 0x10001), 0xffff) to CMLTz (PR #92915)
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- [llvm] [llvm-objdump] Error with relevant message when adding invalid notes (PR #90458)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] a53e568 - [AIX] Set memrchr to unavailable (#92588)
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- [llvm] AMDGPU/NFC: Reserve 0x056 and 0x057 EF_AMDGPU_MACHs (PR #92917)
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- [polly] Reland "[polly] Port polly tests to use NPM" (PR #92918)
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- [polly] Reland "[polly] Port polly tests to use NPM" (PR #92918)
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- [llvm] [DebugInfo][GVNSink] Merging debug locations of sinked instructions (PR #92859)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [FileCheck] forbid filecheck prefix to end with directive name (PR #92735)
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- [compiler-rt] [AArch64][compiler-rt] Add a function returning the current vector length (PR #92921)
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- [llvm] [FileCheck] forbid filecheck prefix to end with directive name (PR #92735)
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- [clang] [llvm] [AArch64] set AppleA14 architecture version to v8.4-a (PR #92600)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [compiler-rt] Add a requires `lto` instrprof-gc-sections.c (PR #92919)
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- [llvm] [AArch64] Add patterns for conversions using fixed-point scvtf (PR #92922)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [SelectionDAG] Use getAllOnes to evaluate isKnownNeverZero (PR #92923)
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- [llvm] [SelectionDAG] Use getAllOnes to evaluate isKnownNeverZero (PR #92923)
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- [llvm] 4ae896f - [AMDGPU] HasOneUse uses (#92534)
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- [llvm] [AMDGPU] HasOneUse uses (PR #92534)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [mlir][vector] Add deinterleave operation to vector dialect (PR #92409)
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- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
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- [llvm] [RISCV][ISel] Allow opaque constants in `hasAndNotCompare` (PR #92926)
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- [llvm] [BOLT] Tidy up codes (PR #92927)
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- [llvm] [BOLT] Tidy up code (PR #92927)
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- [llvm] [SelectionDAG] Use getAllOnes to evaluate isKnownNeverZero (PR #92923)
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- [llvm] [SelectionDAG] Use getAllOnes to evaluate isKnownNeverZero (PR #92923)
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- [llvm] 7674811 - [GISel][RISCV] Add irtranslator/legalizer/selector support for G_FREEZE. (#92744)
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- [clang] [llvm] [IR] Add getelementptr nusw and nuw flags (PR #90824)
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- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
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- [llvm] 7c19058 - [Darwin][IR] Don't error on target_variant mismatch when linking IR (#92297)
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- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
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- [llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] ea43a30 - [AMDGPU] Vectorize more 16 bit shuffles (#90648)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] 446f66d - [CodeGen] Assign SHT_LLVM_LTO to .llvm.lto section (#92856)
via llvm-commits
- [lld] cfeb25c - [lld][AArch64] Add support for GCS (#90732)
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- [llvm] 67e3514 - AMDGPU: Implement getRoundingControlRegisters (#92884)
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- [llvm] dab1f7c - AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (#92863)
via llvm-commits
- [llvm] [BOLT] Use const reference in range-based for loop (PR #92931)
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- [llvm] [BOLT] Use const reference in range-based for loop (PR #92931)
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- [llvm] [BOLT] Use const reference in range-based for loop (PR #92932)
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- [llvm] [BOLT] Use const reference in range-based for loop (PR #92932)
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- [llvm] 0c8bc08 - Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (#91372)
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- [llvm] 557bf38 - [RISCV][ISel] Allow opaque constants in `hasAndNotCompare` (#92926)
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- [llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
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- [llvm] [SelectionDAG] Use getAllOnes to evaluate isKnownNeverZero (PR #92923)
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- [llvm] [RISCV][GISel] Support G_{U|S}{ADD|SUB}SAT (PR #92935)
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- [llvm] InstCombine: Stop handling bitcast in PointerReplacer (PR #92937)
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- [llvm] Fix vgpr live range (PR #92940)
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- [llvm] Fix vgpr live range (PR #92940)
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- [llvm] Fix vgpr live range (PR #92940)
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- [llvm] 315a831 - AMDGPU/NFC: Reserve 0x056 and 0x057 EF_AMDGPU_MACHs (#92917)
via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
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- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
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- [llvm] 2805e6f - [llvm-driver] Add driver alias for c++filt (#92803)
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- [llvm] 194e7cc - [PowerPC][AIX] 64-bit large code-model support for toc-data (#90619)
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- [llvm] [X86] Return true for opaque constants in hasAndNotCompare. (PR #92944)
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- [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)
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- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
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- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] Allow PTO to be modified in PassBuilder (PR #92821)
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- [llvm] [BOLT] [NFC] Remove std at calls (PR #92950)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
via llvm-commits
- [llvm] [BOLT] [NFC] Remove std at calls (PR #92950)
via llvm-commits
- [llvm] [BOLT][NFC] Remove dead initialization code (PR #92952)
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- [llvm] [BOLT][NFC] Remove dead initialization code (PR #92952)
via llvm-commits
- [llvm] 8cb19eb - InstCombine: Stop handling bitcast in PointerReplacer (#92937)
via llvm-commits
- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
via llvm-commits
- [llvm] [BOLT] [NFC] Eliminate uses of throwing std::map::at (PR #92950)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [compiler-rt] 57a5079 - [msan] Increase kNumStackOriginDescrs constant (#92838)
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- [llvm] [Coroutines][NFC] Remove @llvm.coro.id.async intrinsics from CoroElide (PR #92956)
via llvm-commits
- [llvm] [Coroutines][NFC] Remove @llvm.coro.id.async intrinsics from CoroElide (PR #92956)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
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- [llvm] 687039b - [X86] Return true for opaque constants in hasAndNotCompare. (#92944)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] 3eb7711 - [AArch64][PAC][NFC] Make checkAuthenticatedRegister() return void (#92507)
via llvm-commits
- [llvm] [Linker] Propagate `nobuiltin` attributes when linking known libcalls #89431 (PR #92961)
via llvm-commits
- [llvm] [RISCV] Enable early if-conversion (PR #92959)
via llvm-commits
- [llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)
via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92621)
via llvm-commits
- [clang] [llvm] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on MI3XX (PR #92962)
via llvm-commits
- [llvm] [Nomination] Add an extra Red Hat representative to the security group (PR #92174)
via llvm-commits
- [llvm] LiveRangeEdit: Replace setIsDead with an assert (PR #92964)
via llvm-commits
- [llvm] [CodeGen][ARM64EC] Add support for hybrid_patchable attribute. (PR #92965)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [compiler-rt] 3b3d622 - [DFSan] Fix recvmsg wrapper to support MSG_TRUNC flag. (#92599)
via llvm-commits
- [clang] [lldb] [llvm] Remove some `try_compile` CMake checks for compiler flags (PR #92953)
via llvm-commits
- [llvm] [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (PR #92671)
via llvm-commits
- [llvm] 2e7365e - [lldb] Set ObjectFile's assignment operator to also be deleted like its copy constructor (#92942)
via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
via llvm-commits
- [llvm] [RemoveDIs] Add a 'BeforeDbgRecords' parameter to C API isnt insertion functions (PR #92417)
via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #92942)
via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
via llvm-commits
- [llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)
via llvm-commits
- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
via llvm-commits
- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
via llvm-commits
- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [BOLT][NFC] Use const reference in range-based for loop (PR #92932)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [BOLT][NFC] Remove dead initialization code (PR #92952)
via llvm-commits
- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] 7630775 - Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (#92973)
via llvm-commits
- [llvm] Revert "Set ObjectFile's assignment operator to also be deleted like its copy constructor" (PR #92973)
via llvm-commits
- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
via llvm-commits
- [llvm] [hwasan] Remove memory attrs from instrumented functions. (PR #92974)
via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92975)
via llvm-commits
- [llvm] [BOLT] Add NamedRegionTimer to inferStaleProfile (PR #92975)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] 79a3260 - [hwasan] Remove memory attrs from instrumented functions. (#92974)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] 0170bd5 - [MDBuilder] `mergeCallbackEncodings` fails due to inspecting the wrong node (#92466)
via llvm-commits
- [llvm] 203232f - [llvm][Support] ListeningSocket::accept returns operation_canceled if FD is set to -1 (#89479)
via llvm-commits
- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
via llvm-commits
- [llvm] f0d1ae8 - [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)
via llvm-commits
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- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags. (PR #92980)
via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags. (PR #92980)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
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- [llvm] c2e0afe - [Coroutines][NFC] Remove @llvm.coro.id.async intrinsics from CoroElide (#92956)
via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
via llvm-commits
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via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
via llvm-commits
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- [llvm] [nfc][InstrProfReader]Store header fields in native endianness (PR #92947)
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- [llvm] [IRSim] Fix overlap() (PR #92988)
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- [llvm] d53c6cd - [AMDGPU][Clang] Builtin for GLOBAL_LOAD_LDS on GFX940 (#92962)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
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- [llvm] 7370b10 - Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)" (#92992)
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- [llvm] Revert "[llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (#92368)" (PR #92992)
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- [llvm] 108575f - [IR] Avoid creating icmp/fcmp constant expressions (#92885)
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- [llvm] 89e1f77 - [indvars] Missing variables at Og (#88270)
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- [llvm] c769079 - [AMDGPU] Update test results to fix build (#92982)
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- [llvm] [AMDGPU] Update test results to fix build (PR #92982)
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- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [llvm] [PPCMergeStringPool] Only replace constant once (PR #92996)
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- [clang] [llvm] [PowerPC] Support -fpatchable-function-entry (PR #92997)
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- [llvm] 1015f51 - [AArch64] NFC: Rename -force-streaming-compatible-sve to -force-streaming-compatible (#92774)
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- [llvm] [GISel] Legalize bitreverse with types smaller than 8 bits (PR #92998)
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- [llvm] 235465e - [RISCV][GISel] Legalize G_{U|S}{ADD|SUB}SAT (#92935)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the criti... (PR #92368)
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- [clang] [clang-tools-extra] [compiler-rt] [libcxx] [lld] [lldb] [llvm] [mlir] Fix SyntaxWarning messages from python 3.12 (PR #86806)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [AMDGPU] Update test results to fix build (PR #92982)
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- [llvm] [AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (PR #93004)
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- [llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] 3c5738f - Revert "[indvars] Missing variables at Og (#88270)" (#93016)
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- [llvm] Revert "[indvars] Missing variables at Og (#88270)" (PR #93016)
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- [lld] Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (PR #92695)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [GISel][RISCV] Legalize shifts with non-trivial shamt types (PR #93019)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [X86] Skip AMX type lowering when AMX is not used (PR #92910)
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- [llvm] [X86] Skip AMX type lowering when AMX is not used (PR #92910)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [llvm][ScheduleDAG] SUnit::biasCriticalPath() does not find the critical path consistently (PR #93001)
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- [llvm] [DAG] ComputeNumSignBits - add AVGCEILS/AVGFLOORS handling (PR #93021)
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- [llvm] AMDGPU: Clean up maximum3/minimum3 tests (PR #93025)
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- [llvm] cf12830 - [SDAG] Don't treat ISD::SHL as a uniform binary operator in `ShrinkDemandedOp` (#92753)
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- [llvm] 71b1fbd - [MISched][NFC] Add documentation comment in pickNode for ReadyQueue maintenence (#92976)
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- [llvm] [FileCheck] improve prefix validation (PR #92248)
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- [llvm] [FileCheck] forbid filecheck check prefix definitions to end with directive name (PR #92735)
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- [llvm] [FileCheck] forbid filecheck check prefix definitions to end with directive name (PR #92735)
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- [llvm] a699ccb - MCExpr-ify amd_kernel_code_t (#91587)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
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- [llvm] AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (PR #93027)
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- [llvm] f78febf - [DAG] ComputeNumSignBits - add AVGCEILS/AVGFLOORS handling (#93021)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [llvm] [GISel] Add narrowScalar/widenScalar support for `G_CONSTANT_FOLD_BARRIER` (PR #93031)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [llvm] add disable pass flags (PR #93032)
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- [llvm] [BOLT] add disable pass flags (PR #93032)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [llvm] Add `AddNull` argument to `CreateGlobalString`. (PR #93036)
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- [llvm] 267de85 - [llvm-mca][AArch64] Add AArch64 version of clearsSuperRegisters. (#92548)
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- [llvm] 183beb3 - [llvm-objcopy] Check for missing argument values (#70710)
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- [llvm] c8dc6b5 - [SDAG] Improve `SimplifyDemandedBits` for mul (#90034)
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- [llvm] 9e0be65 - [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (#91652)
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- [llvm] [AArch64][SVE2] UZP should only have one result (PR #93041)
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- [llvm] d41dde7 - LiveRangeEdit: Replace setIsDead with an assert (#92964)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
via llvm-commits
- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
via llvm-commits
- [llvm] [InstCombine] Reducing multiplications means we can have nsw and nuw tags (PR #92980)
via llvm-commits
- [llvm] cb6a623 - Add `AddNull` argument to `CreateGlobalString`. (#93036)
via llvm-commits
- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
via llvm-commits
- [llvm] 5b20595 - [SLP] NFC. Reduce newTreeEntry usage. (#92994)
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- [llvm] [InstCombine] Fix null pointer dereference in `foldCmpLoadFromIndexedGlobal` (PR #93050)
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- [llvm] LoopInfo: introduce Loop::getLocStr; unify debug output (PR #93051)
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- [llvm] 821bcba - [GISel] Add narrowScalar/widenScalar support for `G_CONSTANT_FOLD_BARRIER` (#93031)
via llvm-commits
- [llvm] c0de13b - [GISel][RISCV] Legalize shifts with non-trivial shamt types (#93019)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [llvm] workflows: Disable stage2 of the release builds (PR #93056)
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- [llvm] [Offload] Use newer CUDA API functions when dynamically loaded (PR #93057)
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- [llvm] [Offload] Use newer CUDA API functions when dynamically loaded (PR #93057)
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- [llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
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- [llvm] c44fa3e - [Clang] Refactor `__attribute__((assume))` (#84934)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [llvm] [BOLT][NFC] Move BAT::fetchParentAddress to header (PR #93061)
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- [llvm] [GISel][RISCV] Legalize `G_FREM` to use fmod (PR #93063)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [llvm] [BOLT][NFC] Eliminate uses of throwing std::map::at (PR #92950)
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- [llvm] [BOLT][NFC] Clean up MCF (PR #93065)
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- [llvm] [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (PR #92978)
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- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
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- [llvm] [GISel][RISCV] Legalize `G_{U|S}DIVREM` (PR #93067)
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- [llvm] e8dd4df - [NFC][TTI] Mark `getReplicationShuffleCost()` as `const` (#92194)
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- [llvm] [LVI] Generalize mask not equal conditions handling (PR #92946)
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- [clang] [llvm] [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (PR #93064)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [llvm] 6262763 - [ThinLTO][Bitcode] Generate import type in bitcode (#87600)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [llvm] 135ddd8 - [X86] Remove unused MachineLoopInfo from X86FixupBWInsts. NFC (#92984)
via llvm-commits
- [llvm] Set ObjectFile's assignment operator to also be deleted like its copy constructor (PR #93072)
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- [llvm] [openmp] [Offload] Rework handling for loading vendor runtimes (PR #93073)
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- [llvm] [BOLT][NFC] Make estimateEdgeCounts a BinaryFunctionPass (PR #93074)
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- [llvm] f2bbb4c - [GISel][RISCV] Legalize `G_{U|S}DIVREM` (#93067)
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- [llvm] LLVM vectorizer working group (PR #92068)
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- [llvm] 562c479 - Set ObjectFile's assignment operator to also be deleted like its copy constructor (#93072)
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- [llvm] [llvm-cov] Add HTML dark theme support (PR #93080)
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- [llvm] [llvm-cov] Add HTML dark theme support (PR #93080)
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- [llvm] 29456e9 - [PowerPC] Fix assembler error with toc-data and data-sections (#91976)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
via llvm-commits
- [llvm] 8baf96f - Revert "[IR] Avoid creating icmp/fcmp constant expressions" (#93087)
via llvm-commits
- [clang] [llvm] Revert "[IR] Avoid creating icmp/fcmp constant expressions" (PR #93087)
via llvm-commits
- [clang] [llvm] Revert "[IR] Avoid creating icmp/fcmp constant expressions" (PR #93087)
via llvm-commits
- [llvm] [symbolizer] Empty string is not an error (PR #92660)
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- [llvm] 0a62a99 - [SelectOpt] Add handling for not conditions. (#92517)
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- [llvm] 990bed6 - [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (#89612)
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- [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)
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- [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)
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- [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
via llvm-commits
- [llvm] 6de14c6 - [AArch64][SVE2] UZP should only have one result (#93041)
via llvm-commits
- [llvm] 25b65be - [RISCV][LSR] Account for temporary register for base addition (#92296)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] 848bef5 - [llvm-mca] Add command line option -call-latency (#92958)
via llvm-commits
- [llvm] [llvm-mca] Add command line option -call-latency (PR #92958)
via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
via llvm-commits
- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [mlir] [mlir] Decouple NVPTX target from CUDA toolkit presence (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [DebugInfo][GVNSink] Merging debug locations of sinked instructions (PR #92859)
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- [llvm] [DebugInfo][GVNSink] Merging debug locations of sinked instructions (PR #92859)
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- [llvm] Allow PTO to be modified in PassBuilder (PR #92821)
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- [llvm] Allow PTO to be modified in PassBuilder (PR #92821)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] 7c937df - [CodeGen] Forbid passing a PointerType to MVT::getVT and EVT::getEVT (#92671)
via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
via llvm-commits
- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
via llvm-commits
- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
via llvm-commits
- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
via llvm-commits
- [llvm] Fix update-test-checks.py on Python 3.6 (PR #93116)
via llvm-commits
- [compiler-rt] [msan] Reland: Increase k num stack origin descrs (limited to non-PowerPC) (PR #93117)
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- [compiler-rt] b91b8fe - [asan][windows] Further relax how deep in the callstack main can be in some asan tests (#92329)
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- [llvm] DWARF: Emit `DW_AT_artificial` on artificial globals (PR #93118)
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- [lld] 5ae8567 - Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (#92695)
via llvm-commits
- [llvm] 282d2ab - [X86] Remove knl/knm specific ISAs supports (#92883)
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- [llvm] aa4069e - Revert "[X86] Remove knl/knm specific ISAs supports (#92883)" (#93123)
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- [clang] [llvm] Revert "[X86] Remove knl/knm specific ISAs supports (#92883)" (PR #93123)
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- [llvm] [RISCV] Restrict when we fold an ADD_LO into a load/store address. (PR #93129)
via llvm-commits
- [llvm] 2375921 - [ProfileData] Use default member initializations (NFC) (#93120)
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- [llvm] beac910 - [nfc][InstrProfWriter]Wrap vtable writes in a method. (#93081)
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- [llvm] update_llc_test_checks: better support for non-llc tools (PR #93135)
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- [llvm] update_llc_test_checks: better support for non-llc tools (PR #93135)
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- [llvm] ca478bc - [SCEV] Support ule/sle exit counts via widening (#92206)
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- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93142)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [LV][VPlan] Introduce VPIntermediateStore recipe to handle scalar stores in exit block. (PR #93148)
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- [llvm] 4c48b3c - [GISel][CombinerHelper] Push freeze through non-poison-producing operands (#90618)
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- [llvm] [llvm-dwarfdump] Add a null-check in `prettyPrintBaseTypeRef`. (PR #93156)
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- [llvm] aefd257 - [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (#92780)
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- [llvm] [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (PR #93167)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [LV] add test for low TC under ARM MVE (PR #93181)
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- [llvm] [SimplifyCFG] Convert switch to cmp/select sequence (PR #82795)
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- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
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- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
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- [llvm] [Support] Fix LEB128 test when building with MSVC (PR #93184)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] 4feae05 - Remove some `try_compile` CMake checks for compiler flags (#92953)
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- [llvm] 27392a3 - [SCCP] Don't allow undef ranges when performing operations (#93163)
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- [llvm] f06c1ce - AMDGPU: Clean up maximum3/minimum3 tests (#93025)
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- [llvm] 05c154f - [SME] Add intrinsics for FCVT(wid.) and FCVTL (#90215)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #90215)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #88114)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #88114)
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- [llvm] 7a1022a - [AArch64][SME] Add intrinsics for vector groups ZERO (#88114)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #88114)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (PR #88251)
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- [llvm] [polly] [test]: fix filecheck annotation typos (PR #91854)
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- [llvm] 2401b61 - AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (#93027)
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- [clang] [llvm] Revert "[AArch64][SME] Add intrinsics for vector groups ZERO" (PR #93195)
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- [clang] [llvm] Revert "[AArch64][SME] Add intrinsics for vector groups ZERO" (PR #93195)
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- [llvm] 8dcbc4c - Revert "[AArch64][SME] Add intrinsics for vector groups ZERO" (#93195)
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- [clang] [llvm] Revert "[AArch64][SME] Add intrinsics for vector groups ZERO" (PR #93195)
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- [clang] [llvm] Revert "[AArch64][SME] Add intrinsics for vector groups ZERO" (PR #93195)
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- [llvm] 90a4690 - Revert "[SME] Add intrinsics for FCVT(wid.) and FCVTL" (#93196)
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- [clang] [llvm] Revert "[SME] Add intrinsics for FCVT(wid.) and FCVTL" (PR #93196)
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- [clang] [llvm] Revert "[SME] Add intrinsics for FCVT(wid.) and FCVTL" (PR #93196)
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- [llvm] [LAA] rewrite a test to be less nonsensical (PR #93197)
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- [llvm] 0bf181e - MIPS: Fix llvm.{min,max}num for R6 (#93125)
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- [llvm] 9c60010 - [GlobalIsel] Combine G_ADD and G_SUB (#92879)
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- [llvm] 44430de - [Coroutines] Always set the calling convention of generated resuming call from 'llvm.coro.await.suspend.handle' as fast (#93167)
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- [llvm] 7e476eb - [AMDGPU][Clang] Add check of size for __builtin_amdgcn_global_load_lds (#93064)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)
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- [clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)
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- [llvm] a0e6f83 - [ConstraintFP] Model rounding control registers for inline asm (#92846)
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- [llvm] [NFC][LLVM] Clean up TLI VECFUNC macros. (PR #93178)
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- [llvm] [CodeGen][SDAG] Remove Combiner WorklistMap (PR #92900)
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- [llvm] [Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [llvm] [UTC] support debug output from LDist (PR #93208)
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- [lldb] [llvm] Add a createError variant without error code (NFC) (PR #93209)
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- [llvm] 942a6af - [llvm-readobj] Fixes malformed json on JSON printed corefiles (#92835)
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- [llvm] [llvm-profgen] Trim tail CR+LF for LBR record line (PR #93210)
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- [llvm] 89245b6 - [RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (#92768)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [compiler-rt] [scudo] Apply filling option when realloc grows a block in-place too (PR #93212)
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- [llvm] 558cb29 - [GISel][RISCV] Legalize `G_FREM` (#93063)
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- [llvm] [SLP]Improve/fix extracts calculations for non-power-of-2 elements. (PR #93213)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] 910292c - [LLVM][Coroutines] Check variable decl scope instead of optimization level for hoisted DbgDeclare Loc (#92978)
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- [llvm] 8cc8e5d - Run ObjCContractPass in Default Codegen Pipeline (#92331)
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- [compiler-rt] [scudo] Compute the default aligned pointer without tag (PR #92989)
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- [lld] [lld-macho] Add flag --keep-icf-stabs to LLD for MachO (PR #93137)
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- [llvm] [llvm-profgen] Trim tail CR+LF for LBR record line (PR #93210)
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- [llvm] [VectorCombine] Add Cmp and Select for shuffleToIdentity (PR #92794)
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- [compiler-rt] [scudo] Apply filling option when realloc grows a block in-place too (PR #93212)
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- [llvm] [BOLT] Set InitialDynoStats after EstimateEdgeCounts (PR #93218)
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- [llvm] 2d61692 - Attributor: Do not assume function context in AANoCapture (#91462)
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- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
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- [llvm] 779be6f - Fix update-test-checks.py on Python 3.6 (#93116)
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- [llvm] [Reassociate] Preserve NSW flags after expr tree rewriting (PR #93105)
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- [llvm] [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (PR #93221)
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- [llvm] [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (PR #93221)
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- [llvm] [Exegesis] Changing non-standard CHECK in tests to more compliant way (PR #93222)
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- [llvm] [Exegesis] Changing non-standard CHECK in tests to more compliant way (PR #93222)
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- [llvm] [MachineScheduler][ScheduleDAG] Add ability to bias scheduling by longest paths (PR #93223)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [BOLT][NFC] Remove mutable from BB:LayoutIndex (PR #93224)
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- [llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)
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- [llvm] [symbolizer] Empty string is not an error (PR #92660)
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- [llvm] 73eb9b3 - [InstrProf] Evaluate function order using test traces (#92451)
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- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
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- [lld] [lld-macho][ObjC] Implement category merging into base class (PR #92448)
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- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
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- [clang] [llvm] [WebAssembly] Implement prototype f16x8.splat instruction. (PR #93228)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] [llvm-profgen] Improve sample profile density (PR #92144)
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- [llvm] f3d6db3 - [TableGen][CMake] Add missing dependency to intrinsics_gen (#93134)
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- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
via llvm-commits
- [llvm] [llvm-dwarfdump] Add a null-check in `prettyPrintBaseTypeRef`. (PR #93156)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (PR #92525)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [llvm-dwarfdump] Add a null-check in `prettyPrintBaseTypeRef`. (PR #93156)
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- [llvm] [LowerSwitch] Use unsigned integer for range comparasion (PR #93237)
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- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
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- [llvm] Revert "[BOLT] Remove --allow-stripped option" (PR #93238)
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- [llvm] 8ad980d - [memprof] Refactor getMemProfRecord (NFC) (#93138)
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- [llvm] [GlobalIsel] Combine freeze (PR #93239)
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- [llvm] af31883 - Add a createError variant without error code (NFC) (#93209)
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- [llvm] Avoid std::string -> (char *) roundtrip in createStringError() (NFC) (PR #93242)
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- [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)
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- [llvm] [Hexagon] Implement @llvm.readsteadycounter() (PR #93247)
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- [llvm] [May] Registration the backend for May architecture (PR #93250)
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- [llvm] [May] Registration the backend for May architecture (PR #93250)
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- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
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- [llvm] [nfc][InstCombine]Find PHI incoming block by operand number (PR #93249)
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- [llvm] [Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)
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- [llvm] [May] Registration the backend for May architecture (PR #93250)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [BOLT] Fix unused variable warning (PR #93253)
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via llvm-commits
- [llvm] [May] Registering the backend for the May architecture (PR #93254)
via llvm-commits
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via llvm-commits
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- [llvm] 09c5525 - [WebAssembly] Implement prototype f16x8.splat instruction. (#93228)
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- [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)
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- [clang] [llvm] [WebAssembly] Implement prototype f16x8.extract_lane instruction. (PR #93272)
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- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
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- [llvm] 4def1ce - Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (#93136)
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- [llvm] Fix build warning for 4def1ce10 (PR #93274)
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- [llvm] [RISCV] Implement Intrinsics Support for XCValu Extension in CV32E40P (PR #85603)
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- [llvm] Revert "[AMDGPU] Add AMDGPU-specific module splitting" (PR #93275)
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- [llvm] [RISCV] Implement Intrinsics Support for XCValu Extension in CV32E40P (PR #85603)
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- [llvm] 5a48223 - Revert "[AMDGPU] Add AMDGPU-specific module splitting" (#93275)
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- [llvm] [RISCV] Implement CodeGen Support for XCValu Extension in CV32E40P (PR #78138)
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- [llvm] [LowerSwitch] Use unsigned integer for range comparasion (PR #93237)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] b2f65e8 - [VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (#92525)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
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- [llvm] dc148c9 - [LV] add test for #47665, #88802 (#91135)
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- [llvm] [MachineLICM] Hoist copies of constant physical register (PR #93285)
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- [llvm] [MachineLICM] Hoist copies of constant physical register (PR #93285)
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- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
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- [llvm] f1acd9d - [LAA] increase test coverage in symbolic-stride (#92253)
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- [llvm] [VPlan] Preserve DT (and SCEV) in VPlan-native path (PR #93287)
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- [llvm] 430729d - [NFC][LLVM] Clean up TLI VECFUNC macros. (#93178)
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- [llvm] [DwarfDump] Add new set of line-table-related statistics to llvm-dwarfdump (PR #93289)
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- [llvm] [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (PR #93292)
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- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] 214e6b4 - [SPIR-V] Inline assembly support (#93164)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [LV] generalize profitability criterion over TC (PR #93300)
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- [llvm] fb9f5aa - [SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (#93292)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] 0f26aa5 - [SPIR-V] Update docs to describe support of SPV_KHR_shader_clock (#93168)
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- [llvm] 70a54bc - [SLP]Improve/fix extracts calculations for non-power-of-2 elements.
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [workflows] Add a new workflow for checking commit access qualifications (PR #93301)
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- [llvm] [workflows] Add a new workflow for checking commit access qualifications (PR #93301)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [LV] strip TailFoldingStyle::DataWithoutLaneMask (PR #93303)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] b2f6d32 - [MemProf] Fix tailcall discovery checking for multiple callee chains (#92632)
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- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
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- [llvm] [AMDGPU] Legalize and select raw/struct_buffer_load with tfe (PR #93310)
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- [llvm] [openmp] [OpenMP][OMPX] Add shfl_down_sync (PR #93311)
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- [llvm] [openmp] [OpenMP][OMPX] Add shfl_down_sync (PR #93311)
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- [llvm] b008a2d - [LV][NFC] precommit test for EVL transform (#92203)
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- [llvm] 4ebe9bb - [WebAssembly] Implement prototype f16x8.extract_lane instruction. (#93272)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [mlir] [mlir] Replace MLIR_ENABLE_CUDA_CONVERSIONS with LLVM_HAS_NVPTX_TARGET (PR #93008)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
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- [clang] [llvm] [clang] Add tanf16 builtin and support for tan constrained intrinsic (PR #93314)
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- [llvm] 15135af - [memprof] Use a SetVector (NFC) (#93312)
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- [llvm] a1c9b96 - [SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (#93221)
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- [llvm] [FileCheck] forbid filecheck check prefix definitions to end with directive name (PR #92735)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [FileCheck] forbid filecheck check prefix definitions to end with directive name (PR #92735)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
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- [llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
via llvm-commits
- [llvm] [FileCheck] forbid filecheck check prefix definitions to end with directive name (PR #92735)
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- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
via llvm-commits
- [llvm] 9e81466 - [LAA] rewrite a test to make it more robust (#93197)
via llvm-commits
- [llvm] [DAG] Replace getValid*ShiftAmountConstant helpers with getValid*ShiftAmount helpers to support KnownBits analysis (PR #93182)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] [ConstantRange][LVI] Add initial support for `multiplyWithNoWrap` (PR #92356)
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- [llvm] [InstCombine] Fold `switch(rol(x, C1)) case C2:` to `switch(x) case rol(C2, -C1):` (PR #86307)
via llvm-commits
- [llvm] [RISCV] Don't use x7 as input argument for fastcc when Zicfilp enabled. (PR #93321)
via llvm-commits
- [llvm] [Attributor][FIX] Ensure nonnull IR deduction is not optimistic (PR #93322)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [BOLT] Fix unused variable warning (PR #93323)
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- [llvm] [BOLT] Fix unused variable warning (PR #93323)
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- [llvm] [CVP]: Fold `icmp eq X, C` to `trunc X to i1` if C=2k+1 and X in [2k, 2k+1] (PR #83829)
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- [llvm] bb0d29a - [LV] fix logical error in trunc cost (#91136)
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- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
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- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
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- [llvm] f492471 - [AArch64][SVE] Lower function arguments in types of arrays of predicates (#90122)
via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
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- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)
via llvm-commits
- [llvm] [InstCombine] Make the `(icmp eq/ne (and X, Y), X)` canonicalization work for non-const operands (PR #84688)
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- [llvm] [symbolizer] Empty string is not an error (PR #92660)
via llvm-commits
- [llvm] [BOLT][NFC] Fix unused variable warning (PR #93323)
via llvm-commits
- [llvm] 8d2258f - [memprof] Call llvm::SmallVector::reserve (#93324)
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- [llvm] 6bf450c - [Support] Remove terminfo dependency (#92865)
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- [llvm] 66b5f16 - [RISCV] Do not check PostRAScheduler in enablePostRAScheduler (#92781)
via llvm-commits
- [llvm] b9d40a7 - [llvm-profgen] Improve sample profile density (#92144)
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- [clang] [llvm] [clang][ci] Move libc++ testing into the main PR pipeline (PR #93318)
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- [polly] e1f056f - Reland "[polly] Port polly tests to use NPM" (#92918)
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- [llvm] [PowerPC][AIX] Support ByVals with greater alignment then pointer size (PR #93341)
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- [llvm] [BOLT] Do not emit debug_names entry for DIEs with DW_AT_declaration (PR #93347)
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- [clang] [clang-tools-extra] [llvm] [BOLT][NFC] Added double escape characters (PR #93348)
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- [clang] [clang-tools-extra] [llvm] [BOLT][NFC] Added double escape characters (PR #93348)
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- [llvm] 56c5ca8 - [nfc][InstCombine]Find PHI incoming block by operand number (#93249)
via llvm-commits
- [llvm] [Codegen] (NFC) Faster algorithm for MachineBlockPlacement (PR #91843)
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- [llvm] [BOLT] Remove mutable from BB:LayoutIndex (PR #93224)
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- [llvm] [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (PR #93352)
via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Correctly apply libdir subdir for multilib (PR #93354)
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- [llvm] [llvm] Improve the RelLookupTableConverter pass (PR #93355)
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- [llvm] [llvm] Improve the RelLookupTableConverter pass (PR #93355)
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- [llvm] [llvm] Improve the RelLookupTableConverter pass (PR #93355)
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- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
via llvm-commits
- [llvm] [RISCV] Use mask undisturbed policy when silencing sNans for strict rounding ops. (PR #93356)
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- [llvm] [LegalizeTypes] Handle non byte-sized elt types when splitting INSERT/EXTRACT_VECTOR_ELT (PR #93357)
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- [llvm] 0338c55 - [LV, VPlan] Check if plan is compatible to EVL transform (#92092)
via llvm-commits
- [clang] [llvm] [WebAssembly] Implement all f16x8 binary instructions. (PR #93360)
via llvm-commits
- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
via llvm-commits
- [clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)
via llvm-commits
- [clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)
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- [clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)
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- [clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)
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- [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)
via llvm-commits
- [llvm] [CVP] Check whether the default case is reachable (PR #79993)
via llvm-commits
- [llvm] 64ed699 - Reland "[SimplifyCFG] When only one case value is missing, replace default with that case (#76669)"
via llvm-commits
- [llvm] 7dc2f66 - Reland "[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Condition is Too Wide (#77831)"
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- [clang] [compiler-rt] [llvm] [openmp] [PGO][Offload] Profile profraw generation for GPU instrumentation #76587 (PR #93365)
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- [llvm] 85cf2e5 - [llvm] Include the GenVT.inc to getEnumName (#93198)
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- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
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- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
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- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
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- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
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- [llvm] [MachineScheduler][ScheduleDAG] Add ability to bias scheduling by longest paths (PR #93223)
via llvm-commits
- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
via llvm-commits
- [llvm] 25f4ead - [flang] [lldb] [llvm] Fix 'destory' comment typos [NFC] (#93260)
via llvm-commits
- [llvm] Intrinsic: Fix minnum and introduce minimumnum (PR #93373)
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- [llvm] Intrinsic: Fix minnum and introduce minimumnum (PR #93373)
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- [llvm] 4ecbfac - [llvm] Revise IDE folder structure (#89741)
via llvm-commits
- [llvm] 56d319e - [Support] Fix LEB128 test when building with MSVC (#93184)
via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
via llvm-commits
- [llvm] [AMDGPU] Introduce address sanitizer instrumentation for LDS lowered by amdgpu-sw-lower-lds pass (PR #89208)
via llvm-commits
- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
via llvm-commits
- [llvm] [InstCombine] Add support for transforming manual signed mul overflows (PR #93370)
via llvm-commits
- [llvm] [BOLT] Enable standalone build (PR #87196)
via llvm-commits
- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
via llvm-commits
- [polly] c16538f - [polly] Revise IDE folder structure (#89752)
via llvm-commits
- [llvm] [Sample Profile] Check hot callsite threshold when inlining a function with a sample profile (PR #93286)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] [ADT] Add SmallVectorImpl::append_range (PR #93384)
via llvm-commits
- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [Nomination] Add ST representative to Security group (PR #93176)
via llvm-commits
- [llvm] [Nomination] Add an extra Red Hat representative to the security group (PR #92174)
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- [llvm] [IR] Do not set `none` for function uwtable (PR #93387)
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- [llvm] [IR] Do not set `none` for function uwtable (PR #93387)
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- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
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- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
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- [clang] [clang-tools-extra] [libcxx] [lldb] [llvm] Add clang basic module directory (PR #93388)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] [VPlan] Model FOR extract of exit value in VPlan. (PR #93395)
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- [llvm] [VPlan] Model FOR resume value extraction in VPlan. (PR #93396)
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- [llvm] [SCEV] Don't add predicates already implied by UnionPredicate. (PR #93397)
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- [llvm] [VPlan] Add VPIRWrapperBlock, use to model pre-preheader. (PR #93398)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [Asan] Teach FunctionStackPoisoner to filter out struct type with sclable vector type. (PR #93406)
via llvm-commits
- [llvm] 331eb8a - [X86][CodeGen] Support lowering for CCMP/CTEST (#91747)
via llvm-commits
- [llvm] [SelectionDAG] Fix the assertion failure in Release build after #91747 (PR #93416)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] [Inliner] Don't propagate memory attributes to byval params (PR #93381)
via llvm-commits
- [llvm] cda5790 - [Inliner] Don't propagate memory attributes to byval params (#93381)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
via llvm-commits
- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [VPlan] First step towards VPlan cost modeling (LegacyCM in CostCtx) (PR #92555)
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- [llvm] [AMDGPU]: Fall back to default mutations when iglp is not applied (PR #93418)
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- [llvm] [ARM] Remove duplicate custom SDag node (NFCI) (PR #93419)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] 1d3329c - [Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (#82120)
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- [llvm] [Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] 70bf139 - [Legalizer] Check full condition for UMIN and UMAX just like the code below does for SMIN and SMAX (#87932)
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- [llvm] [Legalizer] Check full condition for UMIN and UMAX just like the code below does for SMIN and SMAX (PR #87932)
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- [llvm] 972f297 - Resolve TODO: Use TokenFactor for inline memset (#87002)
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- [llvm] Resolve TODO: Use TokenFactor for inline memset (PR #87002)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [llvm] [X86] Support ATOMIC_LOAD_FP_BINOP_MI for other binops (PR #87524)
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- [llvm] [ARM] Determine if registers are live with LiveRegUnits (NFC) (PR #87888)
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- [llvm] [DSE] Check write location in IsRedundantStore (PR #93400)
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- [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)
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- [llvm] bb02bf7 - [Support] Refactor getN1Bits so it does not work around any g++ bug (#78933)
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- [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)
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- [llvm] c6ce937 - [Hexagon] Implement @llvm.readsteadycounter() (#93247)
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- [llvm] 6d48496 - [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (#92907)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #92907)
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- [clang] [llvm] [WebAssembly] Refactor Wasm Reference Types as TargetExtType (PR #93428)
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- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [clang] [llvm] [WebAssembly] Refactor Wasm Reference Types as TargetExtType (PR #93428)
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- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)
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- [llvm] [runtimes] remove workaround for old CMake when setting `--unwindlib=none` (PR #93429)
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- [llvm] [ARM] Determine if registers are live with LiveRegUnits (PR #87888)
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- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] [ARM][NFC] Use addLiveIns method instead of manually adding live-ins (PR #87560)
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- [llvm] 6e14583 - [ARM][NFC] Use addLiveIns method instead of manually adding live-ins (#87560)
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- [llvm] [ARM][NFC] Use addLiveIns method instead of manually adding live-ins (PR #87560)
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- [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)
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- [llvm] 64bba21 - [InstCombine] Propagate disjoint flags during shl-binop transform (#91333)
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- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] 0f8a747 - [AArch64][NFC] Switch to LiveRegUnits (#87313)
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- [llvm] [AArch64][NFC] Switch to LiveRegUnits (PR #87313)
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- [llvm] 558c519 - [SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)
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- [llvm] [SystemZ] LivePhysRegs to LiveRegUnits (NFC) (PR #85162)
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- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
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- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
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- [llvm] [InstSimplify] Fold X * (2^N + 1) >> N -> X when N is half the bitwidth of X (PR #92909)
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- [llvm] bb4c8f9 - [SCEV] Don't add predicates already implied by UnionPredicate. (#93397)
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- [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)
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- [llvm] [SelectionDAG][X86] Fix the assertion failure in Release build after #91747 (PR #93434)
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- [llvm] eeb2f72 - [SelectionDAG][X86] Fix the assertion failure in Release build after #91747 (#93434)
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- [llvm] cbd8031 - Revert "[X86] Use generic CPU tuning when tune-cpu is empty" (#93436)
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- [llvm] Revert "[X86] Use generic CPU tuning when tune-cpu is empty" (PR #93436)
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- [clang] [compiler-rt] [lldb] [llvm] [Support] Remove terminfo dependency (PR #92865)
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- [llvm] 9027ee6 - [X86][MC] Support encoding optimization & assembler relaxation about immediate operands for CCMP (#85175)
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- [llvm] dbfed77 - [WindowsManifestMerger] Remove deprecated call to xmlKeepBlanksDefault (#93139)
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- [llvm] 9f85bc8 - [PPCMergeStringPool] Only replace constant once (#92996)
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- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
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- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
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- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
zhijian lin via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
zhijian lin via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
zhijian lin via llvm-commits
- [llvm] [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (PR #92543)
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Last message date:
Sun May 26 23:58:38 PDT 2024
Archived on: Sun May 26 23:58:40 PDT 2024
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