[llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,61 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr +avx < %s | FileCheck %s
+
+; The C source used as a base for generating this test:.
+
+; unsigned test(float f)
+; {
+;    unsigned i;
+;    // Copies f into the output operand i
+;    asm volatile ("" : "=r" (i) : "0" (f));
+;    return i;
+; }
+
+
+define i32 @test_int_float(float %f) {
+; CHECK-LABEL: test_int_float:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vmovd %xmm0, %eax
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    retq
+entry:
+  %asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(float %f)
+  ret i32 %asm_call
+}
+
+define i32 @test_int_ptr(ptr %f) {
+; CHECK-LABEL: test_int_ptr:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    retq
+entry:
+  %asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(ptr %f)
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arsenm wrote:

What about double + i32? Or i16 + float? 

https://github.com/llvm/llvm-project/pull/65465